arch/arm/boot/dts/tegra20-paz00.dts

   1 /dts-v1/;
   2
   3 #include <dt-bindings/input/input.h>
   4 #include "tegra20.dtsi"
   5
   6 / {
   7         model = "Toshiba AC100 / Dynabook AZ";
   8         compatible = "compal,paz00", "nvidia,tegra20";
   9
  10         aliases {
  11                 rtc0 = "/i2c@7000d000/tps6586x@34";
  12                 rtc1 = "/rtc@7000e000";
  13         };
  14
  15         memory {
  16                 reg = <0x00000000 0x20000000>;
  17         };
  18
  19         host1x@50000000 {
  20                 dc@54200000 {
  21                         rgb {
  22                                 status = "okay";
  23
  24                                 nvidia,panel = <&panel>;
  25                         };
  26                 };
  27
  28                 hdmi@54280000 {
  29                         status = "okay";
  30
  31                         vdd-supply = <&hdmi_vdd_reg>;
  32                         pll-supply = <&hdmi_pll_reg>;
  33
  34                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  35                         nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
  36                                 GPIO_ACTIVE_HIGH>;
  37                 };
  38         };
  39
  40         pinmux@70000014 {
  41                 pinctrl-names = "default";
  42                 pinctrl-0 = <&state_default>;
  43
  44                 state_default: pinmux {
  45                         ata {
  46                                 nvidia,pins = "ata", "atc", "atd", "ate",
  47                                         "dap2", "gmb", "gmc", "gmd", "spia",
  48                                         "spib", "spic", "spid", "spie";
  49                                 nvidia,function = "gmi";
  50                         };
  51                         atb {
  52                                 nvidia,pins = "atb", "gma", "gme";
  53                                 nvidia,function = "sdio4";
  54                         };
  55                         cdev1 {
  56                                 nvidia,pins = "cdev1";
  57                                 nvidia,function = "plla_out";
  58                         };
  59                         cdev2 {
  60                                 nvidia,pins = "cdev2";
  61                                 nvidia,function = "pllp_out4";
  62                         };
  63                         crtp {
  64                                 nvidia,pins = "crtp";
  65                                 nvidia,function = "crt";
  66                         };
  67                         csus {
  68                                 nvidia,pins = "csus";
  69                                 nvidia,function = "pllc_out1";
  70                         };
  71                         dap1 {
  72                                 nvidia,pins = "dap1";
  73                                 nvidia,function = "dap1";
  74                         };
  75                         dap3 {
  76                                 nvidia,pins = "dap3";
  77                                 nvidia,function = "dap3";
  78                         };
  79                         dap4 {
  80                                 nvidia,pins = "dap4";
  81                                 nvidia,function = "dap4";
  82                         };
  83                         ddc {
  84                                 nvidia,pins = "ddc";
  85                                 nvidia,function = "i2c2";
  86                         };
  87                         dta {
  88                                 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
  89                                 nvidia,function = "rsvd1";
  90                         };
  91                         dtf {
  92                                 nvidia,pins = "dtf";
  93                                 nvidia,function = "i2c3";
  94                         };
  95                         gpu {
  96                                 nvidia,pins = "gpu", "sdb", "sdd";
  97                                 nvidia,function = "pwm";
  98                         };
  99                         gpu7 {
 100                                 nvidia,pins = "gpu7";
 101                                 nvidia,function = "rtck";
 102                         };
 103                         gpv {
 104                                 nvidia,pins = "gpv", "slxa", "slxk";
 105                                 nvidia,function = "pcie";
 106                         };
 107                         hdint {
 108                                 nvidia,pins = "hdint", "pta";
 109                                 nvidia,function = "hdmi";
 110                         };
 111                         i2cp {
 112                                 nvidia,pins = "i2cp";
 113                                 nvidia,function = "i2cp";
 114                         };
 115                         irrx {
 116                                 nvidia,pins = "irrx", "irtx";
 117                                 nvidia,function = "uarta";
 118                         };
 119                         kbca {
 120                                 nvidia,pins = "kbca", "kbcc", "kbce", "kbcf";
 121                                 nvidia,function = "kbc";
 122                         };
 123                         kbcb {
 124                                 nvidia,pins = "kbcb", "kbcd";
 125                                 nvidia,function = "sdio2";
 126                         };
 127                         lcsn {
 128                                 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
 129                                         "ld3", "ld4", "ld5", "ld6", "ld7",
 130                                         "ld8", "ld9", "ld10", "ld11", "ld12",
 131                                         "ld13", "ld14", "ld15", "ld16", "ld17",
 132                                         "ldc", "ldi", "lhp0", "lhp1", "lhp2",
 133                                         "lhs", "lm0", "lm1", "lpp", "lpw0",
 134                                         "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
 135                                         "lsda", "lsdi", "lspi", "lvp0", "lvp1",
 136                                         "lvs";
 137                                 nvidia,function = "displaya";
 138                         };
 139                         owc {
 140                                 nvidia,pins = "owc";
 141                                 nvidia,function = "owr";
 142                         };
 143                         pmc {
 144                                 nvidia,pins = "pmc";
 145                                 nvidia,function = "pwr_on";
 146                         };
 147                         rm {
 148                                 nvidia,pins = "rm";
 149                                 nvidia,function = "i2c1";
 150                         };
 151                         sdc {
 152                                 nvidia,pins = "sdc";
 153                                 nvidia,function = "twc";
 154                         };
 155                         sdio1 {
 156                                 nvidia,pins = "sdio1";
 157                                 nvidia,function = "sdio1";
 158                         };
 159                         slxc {
 160                                 nvidia,pins = "slxc", "slxd";
 161                                 nvidia,function = "spi4";
 162                         };
 163                         spdi {
 164                                 nvidia,pins = "spdi", "spdo";
 165                                 nvidia,function = "rsvd2";
 166                         };
 167                         spif {
 168                                 nvidia,pins = "spif", "uac";
 169                                 nvidia,function = "rsvd4";
 170                         };
 171                         spig {
 172                                 nvidia,pins = "spig", "spih";
 173                                 nvidia,function = "spi2_alt";
 174                         };
 175                         uaa {
 176                                 nvidia,pins = "uaa", "uab", "uda";
 177                                 nvidia,function = "ulpi";
 178                         };
 179                         uad {
 180                                 nvidia,pins = "uad";
 181                                 nvidia,function = "spdif";
 182                         };
 183                         uca {
 184                                 nvidia,pins = "uca", "ucb";
 185                                 nvidia,function = "uartc";
 186                         };
 187                         conf_ata {
 188                                 nvidia,pins = "ata", "atb", "atc", "atd", "ate",
 189                                         "cdev1", "cdev2", "dap1", "dap2", "dtf",
 190                                         "gma", "gmb", "gmc", "gmd", "gme",
 191                                         "gpu", "gpu7", "gpv", "i2cp", "pta",
 192                                         "rm", "sdio1", "slxk", "spdo", "uac",
 193                                         "uda";
 194                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 195                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 196                         };
 197                         conf_ck32 {
 198                                 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
 199                                         "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
 200                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 201                         };
 202                         conf_crtp {
 203                                 nvidia,pins = "crtp", "dap3", "dap4", "dtb",
 204                                         "dtc", "dte", "slxa", "slxc", "slxd",
 205                                         "spdi";
 206                                 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
 207                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 208                         };
 209                         conf_csus {
 210                                 nvidia,pins = "csus", "spia", "spib", "spid",
 211                                         "spif";
 212                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 213                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 214                         };
 215                         conf_ddc {
 216                                 nvidia,pins = "ddc", "irrx", "irtx", "kbca",
 217                                         "kbcb", "kbcc", "kbcd", "kbce", "kbcf",
 218                                         "spic", "spig", "uaa", "uab";
 219                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 220                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 221                         };
 222                         conf_dta {
 223                                 nvidia,pins = "dta", "dtd", "owc", "sdc", "sdd",
 224                                         "spie", "spih", "uad", "uca", "ucb";
 225                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 226                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 227                         };
 228                         conf_hdint {
 229                                 nvidia,pins = "hdint", "ld0", "ld1", "ld2",
 230                                         "ld3", "ld4", "ld5", "ld6", "ld7",
 231                                         "ld8", "ld9", "ld10", "ld11", "ld12",
 232                                         "ld13", "ld14", "ld15", "ld16", "ld17",
 233                                         "ldc", "ldi", "lhs", "lsc0", "lspi",
 234                                         "lvs", "pmc";
 235                                 nvidia,tristate = <TEGRA_PIN_DISABLE>;
 236                         };
 237                         conf_lc {
 238                                 nvidia,pins = "lc", "ls";
 239                                 nvidia,pull = <TEGRA_PIN_PULL_UP>;
 240                         };
 241                         conf_lcsn {
 242                                 nvidia,pins = "lcsn", "lhp0", "lhp1", "lhp2",
 243                                         "lm0", "lm1", "lpp", "lpw0", "lpw1",
 244                                         "lpw2", "lsc1", "lsck", "lsda", "lsdi",
 245                                         "lvp0", "lvp1", "sdb";
 246                                 nvidia,tristate = <TEGRA_PIN_ENABLE>;
 247                         };
 248                         conf_ld17_0 {
 249                                 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
 250                                         "ld23_22";
 251                                 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
 252                         };
 253                 };
 254         };
 255
 256         i2s@70002800 {
 257                 status = "okay";
 258         };
 259
 260         serial@70006000 {
 261                 status = "okay";
 262         };
 263
 264         serial@70006200 {
 265                 status = "okay";
 266         };
 267
 268         pwm: pwm@7000a000 {
 269                 status = "okay";
 270         };
 271
 272         lvds_ddc: i2c@7000c000 {
 273                 status = "okay";
 274                 clock-frequency = <400000>;
 275
 276                 alc5632: alc5632@1e {
 277                         compatible = "realtek,alc5632";
 278                         reg = <0x1e>;
 279                         gpio-controller;
 280                         #gpio-cells = <2>;
 281                 };
 282         };
 283
 284         hdmi_ddc: i2c@7000c400 {
 285                 status = "okay";
 286                 clock-frequency = <100000>;
 287         };
 288
 289         nvec@7000c500 {
 290                 compatible = "nvidia,nvec";
 291                 reg = <0x7000c500 0x100>;
 292                 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
 293                 #address-cells = <1>;
 294                 #size-cells = <0>;
 295                 clock-frequency = <80000>;
 296                 request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
 297                 slave-addr = <138>;
 298                 clocks = <&tegra_car TEGRA20_CLK_I2C3>,
 299                          <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
 300                 clock-names = "div-clk", "fast-clk";
 301                 resets = <&tegra_car 67>;
 302                 reset-names = "i2c";
 303         };
 304
 305         i2c@7000d000 {
 306                 status = "okay";
 307                 clock-frequency = <400000>;
 308
 309                 pmic: tps6586x@34 {
 310                         compatible = "ti,tps6586x";
 311                         reg = <0x34>;
 312                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
 313
 314                         #gpio-cells = <2>;
 315                         gpio-controller;
 316
 317                         sys-supply = <&p5valw_reg>;
 318                         vin-sm0-supply = <&sys_reg>;
 319                         vin-sm1-supply = <&sys_reg>;
 320                         vin-sm2-supply = <&sys_reg>;
 321                         vinldo01-supply = <&sm2_reg>;
 322                         vinldo23-supply = <&sm2_reg>;
 323                         vinldo4-supply = <&sm2_reg>;
 324                         vinldo678-supply = <&sm2_reg>;
 325                         vinldo9-supply = <&sm2_reg>;
 326
 327                         regulators {
 328                                 sys_reg: sys {
 329                                         regulator-name = "vdd_sys";
 330                                         regulator-always-on;
 331                                 };
 332
 333                                 sm0 {
 334                                         regulator-name = "+1.2vs_sm0,vdd_core";
 335                                         regulator-min-microvolt = <1200000>;
 336                                         regulator-max-microvolt = <1200000>;
 337                                         regulator-always-on;
 338                                 };
 339
 340                                 sm1 {
 341                                         regulator-name = "+1.0vs_sm1,vdd_cpu";
 342                                         regulator-min-microvolt = <1000000>;
 343                                         regulator-max-microvolt = <1000000>;
 344                                         regulator-always-on;
 345                                 };
 346
 347                                 sm2_reg: sm2 {
 348                                         regulator-name = "+3.7vs_sm2,vin_ldo*";
 349                                         regulator-min-microvolt = <3700000>;
 350                                         regulator-max-microvolt = <3700000>;
 351                                         regulator-always-on;
 352                                 };
 353
 354                                 /* LDO0 is not connected to anything */
 355
 356                                 ldo1 {
 357                                         regulator-name = "+1.1vs_ldo1,avdd_pll*";
 358                                         regulator-min-microvolt = <1100000>;
 359                                         regulator-max-microvolt = <1100000>;
 360                                         regulator-always-on;
 361                                 };
 362
 363                                 ldo2 {
 364                                         regulator-name = "+1.2vs_ldo2,vdd_rtc";
 365                                         regulator-min-microvolt = <1200000>;
 366                                         regulator-max-microvolt = <1200000>;
 367                                 };
 368
 369                                 ldo3 {
 370                                         regulator-name = "+3.3vs_ldo3,avdd_usb*";
 371                                         regulator-min-microvolt = <3300000>;
 372                                         regulator-max-microvolt = <3300000>;
 373                                         regulator-always-on;
 374                                 };
 375
 376                                 ldo4 {
 377                                         regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys";
 378                                         regulator-min-microvolt = <1800000>;
 379                                         regulator-max-microvolt = <1800000>;
 380                                         regulator-always-on;
 381                                 };
 382
 383                                 ldo5 {
 384                                         regulator-name = "+2.85vs_ldo5,vcore_mmc";
 385                                         regulator-min-microvolt = <2850000>;
 386                                         regulator-max-microvolt = <2850000>;
 387                                         regulator-always-on;
 388                                 };
 389
 390                                 ldo6 {
 391                                         /*
 392                                          * Research indicates this should be
 393                                          * 1.8v; other boards that use this
 394                                          * rail for the same purpose need it
 395                                          * set to 1.8v. The schematic signal
 396                                          * name is incorrect; perhaps copied
 397                                          * from an incorrect NVIDIA reference.
 398                                          */
 399                                         regulator-name = "+2.85vs_ldo6,avdd_vdac";
 400                                         regulator-min-microvolt = <1800000>;
 401                                         regulator-max-microvolt = <1800000>;
 402                                 };
 403
 404                                 hdmi_vdd_reg: ldo7 {
 405                                         regulator-name = "+3.3vs_ldo7,avdd_hdmi";
 406                                         regulator-min-microvolt = <3300000>;
 407                                         regulator-max-microvolt = <3300000>;
 408                                 };
 409
 410                                 hdmi_pll_reg: ldo8 {
 411                                         regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll";
 412                                         regulator-min-microvolt = <1800000>;
 413                                         regulator-max-microvolt = <1800000>;
 414                                 };
 415
 416                                 ldo9 {
 417                                         regulator-name = "+2.85vs_ldo9,vdd_ddr_rx";
 418                                         regulator-min-microvolt = <2850000>;
 419                                         regulator-max-microvolt = <2850000>;
 420                                         regulator-always-on;
 421                                 };
 422
 423                                 ldo_rtc {
 424                                         regulator-name = "+3.3vs_rtc";
 425                                         regulator-min-microvolt = <3300000>;
 426                                         regulator-max-microvolt = <3300000>;
 427                                         regulator-always-on;
 428                                 };
 429                         };
 430                 };
 431
 432                 adt7461@4c {
 433                         compatible = "adi,adt7461";
 434                         reg = <0x4c>;
 435                 };
 436         };
 437
 438         pmc@7000e400 {
 439                 nvidia,invert-interrupt;
 440                 nvidia,suspend-mode = <1>;
 441                 nvidia,cpu-pwr-good-time = <2000>;
 442                 nvidia,cpu-pwr-off-time = <0>;
 443                 nvidia,core-pwr-good-time = <3845 3845>;
 444                 nvidia,core-pwr-off-time = <0>;
 445                 nvidia,sys-clock-req-active-high;
 446         };
 447
 448         usb@c5000000 {
 449                 status = "okay";
 450         };
 451
 452         usb-phy@c5000000 {
 453                 status = "okay";
 454         };
 455
 456         usb@c5004000 {
 457                 status = "okay";
 458                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
 459                         GPIO_ACTIVE_LOW>;
 460         };
 461
 462         usb-phy@c5004000 {
 463                 status = "okay";
 464                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
 465                         GPIO_ACTIVE_LOW>;
 466         };
 467
 468         usb@c5008000 {
 469                 status = "okay";
 470         };
 471
 472         usb-phy@c5008000 {
 473                 status = "okay";
 474         };
 475
 476         sdhci@c8000000 {
 477                 status = "okay";
 478                 cd-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_LOW>;
 479                 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
 480                 power-gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
 481                 bus-width = <4>;
 482         };
 483
 484         sdhci@c8000600 {
 485                 status = "okay";
 486                 bus-width = <8>;
 487                 non-removable;
 488         };
 489
 490         backlight: backlight {
 491                 compatible = "pwm-backlight";
 492
 493                 enable-gpios = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
 494                 pwms = <&pwm 0 5000000>;
 495
 496                 brightness-levels = <0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 255>;
 497                 default-brightness-level = <10>;
 498
 499                 backlight-boot-off;
 500         };
 501
 502         clocks {
 503                 compatible = "simple-bus";
 504                 #address-cells = <1>;
 505                 #size-cells = <0>;
 506
 507                 clk32k_in: clock@0 {
 508                         compatible = "fixed-clock";
 509                         reg=<0>;
 510                         #clock-cells = <0>;
 511                         clock-frequency = <32768>;
 512                 };
 513         };
 514
 515         gpio-keys {
 516                 compatible = "gpio-keys";
 517
 518                 power {
 519                         label = "Power";
 520                         gpios = <&gpio TEGRA_GPIO(J, 7) GPIO_ACTIVE_LOW>;
 521                         linux,code = <KEY_POWER>;
 522                         gpio-key,wakeup;
 523                 };
 524         };
 525
 526         gpio-leds {
 527                 compatible = "gpio-leds";
 528
 529                 wifi {
 530                         label = "wifi-led";
 531                         gpios = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
 532                         linux,default-trigger = "rfkill0";
 533                 };
 534         };
 535
 536         panel: panel {
 537                 compatible = "samsung,ltn101nt05", "simple-panel";
 538
 539                 ddc-i2c-bus = <&lvds_ddc>;
 540                 power-supply = <&vdd_pnl_reg>;
 541                 enable-gpios = <&gpio TEGRA_GPIO(M, 6) GPIO_ACTIVE_HIGH>;
 542
 543                 backlight = <&backlight>;
 544         };
 545
 546         regulators {
 547                 compatible = "simple-bus";
 548                 #address-cells = <1>;
 549                 #size-cells = <0>;
 550
 551                 p5valw_reg: regulator@0 {
 552                         compatible = "regulator-fixed";
 553                         reg = <0>;
 554                         regulator-name = "+5valw";
 555                         regulator-min-microvolt = <5000000>;
 556                         regulator-max-microvolt = <5000000>;
 557                         regulator-always-on;
 558                 };
 559
 560                 vdd_pnl_reg: regulator@1 {
 561                         compatible = "regulator-fixed";
 562                         reg = <1>;
 563                         regulator-name = "+3VS,vdd_pnl";
 564                         regulator-min-microvolt = <3300000>;
 565                         regulator-max-microvolt = <3300000>;
 566                         gpio = <&gpio TEGRA_GPIO(A, 4) GPIO_ACTIVE_HIGH>;
 567                         enable-active-high;
 568                 };
 569         };
 570
 571         sound {
 572                 compatible = "nvidia,tegra-audio-alc5632-paz00",
 573                         "nvidia,tegra-audio-alc5632";
 574
 575                 nvidia,model = "Compal PAZ00";
 576
 577                 nvidia,audio-routing =
 578                         "Int Spk", "SPKOUT",
 579                         "Int Spk", "SPKOUTN",
 580                         "Headset Mic", "MICBIAS1",
 581                         "MIC1", "Headset Mic",
 582                         "Headset Stereophone", "HPR",
 583                         "Headset Stereophone", "HPL",
 584                         "DMICDAT", "Digital Mic";
 585
 586                 nvidia,audio-codec = <&alc5632>;
 587                 nvidia,i2s-controller = <&tegra_i2s1>;
 588                 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
 589                         GPIO_ACTIVE_HIGH>;
 590
 591                 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
 592                          <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
 593                          <&tegra_car TEGRA20_CLK_CDEV1>;
 594                 clock-names = "pll_a", "pll_a_out0", "mclk";
 595         };
 596 };