arch/arm/boot/dts/tegra20-trimslice.dts

   1 /dts-v1/;
   2
   3 #include "tegra20.dtsi"
   4
   5 / {
   6         model = "Compulab TrimSlice board";
   7         compatible = "compulab,trimslice", "nvidia,tegra20";
   8
   9         memory {
  10                 reg = <0x00000000 0x40000000>;
  11         };
  12
  13         host1x {
  14                 hdmi {
  15                         status = "okay";
  16
  17                         vdd-supply = <&hdmi_vdd_reg>;
  18                         pll-supply = <&hdmi_pll_reg>;
  19
  20                         nvidia,ddc-i2c-bus = <&hdmi_ddc>;
  21                         nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
  22                                 GPIO_ACTIVE_HIGH>;
  23                 };
  24         };
  25
  26         pinmux {
  27                 pinctrl-names = "default";
  28                 pinctrl-0 = <&state_default>;
  29
  30                 state_default: pinmux {
  31                         ata {
  32                                 nvidia,pins = "ata";
  33                                 nvidia,function = "ide";
  34                         };
  35                         atb {
  36                                 nvidia,pins = "atb", "gma";
  37                                 nvidia,function = "sdio4";
  38                         };
  39                         atc {
  40                                 nvidia,pins = "atc", "gmb";
  41                                 nvidia,function = "nand";
  42                         };
  43                         atd {
  44                                 nvidia,pins = "atd", "ate", "gme", "pta";
  45                                 nvidia,function = "gmi";
  46                         };
  47                         cdev1 {
  48                                 nvidia,pins = "cdev1";
  49                                 nvidia,function = "plla_out";
  50                         };
  51                         cdev2 {
  52                                 nvidia,pins = "cdev2";
  53                                 nvidia,function = "pllp_out4";
  54                         };
  55                         crtp {
  56                                 nvidia,pins = "crtp";
  57                                 nvidia,function = "crt";
  58                         };
  59                         csus {
  60                                 nvidia,pins = "csus";
  61                                 nvidia,function = "vi_sensor_clk";
  62                         };
  63                         dap1 {
  64                                 nvidia,pins = "dap1";
  65                                 nvidia,function = "dap1";
  66                         };
  67                         dap2 {
  68                                 nvidia,pins = "dap2";
  69                                 nvidia,function = "dap2";
  70                         };
  71                         dap3 {
  72                                 nvidia,pins = "dap3";
  73                                 nvidia,function = "dap3";
  74                         };
  75                         dap4 {
  76                                 nvidia,pins = "dap4";
  77                                 nvidia,function = "dap4";
  78                         };
  79                         ddc {
  80                                 nvidia,pins = "ddc";
  81                                 nvidia,function = "i2c2";
  82                         };
  83                         dta {
  84                                 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
  85                                 nvidia,function = "vi";
  86                         };
  87                         dtf {
  88                                 nvidia,pins = "dtf";
  89                                 nvidia,function = "i2c3";
  90                         };
  91                         gmc {
  92                                 nvidia,pins = "gmc", "gmd";
  93                                 nvidia,function = "sflash";
  94                         };
  95                         gpu {
  96                                 nvidia,pins = "gpu";
  97                                 nvidia,function = "uarta";
  98                         };
  99                         gpu7 {
 100                                 nvidia,pins = "gpu7";
 101                                 nvidia,function = "rtck";
 102                         };
 103                         gpv {
 104                                 nvidia,pins = "gpv", "slxa", "slxk";
 105                                 nvidia,function = "pcie";
 106                         };
 107                         hdint {
 108                                 nvidia,pins = "hdint";
 109                                 nvidia,function = "hdmi";
 110                         };
 111                         i2cp {
 112                                 nvidia,pins = "i2cp";
 113                                 nvidia,function = "i2cp";
 114                         };
 115                         irrx {
 116                                 nvidia,pins = "irrx", "irtx";
 117                                 nvidia,function = "uartb";
 118                         };
 119                         kbca {
 120                                 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
 121                                         "kbce", "kbcf";
 122                                 nvidia,function = "kbc";
 123                         };
 124                         lcsn {
 125                                 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
 126                                         "ld3", "ld4", "ld5", "ld6", "ld7",
 127                                         "ld8", "ld9", "ld10", "ld11", "ld12",
 128                                         "ld13", "ld14", "ld15", "ld16", "ld17",
 129                                         "ldc", "ldi", "lhp0", "lhp1", "lhp2",
 130                                         "lhs", "lm0", "lm1", "lpp", "lpw0",
 131                                         "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
 132                                         "lsda", "lsdi", "lspi", "lvp0", "lvp1",
 133                                         "lvs";
 134                                 nvidia,function = "displaya";
 135                         };
 136                         owc {
 137                                 nvidia,pins = "owc", "uac";
 138                                 nvidia,function = "rsvd2";
 139                         };
 140                         pmc {
 141                                 nvidia,pins = "pmc";
 142                                 nvidia,function = "pwr_on";
 143                         };
 144                         rm {
 145                                 nvidia,pins = "rm";
 146                                 nvidia,function = "i2c1";
 147                         };
 148                         sdb {
 149                                 nvidia,pins = "sdb", "sdc", "sdd";
 150                                 nvidia,function = "pwm";
 151                         };
 152                         sdio1 {
 153                                 nvidia,pins = "sdio1";
 154                                 nvidia,function = "sdio1";
 155                         };
 156                         slxc {
 157                                 nvidia,pins = "slxc", "slxd";
 158                                 nvidia,function = "sdio3";
 159                         };
 160                         spdi {
 161                                 nvidia,pins = "spdi", "spdo";
 162                                 nvidia,function = "spdif";
 163                         };
 164                         spia {
 165                                 nvidia,pins = "spia", "spib", "spic";
 166                                 nvidia,function = "spi2";
 167                         };
 168                         spid {
 169                                 nvidia,pins = "spid", "spie", "spif";
 170                                 nvidia,function = "spi1";
 171                         };
 172                         spig {
 173                                 nvidia,pins = "spig", "spih";
 174                                 nvidia,function = "spi2_alt";
 175                         };
 176                         uaa {
 177                                 nvidia,pins = "uaa", "uab", "uda";
 178                                 nvidia,function = "ulpi";
 179                         };
 180                         uad {
 181                                 nvidia,pins = "uad";
 182                                 nvidia,function = "irda";
 183                         };
 184                         uca {
 185                                 nvidia,pins = "uca", "ucb";
 186                                 nvidia,function = "uartc";
 187                         };
 188                         conf_ata {
 189                                 nvidia,pins = "ata", "atc", "atd", "ate",
 190                                         "crtp", "dap2", "dap3", "dap4", "dta",
 191                                         "dtb", "dtc", "dtd", "dte", "gmb",
 192                                         "gme", "i2cp", "pta", "slxc", "slxd",
 193                                         "spdi", "spdo", "uda";
 194                                 nvidia,pull = <0>;
 195                                 nvidia,tristate = <1>;
 196                         };
 197                         conf_atb {
 198                                 nvidia,pins = "atb", "cdev1", "cdev2", "dap1",
 199                                         "gma", "gmc", "gmd", "gpu", "gpu7",
 200                                         "gpv", "sdio1", "slxa", "slxk", "uac";
 201                                 nvidia,pull = <0>;
 202                                 nvidia,tristate = <0>;
 203                         };
 204                         conf_ck32 {
 205                                 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
 206                                         "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
 207                                 nvidia,pull = <0>;
 208                         };
 209                         conf_csus {
 210                                 nvidia,pins = "csus", "spia", "spib",
 211                                         "spid", "spif";
 212                                 nvidia,pull = <1>;
 213                                 nvidia,tristate = <1>;
 214                         };
 215                         conf_ddc {
 216                                 nvidia,pins = "ddc", "dtf", "rm", "sdc", "sdd";
 217                                 nvidia,pull = <2>;
 218                                 nvidia,tristate = <0>;
 219                         };
 220                         conf_hdint {
 221                                 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
 222                                         "lpw1", "lsc1", "lsck", "lsda", "lsdi",
 223                                         "lvp0", "pmc";
 224                                 nvidia,tristate = <1>;
 225                         };
 226                         conf_irrx {
 227                                 nvidia,pins = "irrx", "irtx", "kbca", "kbcb",
 228                                         "kbcc", "kbcd", "kbce", "kbcf", "owc",
 229                                         "spic", "spie", "spig", "spih", "uaa",
 230                                         "uab", "uad", "uca", "ucb";
 231                                 nvidia,pull = <2>;
 232                                 nvidia,tristate = <1>;
 233                         };
 234                         conf_lc {
 235                                 nvidia,pins = "lc", "ls";
 236                                 nvidia,pull = <2>;
 237                         };
 238                         conf_ld0 {
 239                                 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
 240                                         "ld5", "ld6", "ld7", "ld8", "ld9",
 241                                         "ld10", "ld11", "ld12", "ld13", "ld14",
 242                                         "ld15", "ld16", "ld17", "ldi", "lhp0",
 243                                         "lhp1", "lhp2", "lhs", "lm0", "lpp",
 244                                         "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
 245                                         "lvs", "sdb";
 246                                 nvidia,tristate = <0>;
 247                         };
 248                         conf_ld17_0 {
 249                                 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
 250                                         "ld23_22";
 251                                 nvidia,pull = <1>;
 252                         };
 253                         conf_spif {
 254                                 nvidia,pins = "spif";
 255                                 nvidia,pull = <1>;
 256                                 nvidia,tristate = <0>;
 257                         };
 258                 };
 259         };
 260
 261         i2s@70002800 {
 262                 status = "okay";
 263         };
 264
 265         serial@70006000 {
 266                 status = "okay";
 267         };
 268
 269         dvi_ddc: i2c@7000c000 {
 270                 status = "okay";
 271                 clock-frequency = <100000>;
 272         };
 273
 274         spi@7000c380 {
 275                 status = "okay";
 276                 spi-max-frequency = <48000000>;
 277                 spi-flash@0 {
 278                         compatible = "winbond,w25q80bl";
 279                         reg = <0>;
 280                         spi-max-frequency = <48000000>;
 281                 };
 282         };
 283
 284         hdmi_ddc: i2c@7000c400 {
 285                 status = "okay";
 286                 clock-frequency = <100000>;
 287         };
 288
 289         i2c@7000c500 {
 290                 status = "okay";
 291                 clock-frequency = <400000>;
 292
 293                 codec: codec@1a {
 294                         compatible = "ti,tlv320aic23";
 295                         reg = <0x1a>;
 296                 };
 297
 298                 rtc@56 {
 299                         compatible = "emmicro,em3027";
 300                         reg = <0x56>;
 301                 };
 302         };
 303
 304         pmc {
 305                 nvidia,suspend-mode = <2>;
 306                 nvidia,cpu-pwr-good-time = <5000>;
 307                 nvidia,cpu-pwr-off-time = <5000>;
 308                 nvidia,core-pwr-good-time = <3845 3845>;
 309                 nvidia,core-pwr-off-time = <3875>;
 310                 nvidia,sys-clock-req-active-high;
 311         };
 312
 313         usb@c5000000 {
 314                 status = "okay";
 315         };
 316
 317         usb-phy@c5000000 {
 318                 status = "okay";
 319                 vbus-supply = <&vbus_reg>;
 320         };
 321
 322         usb@c5004000 {
 323                 status = "okay";
 324                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
 325                         GPIO_ACTIVE_LOW>;
 326         };
 327
 328         usb-phy@c5004000 {
 329                 status = "okay";
 330                 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
 331                         GPIO_ACTIVE_LOW>;
 332         };
 333
 334         usb@c5008000 {
 335                 status = "okay";
 336         };
 337
 338         usb-phy@c5008000 {
 339                 status = "okay";
 340         };
 341
 342         sdhci@c8000000 {
 343                 status = "okay";
 344                 bus-width = <4>;
 345         };
 346
 347         sdhci@c8000600 {
 348                 status = "okay";
 349                 cd-gpios = <&gpio TEGRA_GPIO(P, 1) GPIO_ACTIVE_LOW>;
 350                 wp-gpios = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
 351                 bus-width = <4>;
 352         };
 353
 354         clocks {
 355                 compatible = "simple-bus";
 356                 #address-cells = <1>;
 357                 #size-cells = <0>;
 358
 359                 clk32k_in: clock {
 360                         compatible = "fixed-clock";
 361                         reg=<0>;
 362                         #clock-cells = <0>;
 363                         clock-frequency = <32768>;
 364                 };
 365         };
 366
 367         gpio-keys {
 368                 compatible = "gpio-keys";
 369
 370                 power {
 371                         label = "Power";
 372                         gpios = <&gpio TEGRA_GPIO(X, 6) GPIO_ACTIVE_LOW>;
 373                         linux,code = <116>; /* KEY_POWER */
 374                         gpio-key,wakeup;
 375                 };
 376         };
 377
 378         poweroff {
 379                 compatible = "gpio-poweroff";
 380                 gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
 381         };
 382
 383         regulators {
 384                 compatible = "simple-bus";
 385                 #address-cells = <1>;
 386                 #size-cells = <0>;
 387
 388                 hdmi_vdd_reg: regulator@0 {
 389                         compatible = "regulator-fixed";
 390                         reg = <0>;
 391                         regulator-name = "avdd_hdmi";
 392                         regulator-min-microvolt = <3300000>;
 393                         regulator-max-microvolt = <3300000>;
 394                         regulator-always-on;
 395                 };
 396
 397                 hdmi_pll_reg: regulator@1 {
 398                         compatible = "regulator-fixed";
 399                         reg = <1>;
 400                         regulator-name = "avdd_hdmi_pll";
 401                         regulator-min-microvolt = <1800000>;
 402                         regulator-max-microvolt = <1800000>;
 403                         regulator-always-on;
 404                 };
 405
 406                 vbus_reg: regulator@2 {
 407                         compatible = "regulator-fixed";
 408                         reg = <2>;
 409                         regulator-name = "usb1_vbus";
 410                         regulator-min-microvolt = <5000000>;
 411                         regulator-max-microvolt = <5000000>;
 412                         enable-active-high;
 413                         gpio = <&gpio 170 0>; /* PV2 */
 414                 };
 415         };
 416
 417         sound {
 418                 compatible = "nvidia,tegra-audio-trimslice";
 419                 nvidia,i2s-controller = <&tegra_i2s1>;
 420                 nvidia,audio-codec = <&codec>;
 421
 422                 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
 423                          <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
 424                          <&tegra_car TEGRA20_CLK_CDEV1>;
 425                 clock-names = "pll_a", "pll_a_out0", "mclk";
 426         };
 427 };