ARM: dts: vf610: Add USB PHY and controller
[deliverable/linux.git] / arch / arm / boot / dts / vf610.dtsi
1 /*
2 * Copyright 2013 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10 #include "skeleton.dtsi"
11 #include "vf610-pinfunc.h"
12 #include <dt-bindings/clock/vf610-clock.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14
15 / {
16 aliases {
17 can0 = &can0;
18 can1 = &can1;
19 serial0 = &uart0;
20 serial1 = &uart1;
21 serial2 = &uart2;
22 serial3 = &uart3;
23 serial4 = &uart4;
24 serial5 = &uart5;
25 gpio0 = &gpio1;
26 gpio1 = &gpio2;
27 gpio2 = &gpio3;
28 gpio3 = &gpio4;
29 gpio4 = &gpio5;
30 usbphy0 = &usbphy0;
31 usbphy1 = &usbphy1;
32 };
33
34 cpus {
35 #address-cells = <1>;
36 #size-cells = <0>;
37
38 cpu@0 {
39 compatible = "arm,cortex-a5";
40 device_type = "cpu";
41 reg = <0x0>;
42 next-level-cache = <&L2>;
43 };
44 };
45
46 clocks {
47 #address-cells = <1>;
48 #size-cells = <0>;
49
50 sxosc {
51 compatible = "fixed-clock";
52 #clock-cells = <0>;
53 clock-frequency = <32768>;
54 };
55
56 fxosc {
57 compatible = "fixed-clock";
58 #clock-cells = <0>;
59 clock-frequency = <24000000>;
60 };
61 };
62
63 soc {
64 #address-cells = <1>;
65 #size-cells = <1>;
66 compatible = "simple-bus";
67 interrupt-parent = <&intc>;
68 ranges;
69
70 aips0: aips-bus@40000000 {
71 compatible = "fsl,aips-bus", "simple-bus";
72 #address-cells = <1>;
73 #size-cells = <1>;
74 interrupt-parent = <&intc>;
75 reg = <0x40000000 0x70000>;
76 ranges;
77
78 intc: interrupt-controller@40002000 {
79 compatible = "arm,cortex-a9-gic";
80 #interrupt-cells = <3>;
81 interrupt-controller;
82 reg = <0x40003000 0x1000>,
83 <0x40002100 0x100>;
84 };
85
86 L2: l2-cache@40006000 {
87 compatible = "arm,pl310-cache";
88 reg = <0x40006000 0x1000>;
89 cache-unified;
90 cache-level = <2>;
91 arm,data-latency = <1 1 1>;
92 arm,tag-latency = <2 2 2>;
93 };
94
95 edma0: dma-controller@40018000 {
96 #dma-cells = <2>;
97 compatible = "fsl,vf610-edma";
98 reg = <0x40018000 0x2000>,
99 <0x40024000 0x1000>,
100 <0x40025000 0x1000>;
101 interrupts = <0 8 IRQ_TYPE_LEVEL_HIGH>,
102 <0 9 IRQ_TYPE_LEVEL_HIGH>;
103 interrupt-names = "edma-tx", "edma-err";
104 dma-channels = <32>;
105 clock-names = "dmamux0", "dmamux1";
106 clocks = <&clks VF610_CLK_DMAMUX0>,
107 <&clks VF610_CLK_DMAMUX1>;
108 };
109
110 can0: flexcan@40020000 {
111 compatible = "fsl,vf610-flexcan";
112 reg = <0x40020000 0x4000>;
113 interrupts = <0 58 IRQ_TYPE_LEVEL_HIGH>;
114 clocks = <&clks VF610_CLK_FLEXCAN0>,
115 <&clks VF610_CLK_FLEXCAN0>;
116 clock-names = "ipg", "per";
117 status = "disabled";
118 };
119
120 uart0: serial@40027000 {
121 compatible = "fsl,vf610-lpuart";
122 reg = <0x40027000 0x1000>;
123 interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>;
124 clocks = <&clks VF610_CLK_UART0>;
125 clock-names = "ipg";
126 dmas = <&edma0 0 2>,
127 <&edma0 0 3>;
128 dma-names = "rx","tx";
129 status = "disabled";
130 };
131
132 uart1: serial@40028000 {
133 compatible = "fsl,vf610-lpuart";
134 reg = <0x40028000 0x1000>;
135 interrupts = <0 62 IRQ_TYPE_LEVEL_HIGH>;
136 clocks = <&clks VF610_CLK_UART1>;
137 clock-names = "ipg";
138 dmas = <&edma0 0 4>,
139 <&edma0 0 5>;
140 dma-names = "rx","tx";
141 status = "disabled";
142 };
143
144 uart2: serial@40029000 {
145 compatible = "fsl,vf610-lpuart";
146 reg = <0x40029000 0x1000>;
147 interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>;
148 clocks = <&clks VF610_CLK_UART2>;
149 clock-names = "ipg";
150 dmas = <&edma0 0 6>,
151 <&edma0 0 7>;
152 dma-names = "rx","tx";
153 status = "disabled";
154 };
155
156 uart3: serial@4002a000 {
157 compatible = "fsl,vf610-lpuart";
158 reg = <0x4002a000 0x1000>;
159 interrupts = <0 64 IRQ_TYPE_LEVEL_HIGH>;
160 clocks = <&clks VF610_CLK_UART3>;
161 clock-names = "ipg";
162 dmas = <&edma0 0 8>,
163 <&edma0 0 9>;
164 dma-names = "rx","tx";
165 status = "disabled";
166 };
167
168 dspi0: dspi0@4002c000 {
169 #address-cells = <1>;
170 #size-cells = <0>;
171 compatible = "fsl,vf610-dspi";
172 reg = <0x4002c000 0x1000>;
173 interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
174 clocks = <&clks VF610_CLK_DSPI0>;
175 clock-names = "dspi";
176 spi-num-chipselects = <5>;
177 status = "disabled";
178 };
179
180 sai2: sai@40031000 {
181 compatible = "fsl,vf610-sai";
182 reg = <0x40031000 0x1000>;
183 interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
184 clocks = <&clks VF610_CLK_SAI2>;
185 clock-names = "sai";
186 dma-names = "tx", "rx";
187 dmas = <&edma0 0 21>,
188 <&edma0 0 20>;
189 status = "disabled";
190 };
191
192 pit: pit@40037000 {
193 compatible = "fsl,vf610-pit";
194 reg = <0x40037000 0x1000>;
195 interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
196 clocks = <&clks VF610_CLK_PIT>;
197 clock-names = "pit";
198 };
199
200 pwm0: pwm@40038000 {
201 compatible = "fsl,vf610-ftm-pwm";
202 #pwm-cells = <3>;
203 reg = <0x40038000 0x1000>;
204 clock-names = "ftm_sys", "ftm_ext",
205 "ftm_fix", "ftm_cnt_clk_en";
206 clocks = <&clks VF610_CLK_FTM0>,
207 <&clks VF610_CLK_FTM0_EXT_SEL>,
208 <&clks VF610_CLK_FTM0_FIX_SEL>,
209 <&clks VF610_CLK_FTM0_EXT_FIX_EN>;
210 status = "disabled";
211 };
212
213 adc0: adc@4003b000 {
214 compatible = "fsl,vf610-adc";
215 reg = <0x4003b000 0x1000>;
216 interrupts = <0 53 0x04>;
217 clocks = <&clks VF610_CLK_ADC0>;
218 clock-names = "adc";
219 status = "disabled";
220 };
221
222 wdog@4003e000 {
223 compatible = "fsl,vf610-wdt", "fsl,imx21-wdt";
224 reg = <0x4003e000 0x1000>;
225 clocks = <&clks VF610_CLK_WDT>;
226 clock-names = "wdog";
227 };
228
229 qspi0: quadspi@40044000 {
230 #address-cells = <1>;
231 #size-cells = <0>;
232 compatible = "fsl,vf610-qspi";
233 reg = <0x40044000 0x1000>;
234 interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
235 clocks = <&clks VF610_CLK_QSPI0_EN>,
236 <&clks VF610_CLK_QSPI0>;
237 clock-names = "qspi_en", "qspi";
238 status = "disabled";
239 };
240
241 iomuxc: iomuxc@40048000 {
242 compatible = "fsl,vf610-iomuxc";
243 reg = <0x40048000 0x1000>;
244 #gpio-range-cells = <3>;
245 };
246
247 gpio1: gpio@40049000 {
248 compatible = "fsl,vf610-gpio";
249 reg = <0x40049000 0x1000 0x400ff000 0x40>;
250 interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
251 gpio-controller;
252 #gpio-cells = <2>;
253 interrupt-controller;
254 #interrupt-cells = <2>;
255 gpio-ranges = <&iomuxc 0 0 32>;
256 };
257
258 gpio2: gpio@4004a000 {
259 compatible = "fsl,vf610-gpio";
260 reg = <0x4004a000 0x1000 0x400ff040 0x40>;
261 interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
262 gpio-controller;
263 #gpio-cells = <2>;
264 interrupt-controller;
265 #interrupt-cells = <2>;
266 gpio-ranges = <&iomuxc 0 32 32>;
267 };
268
269 gpio3: gpio@4004b000 {
270 compatible = "fsl,vf610-gpio";
271 reg = <0x4004b000 0x1000 0x400ff080 0x40>;
272 interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
273 gpio-controller;
274 #gpio-cells = <2>;
275 interrupt-controller;
276 #interrupt-cells = <2>;
277 gpio-ranges = <&iomuxc 0 64 32>;
278 };
279
280 gpio4: gpio@4004c000 {
281 compatible = "fsl,vf610-gpio";
282 reg = <0x4004c000 0x1000 0x400ff0c0 0x40>;
283 interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
284 gpio-controller;
285 #gpio-cells = <2>;
286 interrupt-controller;
287 #interrupt-cells = <2>;
288 gpio-ranges = <&iomuxc 0 96 32>;
289 };
290
291 gpio5: gpio@4004d000 {
292 compatible = "fsl,vf610-gpio";
293 reg = <0x4004d000 0x1000 0x400ff100 0x40>;
294 interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
295 gpio-controller;
296 #gpio-cells = <2>;
297 interrupt-controller;
298 #interrupt-cells = <2>;
299 gpio-ranges = <&iomuxc 0 128 7>;
300 };
301
302 anatop: anatop@40050000 {
303 compatible = "fsl,vf610-anatop", "syscon";
304 reg = <0x40050000 0x400>;
305 };
306
307 usbphy0: usbphy@40050800 {
308 compatible = "fsl,vf610-usbphy";
309 reg = <0x40050800 0x400>;
310 interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>;
311 clocks = <&clks VF610_CLK_USBPHY0>;
312 fsl,anatop = <&anatop>;
313 };
314
315 usbphy1: usbphy@40050c00 {
316 compatible = "fsl,vf610-usbphy";
317 reg = <0x40050c00 0x400>;
318 interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>;
319 clocks = <&clks VF610_CLK_USBPHY1>;
320 fsl,anatop = <&anatop>;
321 };
322
323 i2c0: i2c@40066000 {
324 #address-cells = <1>;
325 #size-cells = <0>;
326 compatible = "fsl,vf610-i2c";
327 reg = <0x40066000 0x1000>;
328 interrupts =<0 71 IRQ_TYPE_LEVEL_HIGH>;
329 clocks = <&clks VF610_CLK_I2C0>;
330 clock-names = "ipg";
331 dmas = <&edma0 0 50>,
332 <&edma0 0 51>;
333 dma-names = "rx","tx";
334 status = "disabled";
335 };
336
337 clks: ccm@4006b000 {
338 compatible = "fsl,vf610-ccm";
339 reg = <0x4006b000 0x1000>;
340 #clock-cells = <1>;
341 };
342
343 usbdev0: usb@40034000 {
344 compatible = "fsl,vf610-usb", "fsl,imx27-usb";
345 reg = <0x40034000 0x800>;
346 interrupts = <0 75 IRQ_TYPE_LEVEL_HIGH>;
347 clocks = <&clks VF610_CLK_USBC0>;
348 fsl,usbphy = <&usbphy0>;
349 dr_mode = "peripheral";
350 status = "disabled";
351 };
352
353
354 };
355
356 aips1: aips-bus@40080000 {
357 compatible = "fsl,aips-bus", "simple-bus";
358 #address-cells = <1>;
359 #size-cells = <1>;
360 reg = <0x40080000 0x80000>;
361 ranges;
362
363 edma1: dma-controller@40098000 {
364 #dma-cells = <2>;
365 compatible = "fsl,vf610-edma";
366 reg = <0x40098000 0x2000>,
367 <0x400a1000 0x1000>,
368 <0x400a2000 0x1000>;
369 interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>,
370 <0 11 IRQ_TYPE_LEVEL_HIGH>;
371 interrupt-names = "edma-tx", "edma-err";
372 dma-channels = <32>;
373 clock-names = "dmamux0", "dmamux1";
374 clocks = <&clks VF610_CLK_DMAMUX2>,
375 <&clks VF610_CLK_DMAMUX3>;
376 };
377
378 uart4: serial@400a9000 {
379 compatible = "fsl,vf610-lpuart";
380 reg = <0x400a9000 0x1000>;
381 interrupts = <0 65 IRQ_TYPE_LEVEL_HIGH>;
382 clocks = <&clks VF610_CLK_UART4>;
383 clock-names = "ipg";
384 status = "disabled";
385 };
386
387 uart5: serial@400aa000 {
388 compatible = "fsl,vf610-lpuart";
389 reg = <0x400aa000 0x1000>;
390 interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>;
391 clocks = <&clks VF610_CLK_UART5>;
392 clock-names = "ipg";
393 status = "disabled";
394 };
395
396 adc1: adc@400bb000 {
397 compatible = "fsl,vf610-adc";
398 reg = <0x400bb000 0x1000>;
399 interrupts = <0 54 0x04>;
400 clocks = <&clks VF610_CLK_ADC1>;
401 clock-names = "adc";
402 status = "disabled";
403 };
404
405 esdhc1: esdhc@400b2000 {
406 compatible = "fsl,imx53-esdhc";
407 reg = <0x400b2000 0x1000>;
408 interrupts = <0 28 0x04>;
409 clocks = <&clks VF610_CLK_IPG_BUS>,
410 <&clks VF610_CLK_PLATFORM_BUS>,
411 <&clks VF610_CLK_ESDHC1>;
412 clock-names = "ipg", "ahb", "per";
413 status = "disabled";
414 };
415
416 usbh1: usb@400b4000 {
417 compatible = "fsl,vf610-usb", "fsl,imx27-usb";
418 reg = <0x400b4000 0x800>;
419 interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>;
420 clocks = <&clks VF610_CLK_USBC1>;
421 fsl,usbphy = <&usbphy1>;
422 dr_mode = "host";
423 status = "disabled";
424 };
425
426 ftm: ftm@400b8000 {
427 compatible = "fsl,ftm-timer";
428 reg = <0x400b8000 0x1000 0x400b9000 0x1000>;
429 interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
430 clock-names = "ftm-evt", "ftm-src",
431 "ftm-evt-counter-en", "ftm-src-counter-en";
432 clocks = <&clks VF610_CLK_FTM2>,
433 <&clks VF610_CLK_FTM3>,
434 <&clks VF610_CLK_FTM2_EXT_FIX_EN>,
435 <&clks VF610_CLK_FTM3_EXT_FIX_EN>;
436 status = "disabled";
437 };
438
439 fec0: ethernet@400d0000 {
440 compatible = "fsl,mvf600-fec";
441 reg = <0x400d0000 0x1000>;
442 interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>;
443 clocks = <&clks VF610_CLK_ENET0>,
444 <&clks VF610_CLK_ENET0>,
445 <&clks VF610_CLK_ENET>;
446 clock-names = "ipg", "ahb", "ptp";
447 status = "disabled";
448 };
449
450 fec1: ethernet@400d1000 {
451 compatible = "fsl,mvf600-fec";
452 reg = <0x400d1000 0x1000>;
453 interrupts = <0 79 IRQ_TYPE_LEVEL_HIGH>;
454 clocks = <&clks VF610_CLK_ENET1>,
455 <&clks VF610_CLK_ENET1>,
456 <&clks VF610_CLK_ENET>;
457 clock-names = "ipg", "ahb", "ptp";
458 status = "disabled";
459 };
460
461 can1: flexcan@400d4000 {
462 compatible = "fsl,vf610-flexcan";
463 reg = <0x400d4000 0x4000>;
464 interrupts = <0 59 IRQ_TYPE_LEVEL_HIGH>;
465 clocks = <&clks VF610_CLK_FLEXCAN1>,
466 <&clks VF610_CLK_FLEXCAN1>;
467 clock-names = "ipg", "per";
468 status = "disabled";
469 };
470
471 };
472 };
473 };
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