arch/arm/include/asm/mmu_context.h

   1 /*
   2  *  arch/arm/include/asm/mmu_context.h
   3  *
   4  *  Copyright (C) 1996 Russell King.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  *  Changelog:
  11  *   27-06-1996 RMK     Created
  12  */
  13 #ifndef __ASM_ARM_MMU_CONTEXT_H
  14 #define __ASM_ARM_MMU_CONTEXT_H
  15
  16 #include <linux/compiler.h>
  17 #include <linux/sched.h>
  18 #include <asm/cacheflush.h>
  19 #include <asm/cachetype.h>
  20 #include <asm/proc-fns.h>
  21 #include <asm-generic/mm_hooks.h>
  22
  23 void __check_vmalloc_seq(struct mm_struct *mm);
  24
  25 #ifdef CONFIG_CPU_HAS_ASID
  26
  27 void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk);
  28 #define init_new_context(tsk,mm)        ({ atomic64_set(&mm->context.id, 0); 0; })
  29
  30 DECLARE_PER_CPU(atomic64_t, active_asids);
  31
  32 #else   /* !CONFIG_CPU_HAS_ASID */
  33
  34 #ifdef CONFIG_MMU
  35
  36 static inline void check_and_switch_context(struct mm_struct *mm,
  37                                             struct task_struct *tsk)
  38 {
  39         if (unlikely(mm->context.vmalloc_seq != init_mm.context.vmalloc_seq))
  40                 __check_vmalloc_seq(mm);
  41
  42         if (irqs_disabled())
  43                 /*
  44                  * cpu_switch_mm() needs to flush the VIVT caches. To avoid
  45                  * high interrupt latencies, defer the call and continue
  46                  * running with the old mm. Since we only support UP systems
  47                  * on non-ASID CPUs, the old mm will remain valid until the
  48                  * finish_arch_post_lock_switch() call.
  49                  */
  50                 set_ti_thread_flag(task_thread_info(tsk), TIF_SWITCH_MM);
  51         else
  52                 cpu_switch_mm(mm->pgd, mm);
  53 }
  54
  55 #define finish_arch_post_lock_switch \
  56         finish_arch_post_lock_switch
  57 static inline void finish_arch_post_lock_switch(void)
  58 {
  59         if (test_and_clear_thread_flag(TIF_SWITCH_MM)) {
  60                 struct mm_struct *mm = current->mm;
  61                 cpu_switch_mm(mm->pgd, mm);
  62         }
  63 }
  64
  65 #endif  /* CONFIG_MMU */
  66
  67 #define init_new_context(tsk,mm)        0
  68
  69 #endif  /* CONFIG_CPU_HAS_ASID */
  70
  71 #define destroy_context(mm)             do { } while(0)
  72 #define activate_mm(prev,next)          switch_mm(prev, next, NULL)
  73
  74 /*
  75  * This is called when "tsk" is about to enter lazy TLB mode.
  76  *
  77  * mm:  describes the currently active mm context
  78  * tsk: task which is entering lazy tlb
  79  * cpu: cpu number which is entering lazy tlb
  80  *
  81  * tsk->mm will be NULL
  82  */
  83 static inline void
  84 enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
  85 {
  86 }
  87
  88 /*
  89  * This is the actual mm switch as far as the scheduler
  90  * is concerned.  No registers are touched.  We avoid
  91  * calling the CPU specific function when the mm hasn't
  92  * actually changed.
  93  */
  94 static inline void
  95 switch_mm(struct mm_struct *prev, struct mm_struct *next,
  96           struct task_struct *tsk)
  97 {
  98 #ifdef CONFIG_MMU
  99         unsigned int cpu = smp_processor_id();
 100
 101 #ifdef CONFIG_SMP
 102         /* check for possible thread migration */
 103         if (!cpumask_empty(mm_cpumask(next)) &&
 104             !cpumask_test_cpu(cpu, mm_cpumask(next)))
 105                 __flush_icache_all();
 106 #endif
 107         if (!cpumask_test_and_set_cpu(cpu, mm_cpumask(next)) || prev != next) {
 108                 check_and_switch_context(next, tsk);
 109                 if (cache_is_vivt())
 110                         cpumask_clear_cpu(cpu, mm_cpumask(prev));
 111         }
 112 #endif
 113 }
 114
 115 #define deactivate_mm(tsk,mm)   do { } while (0)
 116
 117 #endif