arch/arm/include/asm/outercache.h

   1 /*
   2  * arch/arm/include/asm/outercache.h
   3  *
   4  * Copyright (C) 2010 ARM Ltd.
   5  * Written by Catalin Marinas <catalin.marinas@arm.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19  */
  20
  21 #ifndef __ASM_OUTERCACHE_H
  22 #define __ASM_OUTERCACHE_H
  23
  24 #include <linux/types.h>
  25
  26 struct l2x0_regs;
  27
  28 struct outer_cache_fns {
  29         void (*inv_range)(unsigned long, unsigned long);
  30         void (*clean_range)(unsigned long, unsigned long);
  31         void (*flush_range)(unsigned long, unsigned long);
  32         void (*flush_all)(void);
  33         void (*disable)(void);
  34 #ifdef CONFIG_OUTER_CACHE_SYNC
  35         void (*sync)(void);
  36 #endif
  37         void (*resume)(void);
  38
  39         /* This is an ARM L2C thing */
  40         void (*write_sec)(unsigned long, unsigned);
  41         void (*configure)(const struct l2x0_regs *);
  42 };
  43
  44 extern struct outer_cache_fns outer_cache;
  45
  46 #ifdef CONFIG_OUTER_CACHE
  47 /**
  48  * outer_inv_range - invalidate range of outer cache lines
  49  * @start: starting physical address, inclusive
  50  * @end: end physical address, exclusive
  51  */
  52 static inline void outer_inv_range(phys_addr_t start, phys_addr_t end)
  53 {
  54         if (outer_cache.inv_range)
  55                 outer_cache.inv_range(start, end);
  56 }
  57
  58 /**
  59  * outer_clean_range - clean dirty outer cache lines
  60  * @start: starting physical address, inclusive
  61  * @end: end physical address, exclusive
  62  */
  63 static inline void outer_clean_range(phys_addr_t start, phys_addr_t end)
  64 {
  65         if (outer_cache.clean_range)
  66                 outer_cache.clean_range(start, end);
  67 }
  68
  69 /**
  70  * outer_flush_range - clean and invalidate outer cache lines
  71  * @start: starting physical address, inclusive
  72  * @end: end physical address, exclusive
  73  */
  74 static inline void outer_flush_range(phys_addr_t start, phys_addr_t end)
  75 {
  76         if (outer_cache.flush_range)
  77                 outer_cache.flush_range(start, end);
  78 }
  79
  80 /**
  81  * outer_flush_all - clean and invalidate all cache lines in the outer cache
  82  *
  83  * Note: depending on implementation, this may not be atomic - it must
  84  * only be called with interrupts disabled and no other active outer
  85  * cache masters.
  86  *
  87  * It is intended that this function is only used by implementations
  88  * needing to override the outer_cache.disable() method due to security.
  89  * (Some implementations perform this as a clean followed by an invalidate.)
  90  */
  91 static inline void outer_flush_all(void)
  92 {
  93         if (outer_cache.flush_all)
  94                 outer_cache.flush_all();
  95 }
  96
  97 /**
  98  * outer_disable - clean, invalidate and disable the outer cache
  99  *
 100  * Disable the outer cache, ensuring that any data contained in the outer
 101  * cache is pushed out to lower levels of system memory.  The note and
 102  * conditions above concerning outer_flush_all() applies here.
 103  */
 104 extern void outer_disable(void);
 105
 106 /**
 107  * outer_resume - restore the cache configuration and re-enable outer cache
 108  *
 109  * Restore any configuration that the cache had when previously enabled,
 110  * and re-enable the outer cache.
 111  */
 112 static inline void outer_resume(void)
 113 {
 114         if (outer_cache.resume)
 115                 outer_cache.resume();
 116 }
 117
 118 #else
 119
 120 static inline void outer_inv_range(phys_addr_t start, phys_addr_t end)
 121 { }
 122 static inline void outer_clean_range(phys_addr_t start, phys_addr_t end)
 123 { }
 124 static inline void outer_flush_range(phys_addr_t start, phys_addr_t end)
 125 { }
 126 static inline void outer_flush_all(void) { }
 127 static inline void outer_disable(void) { }
 128 static inline void outer_resume(void) { }
 129
 130 #endif
 131
 132 #ifdef CONFIG_OUTER_CACHE_SYNC
 133 /**
 134  * outer_sync - perform a sync point for outer cache
 135  *
 136  * Ensure that all outer cache operations are complete and any store
 137  * buffers are drained.
 138  */
 139 static inline void outer_sync(void)
 140 {
 141         if (outer_cache.sync)
 142                 outer_cache.sync();
 143 }
 144 #else
 145 static inline void outer_sync(void)
 146 { }
 147 #endif
 148
 149 #endif  /* __ASM_OUTERCACHE_H */