MAINTAINERS: Add phy-miphy28lp.c and phy-miphy365x.c to ARCH/STI architecture
[deliverable/linux.git] / arch / arm / include / debug / at91.S
1 /*
2 * Copyright (C) 2003-2005 SAN People
3 *
4 * Debugging macro include header
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12 #if defined(CONFIG_AT91_DEBUG_LL_DBGU0)
13 #define AT91_DBGU 0xfffff200 /* AT91_BASE_DBGU0 */
14 #elif defined(CONFIG_AT91_DEBUG_LL_DBGU1)
15 #define AT91_DBGU 0xffffee00 /* AT91_BASE_DBGU1 */
16 #else
17 /* On sama5d4, use USART3 as low level serial console */
18 #define AT91_DBGU 0xfc00c000 /* SAMA5D4_BASE_USART3 */
19 #endif
20
21 /* Keep in sync with mach-at91/include/mach/hardware.h */
22 #define AT91_IO_P2V(x) ((x) - 0x01000000)
23
24 #define AT91_DBGU_SR (0x14) /* Status Register */
25 #define AT91_DBGU_THR (0x1c) /* Transmitter Holding Register */
26 #define AT91_DBGU_TXRDY (1 << 1) /* Transmitter Ready */
27 #define AT91_DBGU_TXEMPTY (1 << 9) /* Transmitter Empty */
28
29 .macro addruart, rp, rv, tmp
30 ldr \rp, =AT91_DBGU @ System peripherals (phys address)
31 ldr \rv, =AT91_IO_P2V(AT91_DBGU) @ System peripherals (virt address)
32 .endm
33
34 .macro senduart,rd,rx
35 strb \rd, [\rx, #(AT91_DBGU_THR)] @ Write to Transmitter Holding Register
36 .endm
37
38 .macro waituart,rd,rx
39 1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
40 tst \rd, #AT91_DBGU_TXRDY @ DBGU_TXRDY = 1 when ready to transmit
41 beq 1001b
42 .endm
43
44 .macro busyuart,rd,rx
45 1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
46 tst \rd, #AT91_DBGU_TXEMPTY @ DBGU_TXEMPTY = 1 when transmission complete
47 beq 1001b
48 .endm
49
This page took 0.032147 seconds and 5 git commands to generate.