2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License version 2 as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
15 * Copyright (C) 2012 ARM Limited
17 * Author: Will Deacon <will.deacon@arm.com>
19 #define pr_fmt(fmt) "CPU PMU: " fmt
21 #include <linux/bitmap.h>
22 #include <linux/export.h>
23 #include <linux/kernel.h>
25 #include <linux/platform_device.h>
26 #include <linux/spinlock.h>
28 #include <asm/cputype.h>
29 #include <asm/irq_regs.h>
32 /* Set at runtime when we know what CPU type we are. */
33 static struct arm_pmu
*cpu_pmu
;
35 static DEFINE_PER_CPU(struct perf_event
* [ARMPMU_MAX_HWEVENTS
], hw_events
);
36 static DEFINE_PER_CPU(unsigned long [BITS_TO_LONGS(ARMPMU_MAX_HWEVENTS
)], used_mask
);
37 static DEFINE_PER_CPU(struct pmu_hw_events
, cpu_hw_events
);
40 * Despite the names, these two functions are CPU-specific and are used
41 * by the OProfile/perf code.
43 const char *perf_pmu_name(void)
48 return cpu_pmu
->pmu
.name
;
50 EXPORT_SYMBOL_GPL(perf_pmu_name
);
52 int perf_num_counters(void)
57 max_events
= cpu_pmu
->num_events
;
61 EXPORT_SYMBOL_GPL(perf_num_counters
);
63 /* Include the PMU-specific implementations. */
64 #include "perf_event_xscale.c"
65 #include "perf_event_v6.c"
66 #include "perf_event_v7.c"
68 static struct pmu_hw_events
*cpu_pmu_get_cpu_events(void)
70 return &__get_cpu_var(cpu_hw_events
);
73 static void cpu_pmu_free_irq(void)
76 struct platform_device
*pmu_device
= cpu_pmu
->plat_device
;
78 irqs
= min(pmu_device
->num_resources
, num_possible_cpus());
80 for (i
= 0; i
< irqs
; ++i
) {
81 if (!cpumask_test_and_clear_cpu(i
, &cpu_pmu
->active_irqs
))
83 irq
= platform_get_irq(pmu_device
, i
);
85 free_irq(irq
, cpu_pmu
);
89 static int cpu_pmu_request_irq(irq_handler_t handler
)
91 int i
, err
, irq
, irqs
;
92 struct platform_device
*pmu_device
= cpu_pmu
->plat_device
;
97 irqs
= min(pmu_device
->num_resources
, num_possible_cpus());
99 pr_err("no irqs for PMUs defined\n");
103 for (i
= 0; i
< irqs
; ++i
) {
105 irq
= platform_get_irq(pmu_device
, i
);
110 * If we have a single PMU interrupt that we can't shift,
111 * assume that we're running on a uniprocessor machine and
112 * continue. Otherwise, continue without this interrupt.
114 if (irq_set_affinity(irq
, cpumask_of(i
)) && irqs
> 1) {
115 pr_warning("unable to set irq affinity (irq=%d, cpu=%u)\n",
120 err
= request_irq(irq
, handler
, IRQF_NOBALANCING
, "arm-pmu",
123 pr_err("unable to request IRQ%d for ARM PMU counters\n",
128 cpumask_set_cpu(i
, &cpu_pmu
->active_irqs
);
134 static void __devinit
cpu_pmu_init(struct arm_pmu
*cpu_pmu
)
137 for_each_possible_cpu(cpu
) {
138 struct pmu_hw_events
*events
= &per_cpu(cpu_hw_events
, cpu
);
139 events
->events
= per_cpu(hw_events
, cpu
);
140 events
->used_mask
= per_cpu(used_mask
, cpu
);
141 raw_spin_lock_init(&events
->pmu_lock
);
144 cpu_pmu
->get_hw_events
= cpu_pmu_get_cpu_events
;
145 cpu_pmu
->request_irq
= cpu_pmu_request_irq
;
146 cpu_pmu
->free_irq
= cpu_pmu_free_irq
;
148 /* Ensure the PMU has sane values out of reset. */
149 if (cpu_pmu
&& cpu_pmu
->reset
)
150 on_each_cpu(cpu_pmu
->reset
, NULL
, 1);
154 * PMU hardware loses all context when a CPU goes offline.
155 * When a CPU is hotplugged back in, since some hardware registers are
156 * UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
157 * junk values out of them.
159 static int __cpuinit
cpu_pmu_notify(struct notifier_block
*b
,
160 unsigned long action
, void *hcpu
)
162 if ((action
& ~CPU_TASKS_FROZEN
) != CPU_STARTING
)
165 if (cpu_pmu
&& cpu_pmu
->reset
)
166 cpu_pmu
->reset(NULL
);
171 static struct notifier_block __cpuinitdata cpu_pmu_hotplug_notifier
= {
172 .notifier_call
= cpu_pmu_notify
,
176 * PMU platform driver and devicetree bindings.
178 static struct of_device_id __devinitdata cpu_pmu_of_device_ids
[] = {
179 {.compatible
= "arm,cortex-a15-pmu", .data
= armv7_a15_pmu_init
},
180 {.compatible
= "arm,cortex-a9-pmu", .data
= armv7_a9_pmu_init
},
181 {.compatible
= "arm,cortex-a8-pmu", .data
= armv7_a8_pmu_init
},
182 {.compatible
= "arm,cortex-a7-pmu", .data
= armv7_a7_pmu_init
},
183 {.compatible
= "arm,cortex-a5-pmu", .data
= armv7_a5_pmu_init
},
184 {.compatible
= "arm,arm11mpcore-pmu", .data
= armv6mpcore_pmu_init
},
185 {.compatible
= "arm,arm1176-pmu", .data
= armv6pmu_init
},
186 {.compatible
= "arm,arm1136-pmu", .data
= armv6pmu_init
},
190 static struct platform_device_id __devinitdata cpu_pmu_plat_device_ids
[] = {
196 * CPU PMU identification and probing.
198 static struct arm_pmu
*__devinit
probe_current_pmu(void)
200 struct arm_pmu
*pmu
= NULL
;
202 unsigned long cpuid
= read_cpuid_id();
203 unsigned long implementor
= (cpuid
& 0xFF000000) >> 24;
204 unsigned long part_number
= (cpuid
& 0xFFF0);
206 pr_info("probing PMU on CPU %d\n", cpu
);
209 if (0x41 == implementor
) {
210 switch (part_number
) {
211 case 0xB360: /* ARM1136 */
212 case 0xB560: /* ARM1156 */
213 case 0xB760: /* ARM1176 */
214 pmu
= armv6pmu_init();
216 case 0xB020: /* ARM11mpcore */
217 pmu
= armv6mpcore_pmu_init();
219 case 0xC080: /* Cortex-A8 */
220 pmu
= armv7_a8_pmu_init();
222 case 0xC090: /* Cortex-A9 */
223 pmu
= armv7_a9_pmu_init();
225 case 0xC050: /* Cortex-A5 */
226 pmu
= armv7_a5_pmu_init();
228 case 0xC0F0: /* Cortex-A15 */
229 pmu
= armv7_a15_pmu_init();
231 case 0xC070: /* Cortex-A7 */
232 pmu
= armv7_a7_pmu_init();
235 /* Intel CPUs [xscale]. */
236 } else if (0x69 == implementor
) {
237 part_number
= (cpuid
>> 13) & 0x7;
238 switch (part_number
) {
240 pmu
= xscale1pmu_init();
243 pmu
= xscale2pmu_init();
252 static int __devinit
cpu_pmu_device_probe(struct platform_device
*pdev
)
254 const struct of_device_id
*of_id
;
255 struct arm_pmu
*(*init_fn
)(void);
256 struct device_node
*node
= pdev
->dev
.of_node
;
259 pr_info("attempt to register multiple PMU devices!");
263 if (node
&& (of_id
= of_match_node(cpu_pmu_of_device_ids
, pdev
->dev
.of_node
))) {
264 init_fn
= of_id
->data
;
267 cpu_pmu
= probe_current_pmu();
273 cpu_pmu
->plat_device
= pdev
;
274 cpu_pmu_init(cpu_pmu
);
275 register_cpu_notifier(&cpu_pmu_hotplug_notifier
);
276 armpmu_register(cpu_pmu
, cpu_pmu
->name
, PERF_TYPE_RAW
);
281 static struct platform_driver cpu_pmu_driver
= {
284 .pm
= &armpmu_dev_pm_ops
,
285 .of_match_table
= cpu_pmu_of_device_ids
,
287 .probe
= cpu_pmu_device_probe
,
288 .id_table
= cpu_pmu_plat_device_ids
,
291 static int __init
register_pmu_driver(void)
293 return platform_driver_register(&cpu_pmu_driver
);
295 device_initcall(register_pmu_driver
);