2 * arch/arm/mach-at91/at91sam9260_devices.c
4 * Copyright (C) 2006 Atmel
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #include <asm/mach/arch.h>
13 #include <asm/mach/map.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/gpio.h>
17 #include <linux/platform_device.h>
18 #include <linux/i2c-gpio.h>
20 #include <linux/platform_data/at91_adc.h>
22 #include <mach/board.h>
24 #include <mach/at91sam9260.h>
25 #include <mach/at91sam9260_matrix.h>
26 #include <mach/at91_matrix.h>
27 #include <mach/at91sam9_smc.h>
28 #include <mach/at91_adc.h>
33 /* --------------------------------------------------------------------
35 * -------------------------------------------------------------------- */
37 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
38 static u64 ohci_dmamask
= DMA_BIT_MASK(32);
39 static struct at91_usbh_data usbh_data
;
41 static struct resource usbh_resources
[] = {
43 .start
= AT91SAM9260_UHP_BASE
,
44 .end
= AT91SAM9260_UHP_BASE
+ SZ_1M
- 1,
45 .flags
= IORESOURCE_MEM
,
48 .start
= AT91SAM9260_ID_UHP
,
49 .end
= AT91SAM9260_ID_UHP
,
50 .flags
= IORESOURCE_IRQ
,
54 static struct platform_device at91_usbh_device
= {
58 .dma_mask
= &ohci_dmamask
,
59 .coherent_dma_mask
= DMA_BIT_MASK(32),
60 .platform_data
= &usbh_data
,
62 .resource
= usbh_resources
,
63 .num_resources
= ARRAY_SIZE(usbh_resources
),
66 void __init
at91_add_device_usbh(struct at91_usbh_data
*data
)
73 /* Enable overcurrent notification */
74 for (i
= 0; i
< data
->ports
; i
++) {
75 if (data
->overcurrent_pin
[i
])
76 at91_set_gpio_input(data
->overcurrent_pin
[i
], 1);
80 platform_device_register(&at91_usbh_device
);
83 void __init
at91_add_device_usbh(struct at91_usbh_data
*data
) {}
87 /* --------------------------------------------------------------------
89 * -------------------------------------------------------------------- */
91 #if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
92 static struct at91_udc_data udc_data
;
94 static struct resource udc_resources
[] = {
96 .start
= AT91SAM9260_BASE_UDP
,
97 .end
= AT91SAM9260_BASE_UDP
+ SZ_16K
- 1,
98 .flags
= IORESOURCE_MEM
,
101 .start
= AT91SAM9260_ID_UDP
,
102 .end
= AT91SAM9260_ID_UDP
,
103 .flags
= IORESOURCE_IRQ
,
107 static struct platform_device at91_udc_device
= {
111 .platform_data
= &udc_data
,
113 .resource
= udc_resources
,
114 .num_resources
= ARRAY_SIZE(udc_resources
),
117 void __init
at91_add_device_udc(struct at91_udc_data
*data
)
122 if (gpio_is_valid(data
->vbus_pin
)) {
123 at91_set_gpio_input(data
->vbus_pin
, 0);
124 at91_set_deglitch(data
->vbus_pin
, 1);
127 /* Pullup pin is handled internally by USB device peripheral */
130 platform_device_register(&at91_udc_device
);
133 void __init
at91_add_device_udc(struct at91_udc_data
*data
) {}
137 /* --------------------------------------------------------------------
139 * -------------------------------------------------------------------- */
141 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
142 static u64 eth_dmamask
= DMA_BIT_MASK(32);
143 static struct macb_platform_data eth_data
;
145 static struct resource eth_resources
[] = {
147 .start
= AT91SAM9260_BASE_EMAC
,
148 .end
= AT91SAM9260_BASE_EMAC
+ SZ_16K
- 1,
149 .flags
= IORESOURCE_MEM
,
152 .start
= AT91SAM9260_ID_EMAC
,
153 .end
= AT91SAM9260_ID_EMAC
,
154 .flags
= IORESOURCE_IRQ
,
158 static struct platform_device at91sam9260_eth_device
= {
162 .dma_mask
= ð_dmamask
,
163 .coherent_dma_mask
= DMA_BIT_MASK(32),
164 .platform_data
= ð_data
,
166 .resource
= eth_resources
,
167 .num_resources
= ARRAY_SIZE(eth_resources
),
170 void __init
at91_add_device_eth(struct macb_platform_data
*data
)
175 if (gpio_is_valid(data
->phy_irq_pin
)) {
176 at91_set_gpio_input(data
->phy_irq_pin
, 0);
177 at91_set_deglitch(data
->phy_irq_pin
, 1);
180 /* Pins used for MII and RMII */
181 at91_set_A_periph(AT91_PIN_PA19
, 0); /* ETXCK_EREFCK */
182 at91_set_A_periph(AT91_PIN_PA17
, 0); /* ERXDV */
183 at91_set_A_periph(AT91_PIN_PA14
, 0); /* ERX0 */
184 at91_set_A_periph(AT91_PIN_PA15
, 0); /* ERX1 */
185 at91_set_A_periph(AT91_PIN_PA18
, 0); /* ERXER */
186 at91_set_A_periph(AT91_PIN_PA16
, 0); /* ETXEN */
187 at91_set_A_periph(AT91_PIN_PA12
, 0); /* ETX0 */
188 at91_set_A_periph(AT91_PIN_PA13
, 0); /* ETX1 */
189 at91_set_A_periph(AT91_PIN_PA21
, 0); /* EMDIO */
190 at91_set_A_periph(AT91_PIN_PA20
, 0); /* EMDC */
192 if (!data
->is_rmii
) {
193 at91_set_B_periph(AT91_PIN_PA28
, 0); /* ECRS */
194 at91_set_B_periph(AT91_PIN_PA29
, 0); /* ECOL */
195 at91_set_B_periph(AT91_PIN_PA25
, 0); /* ERX2 */
196 at91_set_B_periph(AT91_PIN_PA26
, 0); /* ERX3 */
197 at91_set_B_periph(AT91_PIN_PA27
, 0); /* ERXCK */
198 at91_set_B_periph(AT91_PIN_PA23
, 0); /* ETX2 */
199 at91_set_B_periph(AT91_PIN_PA24
, 0); /* ETX3 */
200 at91_set_B_periph(AT91_PIN_PA22
, 0); /* ETXER */
204 platform_device_register(&at91sam9260_eth_device
);
207 void __init
at91_add_device_eth(struct macb_platform_data
*data
) {}
211 /* --------------------------------------------------------------------
213 * -------------------------------------------------------------------- */
215 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
216 static u64 mmc_dmamask
= DMA_BIT_MASK(32);
217 static struct at91_mmc_data mmc_data
;
219 static struct resource mmc_resources
[] = {
221 .start
= AT91SAM9260_BASE_MCI
,
222 .end
= AT91SAM9260_BASE_MCI
+ SZ_16K
- 1,
223 .flags
= IORESOURCE_MEM
,
226 .start
= AT91SAM9260_ID_MCI
,
227 .end
= AT91SAM9260_ID_MCI
,
228 .flags
= IORESOURCE_IRQ
,
232 static struct platform_device at91sam9260_mmc_device
= {
236 .dma_mask
= &mmc_dmamask
,
237 .coherent_dma_mask
= DMA_BIT_MASK(32),
238 .platform_data
= &mmc_data
,
240 .resource
= mmc_resources
,
241 .num_resources
= ARRAY_SIZE(mmc_resources
),
244 void __init
at91_add_device_mmc(short mmc_id
, struct at91_mmc_data
*data
)
250 if (gpio_is_valid(data
->det_pin
)) {
251 at91_set_gpio_input(data
->det_pin
, 1);
252 at91_set_deglitch(data
->det_pin
, 1);
254 if (gpio_is_valid(data
->wp_pin
))
255 at91_set_gpio_input(data
->wp_pin
, 1);
256 if (gpio_is_valid(data
->vcc_pin
))
257 at91_set_gpio_output(data
->vcc_pin
, 0);
260 at91_set_A_periph(AT91_PIN_PA8
, 0);
264 at91_set_B_periph(AT91_PIN_PA1
, 1);
266 /* DAT0, maybe DAT1..DAT3 */
267 at91_set_B_periph(AT91_PIN_PA0
, 1);
269 at91_set_B_periph(AT91_PIN_PA5
, 1);
270 at91_set_B_periph(AT91_PIN_PA4
, 1);
271 at91_set_B_periph(AT91_PIN_PA3
, 1);
275 at91_set_A_periph(AT91_PIN_PA7
, 1);
277 /* DAT0, maybe DAT1..DAT3 */
278 at91_set_A_periph(AT91_PIN_PA6
, 1);
280 at91_set_A_periph(AT91_PIN_PA9
, 1);
281 at91_set_A_periph(AT91_PIN_PA10
, 1);
282 at91_set_A_periph(AT91_PIN_PA11
, 1);
287 platform_device_register(&at91sam9260_mmc_device
);
290 void __init
at91_add_device_mmc(short mmc_id
, struct at91_mmc_data
*data
) {}
293 /* --------------------------------------------------------------------
294 * MMC / SD Slot for Atmel MCI Driver
295 * -------------------------------------------------------------------- */
297 #if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
298 static u64 mmc_dmamask
= DMA_BIT_MASK(32);
299 static struct mci_platform_data mmc_data
;
301 static struct resource mmc_resources
[] = {
303 .start
= AT91SAM9260_BASE_MCI
,
304 .end
= AT91SAM9260_BASE_MCI
+ SZ_16K
- 1,
305 .flags
= IORESOURCE_MEM
,
308 .start
= AT91SAM9260_ID_MCI
,
309 .end
= AT91SAM9260_ID_MCI
,
310 .flags
= IORESOURCE_IRQ
,
314 static struct platform_device at91sam9260_mmc_device
= {
318 .dma_mask
= &mmc_dmamask
,
319 .coherent_dma_mask
= DMA_BIT_MASK(32),
320 .platform_data
= &mmc_data
,
322 .resource
= mmc_resources
,
323 .num_resources
= ARRAY_SIZE(mmc_resources
),
326 void __init
at91_add_device_mci(short mmc_id
, struct mci_platform_data
*data
)
329 unsigned int slot_count
= 0;
334 for (i
= 0; i
< ATMCI_MAX_NR_SLOTS
; i
++) {
335 if (data
->slot
[i
].bus_width
) {
337 if (gpio_is_valid(data
->slot
[i
].detect_pin
)) {
338 at91_set_gpio_input(data
->slot
[i
].detect_pin
, 1);
339 at91_set_deglitch(data
->slot
[i
].detect_pin
, 1);
341 if (gpio_is_valid(data
->slot
[i
].wp_pin
))
342 at91_set_gpio_input(data
->slot
[i
].wp_pin
, 1);
347 at91_set_A_periph(AT91_PIN_PA7
, 1);
348 /* DAT0, maybe DAT1..DAT3 */
349 at91_set_A_periph(AT91_PIN_PA6
, 1);
350 if (data
->slot
[i
].bus_width
== 4) {
351 at91_set_A_periph(AT91_PIN_PA9
, 1);
352 at91_set_A_periph(AT91_PIN_PA10
, 1);
353 at91_set_A_periph(AT91_PIN_PA11
, 1);
359 at91_set_B_periph(AT91_PIN_PA1
, 1);
360 /* DAT0, maybe DAT1..DAT3 */
361 at91_set_B_periph(AT91_PIN_PA0
, 1);
362 if (data
->slot
[i
].bus_width
== 4) {
363 at91_set_B_periph(AT91_PIN_PA5
, 1);
364 at91_set_B_periph(AT91_PIN_PA4
, 1);
365 at91_set_B_periph(AT91_PIN_PA3
, 1);
371 "AT91: SD/MMC slot %d not available\n", i
);
379 at91_set_A_periph(AT91_PIN_PA8
, 0);
382 platform_device_register(&at91sam9260_mmc_device
);
386 void __init
at91_add_device_mci(short mmc_id
, struct mci_platform_data
*data
) {}
390 /* --------------------------------------------------------------------
392 * -------------------------------------------------------------------- */
394 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
395 static struct atmel_nand_data nand_data
;
397 #define NAND_BASE AT91_CHIPSELECT_3
399 static struct resource nand_resources
[] = {
402 .end
= NAND_BASE
+ SZ_256M
- 1,
403 .flags
= IORESOURCE_MEM
,
406 .start
= AT91SAM9260_BASE_ECC
,
407 .end
= AT91SAM9260_BASE_ECC
+ SZ_512
- 1,
408 .flags
= IORESOURCE_MEM
,
412 static struct platform_device at91sam9260_nand_device
= {
413 .name
= "atmel_nand",
416 .platform_data
= &nand_data
,
418 .resource
= nand_resources
,
419 .num_resources
= ARRAY_SIZE(nand_resources
),
422 void __init
at91_add_device_nand(struct atmel_nand_data
*data
)
429 csa
= at91_matrix_read(AT91_MATRIX_EBICSA
);
430 at91_matrix_write(AT91_MATRIX_EBICSA
, csa
| AT91_MATRIX_CS3A_SMC_SMARTMEDIA
);
433 if (gpio_is_valid(data
->enable_pin
))
434 at91_set_gpio_output(data
->enable_pin
, 1);
437 if (gpio_is_valid(data
->rdy_pin
))
438 at91_set_gpio_input(data
->rdy_pin
, 1);
440 /* card detect pin */
441 if (gpio_is_valid(data
->det_pin
))
442 at91_set_gpio_input(data
->det_pin
, 1);
445 platform_device_register(&at91sam9260_nand_device
);
448 void __init
at91_add_device_nand(struct atmel_nand_data
*data
) {}
452 /* --------------------------------------------------------------------
454 * -------------------------------------------------------------------- */
457 * Prefer the GPIO code since the TWI controller isn't robust
458 * (gets overruns and underruns under load) and can only issue
459 * repeated STARTs in one scenario (the driver doesn't yet handle them).
462 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
464 static struct i2c_gpio_platform_data pdata
= {
465 .sda_pin
= AT91_PIN_PA23
,
466 .sda_is_open_drain
= 1,
467 .scl_pin
= AT91_PIN_PA24
,
468 .scl_is_open_drain
= 1,
469 .udelay
= 2, /* ~100 kHz */
472 static struct platform_device at91sam9260_twi_device
= {
475 .dev
.platform_data
= &pdata
,
478 void __init
at91_add_device_i2c(struct i2c_board_info
*devices
, int nr_devices
)
480 at91_set_GPIO_periph(AT91_PIN_PA23
, 1); /* TWD (SDA) */
481 at91_set_multi_drive(AT91_PIN_PA23
, 1);
483 at91_set_GPIO_periph(AT91_PIN_PA24
, 1); /* TWCK (SCL) */
484 at91_set_multi_drive(AT91_PIN_PA24
, 1);
486 i2c_register_board_info(0, devices
, nr_devices
);
487 platform_device_register(&at91sam9260_twi_device
);
490 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
492 static struct resource twi_resources
[] = {
494 .start
= AT91SAM9260_BASE_TWI
,
495 .end
= AT91SAM9260_BASE_TWI
+ SZ_16K
- 1,
496 .flags
= IORESOURCE_MEM
,
499 .start
= AT91SAM9260_ID_TWI
,
500 .end
= AT91SAM9260_ID_TWI
,
501 .flags
= IORESOURCE_IRQ
,
505 static struct platform_device at91sam9260_twi_device
= {
508 .resource
= twi_resources
,
509 .num_resources
= ARRAY_SIZE(twi_resources
),
512 void __init
at91_add_device_i2c(struct i2c_board_info
*devices
, int nr_devices
)
514 /* pins used for TWI interface */
515 at91_set_A_periph(AT91_PIN_PA23
, 0); /* TWD */
516 at91_set_multi_drive(AT91_PIN_PA23
, 1);
518 at91_set_A_periph(AT91_PIN_PA24
, 0); /* TWCK */
519 at91_set_multi_drive(AT91_PIN_PA24
, 1);
521 i2c_register_board_info(0, devices
, nr_devices
);
522 platform_device_register(&at91sam9260_twi_device
);
525 void __init
at91_add_device_i2c(struct i2c_board_info
*devices
, int nr_devices
) {}
529 /* --------------------------------------------------------------------
531 * -------------------------------------------------------------------- */
533 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
534 static u64 spi_dmamask
= DMA_BIT_MASK(32);
536 static struct resource spi0_resources
[] = {
538 .start
= AT91SAM9260_BASE_SPI0
,
539 .end
= AT91SAM9260_BASE_SPI0
+ SZ_16K
- 1,
540 .flags
= IORESOURCE_MEM
,
543 .start
= AT91SAM9260_ID_SPI0
,
544 .end
= AT91SAM9260_ID_SPI0
,
545 .flags
= IORESOURCE_IRQ
,
549 static struct platform_device at91sam9260_spi0_device
= {
553 .dma_mask
= &spi_dmamask
,
554 .coherent_dma_mask
= DMA_BIT_MASK(32),
556 .resource
= spi0_resources
,
557 .num_resources
= ARRAY_SIZE(spi0_resources
),
560 static const unsigned spi0_standard_cs
[4] = { AT91_PIN_PA3
, AT91_PIN_PC11
, AT91_PIN_PC16
, AT91_PIN_PC17
};
562 static struct resource spi1_resources
[] = {
564 .start
= AT91SAM9260_BASE_SPI1
,
565 .end
= AT91SAM9260_BASE_SPI1
+ SZ_16K
- 1,
566 .flags
= IORESOURCE_MEM
,
569 .start
= AT91SAM9260_ID_SPI1
,
570 .end
= AT91SAM9260_ID_SPI1
,
571 .flags
= IORESOURCE_IRQ
,
575 static struct platform_device at91sam9260_spi1_device
= {
579 .dma_mask
= &spi_dmamask
,
580 .coherent_dma_mask
= DMA_BIT_MASK(32),
582 .resource
= spi1_resources
,
583 .num_resources
= ARRAY_SIZE(spi1_resources
),
586 static const unsigned spi1_standard_cs
[4] = { AT91_PIN_PB3
, AT91_PIN_PC5
, AT91_PIN_PC4
, AT91_PIN_PC3
};
588 void __init
at91_add_device_spi(struct spi_board_info
*devices
, int nr_devices
)
591 unsigned long cs_pin
;
592 short enable_spi0
= 0;
593 short enable_spi1
= 0;
595 /* Choose SPI chip-selects */
596 for (i
= 0; i
< nr_devices
; i
++) {
597 if (devices
[i
].controller_data
)
598 cs_pin
= (unsigned long) devices
[i
].controller_data
;
599 else if (devices
[i
].bus_num
== 0)
600 cs_pin
= spi0_standard_cs
[devices
[i
].chip_select
];
602 cs_pin
= spi1_standard_cs
[devices
[i
].chip_select
];
604 if (!gpio_is_valid(cs_pin
))
607 if (devices
[i
].bus_num
== 0)
612 /* enable chip-select pin */
613 at91_set_gpio_output(cs_pin
, 1);
615 /* pass chip-select pin to driver */
616 devices
[i
].controller_data
= (void *) cs_pin
;
619 spi_register_board_info(devices
, nr_devices
);
621 /* Configure SPI bus(es) */
623 at91_set_A_periph(AT91_PIN_PA0
, 0); /* SPI0_MISO */
624 at91_set_A_periph(AT91_PIN_PA1
, 0); /* SPI0_MOSI */
625 at91_set_A_periph(AT91_PIN_PA2
, 0); /* SPI1_SPCK */
627 platform_device_register(&at91sam9260_spi0_device
);
630 at91_set_A_periph(AT91_PIN_PB0
, 0); /* SPI1_MISO */
631 at91_set_A_periph(AT91_PIN_PB1
, 0); /* SPI1_MOSI */
632 at91_set_A_periph(AT91_PIN_PB2
, 0); /* SPI1_SPCK */
634 platform_device_register(&at91sam9260_spi1_device
);
638 void __init
at91_add_device_spi(struct spi_board_info
*devices
, int nr_devices
) {}
642 /* --------------------------------------------------------------------
643 * Timer/Counter blocks
644 * -------------------------------------------------------------------- */
646 #ifdef CONFIG_ATMEL_TCLIB
648 static struct resource tcb0_resources
[] = {
650 .start
= AT91SAM9260_BASE_TCB0
,
651 .end
= AT91SAM9260_BASE_TCB0
+ SZ_256
- 1,
652 .flags
= IORESOURCE_MEM
,
655 .start
= AT91SAM9260_ID_TC0
,
656 .end
= AT91SAM9260_ID_TC0
,
657 .flags
= IORESOURCE_IRQ
,
660 .start
= AT91SAM9260_ID_TC1
,
661 .end
= AT91SAM9260_ID_TC1
,
662 .flags
= IORESOURCE_IRQ
,
665 .start
= AT91SAM9260_ID_TC2
,
666 .end
= AT91SAM9260_ID_TC2
,
667 .flags
= IORESOURCE_IRQ
,
671 static struct platform_device at91sam9260_tcb0_device
= {
674 .resource
= tcb0_resources
,
675 .num_resources
= ARRAY_SIZE(tcb0_resources
),
678 static struct resource tcb1_resources
[] = {
680 .start
= AT91SAM9260_BASE_TCB1
,
681 .end
= AT91SAM9260_BASE_TCB1
+ SZ_256
- 1,
682 .flags
= IORESOURCE_MEM
,
685 .start
= AT91SAM9260_ID_TC3
,
686 .end
= AT91SAM9260_ID_TC3
,
687 .flags
= IORESOURCE_IRQ
,
690 .start
= AT91SAM9260_ID_TC4
,
691 .end
= AT91SAM9260_ID_TC4
,
692 .flags
= IORESOURCE_IRQ
,
695 .start
= AT91SAM9260_ID_TC5
,
696 .end
= AT91SAM9260_ID_TC5
,
697 .flags
= IORESOURCE_IRQ
,
701 static struct platform_device at91sam9260_tcb1_device
= {
704 .resource
= tcb1_resources
,
705 .num_resources
= ARRAY_SIZE(tcb1_resources
),
708 static void __init
at91_add_device_tc(void)
710 platform_device_register(&at91sam9260_tcb0_device
);
711 platform_device_register(&at91sam9260_tcb1_device
);
714 static void __init
at91_add_device_tc(void) { }
718 /* --------------------------------------------------------------------
720 * -------------------------------------------------------------------- */
722 static struct resource rtt_resources
[] = {
724 .start
= AT91SAM9260_BASE_RTT
,
725 .end
= AT91SAM9260_BASE_RTT
+ SZ_16
- 1,
726 .flags
= IORESOURCE_MEM
,
728 .flags
= IORESOURCE_MEM
,
732 static struct platform_device at91sam9260_rtt_device
= {
735 .resource
= rtt_resources
,
739 #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
740 static void __init
at91_add_device_rtt_rtc(void)
742 at91sam9260_rtt_device
.name
= "rtc-at91sam9";
744 * The second resource is needed:
745 * GPBR will serve as the storage for RTC time offset
747 at91sam9260_rtt_device
.num_resources
= 2;
748 rtt_resources
[1].start
= AT91SAM9260_BASE_GPBR
+
749 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR
;
750 rtt_resources
[1].end
= rtt_resources
[1].start
+ 3;
753 static void __init
at91_add_device_rtt_rtc(void)
755 /* Only one resource is needed: RTT not used as RTC */
756 at91sam9260_rtt_device
.num_resources
= 1;
760 static void __init
at91_add_device_rtt(void)
762 at91_add_device_rtt_rtc();
763 platform_device_register(&at91sam9260_rtt_device
);
767 /* --------------------------------------------------------------------
769 * -------------------------------------------------------------------- */
771 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
772 static struct resource wdt_resources
[] = {
774 .start
= AT91SAM9260_BASE_WDT
,
775 .end
= AT91SAM9260_BASE_WDT
+ SZ_16
- 1,
776 .flags
= IORESOURCE_MEM
,
780 static struct platform_device at91sam9260_wdt_device
= {
783 .resource
= wdt_resources
,
784 .num_resources
= ARRAY_SIZE(wdt_resources
),
787 static void __init
at91_add_device_watchdog(void)
789 platform_device_register(&at91sam9260_wdt_device
);
792 static void __init
at91_add_device_watchdog(void) {}
796 /* --------------------------------------------------------------------
797 * SSC -- Synchronous Serial Controller
798 * -------------------------------------------------------------------- */
800 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
801 static u64 ssc_dmamask
= DMA_BIT_MASK(32);
803 static struct resource ssc_resources
[] = {
805 .start
= AT91SAM9260_BASE_SSC
,
806 .end
= AT91SAM9260_BASE_SSC
+ SZ_16K
- 1,
807 .flags
= IORESOURCE_MEM
,
810 .start
= AT91SAM9260_ID_SSC
,
811 .end
= AT91SAM9260_ID_SSC
,
812 .flags
= IORESOURCE_IRQ
,
816 static struct platform_device at91sam9260_ssc_device
= {
820 .dma_mask
= &ssc_dmamask
,
821 .coherent_dma_mask
= DMA_BIT_MASK(32),
823 .resource
= ssc_resources
,
824 .num_resources
= ARRAY_SIZE(ssc_resources
),
827 static inline void configure_ssc_pins(unsigned pins
)
829 if (pins
& ATMEL_SSC_TF
)
830 at91_set_A_periph(AT91_PIN_PB17
, 1);
831 if (pins
& ATMEL_SSC_TK
)
832 at91_set_A_periph(AT91_PIN_PB16
, 1);
833 if (pins
& ATMEL_SSC_TD
)
834 at91_set_A_periph(AT91_PIN_PB18
, 1);
835 if (pins
& ATMEL_SSC_RD
)
836 at91_set_A_periph(AT91_PIN_PB19
, 1);
837 if (pins
& ATMEL_SSC_RK
)
838 at91_set_A_periph(AT91_PIN_PB20
, 1);
839 if (pins
& ATMEL_SSC_RF
)
840 at91_set_A_periph(AT91_PIN_PB21
, 1);
844 * SSC controllers are accessed through library code, instead of any
845 * kind of all-singing/all-dancing driver. For example one could be
846 * used by a particular I2S audio codec's driver, while another one
847 * on the same system might be used by a custom data capture driver.
849 void __init
at91_add_device_ssc(unsigned id
, unsigned pins
)
851 struct platform_device
*pdev
;
854 * NOTE: caller is responsible for passing information matching
855 * "pins" to whatever will be using each particular controller.
858 case AT91SAM9260_ID_SSC
:
859 pdev
= &at91sam9260_ssc_device
;
860 configure_ssc_pins(pins
);
866 platform_device_register(pdev
);
870 void __init
at91_add_device_ssc(unsigned id
, unsigned pins
) {}
874 /* --------------------------------------------------------------------
876 * -------------------------------------------------------------------- */
877 #if defined(CONFIG_SERIAL_ATMEL)
878 static struct resource dbgu_resources
[] = {
880 .start
= AT91SAM9260_BASE_DBGU
,
881 .end
= AT91SAM9260_BASE_DBGU
+ SZ_512
- 1,
882 .flags
= IORESOURCE_MEM
,
885 .start
= AT91_ID_SYS
,
887 .flags
= IORESOURCE_IRQ
,
891 static struct atmel_uart_data dbgu_data
= {
893 .use_dma_rx
= 0, /* DBGU not capable of receive DMA */
896 static u64 dbgu_dmamask
= DMA_BIT_MASK(32);
898 static struct platform_device at91sam9260_dbgu_device
= {
899 .name
= "atmel_usart",
902 .dma_mask
= &dbgu_dmamask
,
903 .coherent_dma_mask
= DMA_BIT_MASK(32),
904 .platform_data
= &dbgu_data
,
906 .resource
= dbgu_resources
,
907 .num_resources
= ARRAY_SIZE(dbgu_resources
),
910 static inline void configure_dbgu_pins(void)
912 at91_set_A_periph(AT91_PIN_PB14
, 0); /* DRXD */
913 at91_set_A_periph(AT91_PIN_PB15
, 1); /* DTXD */
916 static struct resource uart0_resources
[] = {
918 .start
= AT91SAM9260_BASE_US0
,
919 .end
= AT91SAM9260_BASE_US0
+ SZ_16K
- 1,
920 .flags
= IORESOURCE_MEM
,
923 .start
= AT91SAM9260_ID_US0
,
924 .end
= AT91SAM9260_ID_US0
,
925 .flags
= IORESOURCE_IRQ
,
929 static struct atmel_uart_data uart0_data
= {
934 static u64 uart0_dmamask
= DMA_BIT_MASK(32);
936 static struct platform_device at91sam9260_uart0_device
= {
937 .name
= "atmel_usart",
940 .dma_mask
= &uart0_dmamask
,
941 .coherent_dma_mask
= DMA_BIT_MASK(32),
942 .platform_data
= &uart0_data
,
944 .resource
= uart0_resources
,
945 .num_resources
= ARRAY_SIZE(uart0_resources
),
948 static inline void configure_usart0_pins(unsigned pins
)
950 at91_set_A_periph(AT91_PIN_PB4
, 1); /* TXD0 */
951 at91_set_A_periph(AT91_PIN_PB5
, 0); /* RXD0 */
953 if (pins
& ATMEL_UART_RTS
)
954 at91_set_A_periph(AT91_PIN_PB26
, 0); /* RTS0 */
955 if (pins
& ATMEL_UART_CTS
)
956 at91_set_A_periph(AT91_PIN_PB27
, 0); /* CTS0 */
957 if (pins
& ATMEL_UART_DTR
)
958 at91_set_A_periph(AT91_PIN_PB24
, 0); /* DTR0 */
959 if (pins
& ATMEL_UART_DSR
)
960 at91_set_A_periph(AT91_PIN_PB22
, 0); /* DSR0 */
961 if (pins
& ATMEL_UART_DCD
)
962 at91_set_A_periph(AT91_PIN_PB23
, 0); /* DCD0 */
963 if (pins
& ATMEL_UART_RI
)
964 at91_set_A_periph(AT91_PIN_PB25
, 0); /* RI0 */
967 static struct resource uart1_resources
[] = {
969 .start
= AT91SAM9260_BASE_US1
,
970 .end
= AT91SAM9260_BASE_US1
+ SZ_16K
- 1,
971 .flags
= IORESOURCE_MEM
,
974 .start
= AT91SAM9260_ID_US1
,
975 .end
= AT91SAM9260_ID_US1
,
976 .flags
= IORESOURCE_IRQ
,
980 static struct atmel_uart_data uart1_data
= {
985 static u64 uart1_dmamask
= DMA_BIT_MASK(32);
987 static struct platform_device at91sam9260_uart1_device
= {
988 .name
= "atmel_usart",
991 .dma_mask
= &uart1_dmamask
,
992 .coherent_dma_mask
= DMA_BIT_MASK(32),
993 .platform_data
= &uart1_data
,
995 .resource
= uart1_resources
,
996 .num_resources
= ARRAY_SIZE(uart1_resources
),
999 static inline void configure_usart1_pins(unsigned pins
)
1001 at91_set_A_periph(AT91_PIN_PB6
, 1); /* TXD1 */
1002 at91_set_A_periph(AT91_PIN_PB7
, 0); /* RXD1 */
1004 if (pins
& ATMEL_UART_RTS
)
1005 at91_set_A_periph(AT91_PIN_PB28
, 0); /* RTS1 */
1006 if (pins
& ATMEL_UART_CTS
)
1007 at91_set_A_periph(AT91_PIN_PB29
, 0); /* CTS1 */
1010 static struct resource uart2_resources
[] = {
1012 .start
= AT91SAM9260_BASE_US2
,
1013 .end
= AT91SAM9260_BASE_US2
+ SZ_16K
- 1,
1014 .flags
= IORESOURCE_MEM
,
1017 .start
= AT91SAM9260_ID_US2
,
1018 .end
= AT91SAM9260_ID_US2
,
1019 .flags
= IORESOURCE_IRQ
,
1023 static struct atmel_uart_data uart2_data
= {
1028 static u64 uart2_dmamask
= DMA_BIT_MASK(32);
1030 static struct platform_device at91sam9260_uart2_device
= {
1031 .name
= "atmel_usart",
1034 .dma_mask
= &uart2_dmamask
,
1035 .coherent_dma_mask
= DMA_BIT_MASK(32),
1036 .platform_data
= &uart2_data
,
1038 .resource
= uart2_resources
,
1039 .num_resources
= ARRAY_SIZE(uart2_resources
),
1042 static inline void configure_usart2_pins(unsigned pins
)
1044 at91_set_A_periph(AT91_PIN_PB8
, 1); /* TXD2 */
1045 at91_set_A_periph(AT91_PIN_PB9
, 0); /* RXD2 */
1047 if (pins
& ATMEL_UART_RTS
)
1048 at91_set_A_periph(AT91_PIN_PA4
, 0); /* RTS2 */
1049 if (pins
& ATMEL_UART_CTS
)
1050 at91_set_A_periph(AT91_PIN_PA5
, 0); /* CTS2 */
1053 static struct resource uart3_resources
[] = {
1055 .start
= AT91SAM9260_BASE_US3
,
1056 .end
= AT91SAM9260_BASE_US3
+ SZ_16K
- 1,
1057 .flags
= IORESOURCE_MEM
,
1060 .start
= AT91SAM9260_ID_US3
,
1061 .end
= AT91SAM9260_ID_US3
,
1062 .flags
= IORESOURCE_IRQ
,
1066 static struct atmel_uart_data uart3_data
= {
1071 static u64 uart3_dmamask
= DMA_BIT_MASK(32);
1073 static struct platform_device at91sam9260_uart3_device
= {
1074 .name
= "atmel_usart",
1077 .dma_mask
= &uart3_dmamask
,
1078 .coherent_dma_mask
= DMA_BIT_MASK(32),
1079 .platform_data
= &uart3_data
,
1081 .resource
= uart3_resources
,
1082 .num_resources
= ARRAY_SIZE(uart3_resources
),
1085 static inline void configure_usart3_pins(unsigned pins
)
1087 at91_set_A_periph(AT91_PIN_PB10
, 1); /* TXD3 */
1088 at91_set_A_periph(AT91_PIN_PB11
, 0); /* RXD3 */
1090 if (pins
& ATMEL_UART_RTS
)
1091 at91_set_B_periph(AT91_PIN_PC8
, 0); /* RTS3 */
1092 if (pins
& ATMEL_UART_CTS
)
1093 at91_set_B_periph(AT91_PIN_PC10
, 0); /* CTS3 */
1096 static struct resource uart4_resources
[] = {
1098 .start
= AT91SAM9260_BASE_US4
,
1099 .end
= AT91SAM9260_BASE_US4
+ SZ_16K
- 1,
1100 .flags
= IORESOURCE_MEM
,
1103 .start
= AT91SAM9260_ID_US4
,
1104 .end
= AT91SAM9260_ID_US4
,
1105 .flags
= IORESOURCE_IRQ
,
1109 static struct atmel_uart_data uart4_data
= {
1114 static u64 uart4_dmamask
= DMA_BIT_MASK(32);
1116 static struct platform_device at91sam9260_uart4_device
= {
1117 .name
= "atmel_usart",
1120 .dma_mask
= &uart4_dmamask
,
1121 .coherent_dma_mask
= DMA_BIT_MASK(32),
1122 .platform_data
= &uart4_data
,
1124 .resource
= uart4_resources
,
1125 .num_resources
= ARRAY_SIZE(uart4_resources
),
1128 static inline void configure_usart4_pins(void)
1130 at91_set_B_periph(AT91_PIN_PA31
, 1); /* TXD4 */
1131 at91_set_B_periph(AT91_PIN_PA30
, 0); /* RXD4 */
1134 static struct resource uart5_resources
[] = {
1136 .start
= AT91SAM9260_BASE_US5
,
1137 .end
= AT91SAM9260_BASE_US5
+ SZ_16K
- 1,
1138 .flags
= IORESOURCE_MEM
,
1141 .start
= AT91SAM9260_ID_US5
,
1142 .end
= AT91SAM9260_ID_US5
,
1143 .flags
= IORESOURCE_IRQ
,
1147 static struct atmel_uart_data uart5_data
= {
1152 static u64 uart5_dmamask
= DMA_BIT_MASK(32);
1154 static struct platform_device at91sam9260_uart5_device
= {
1155 .name
= "atmel_usart",
1158 .dma_mask
= &uart5_dmamask
,
1159 .coherent_dma_mask
= DMA_BIT_MASK(32),
1160 .platform_data
= &uart5_data
,
1162 .resource
= uart5_resources
,
1163 .num_resources
= ARRAY_SIZE(uart5_resources
),
1166 static inline void configure_usart5_pins(void)
1168 at91_set_A_periph(AT91_PIN_PB12
, 1); /* TXD5 */
1169 at91_set_A_periph(AT91_PIN_PB13
, 0); /* RXD5 */
1172 static struct platform_device
*__initdata at91_uarts
[ATMEL_MAX_UART
]; /* the UARTs to use */
1174 void __init
at91_register_uart(unsigned id
, unsigned portnr
, unsigned pins
)
1176 struct platform_device
*pdev
;
1177 struct atmel_uart_data
*pdata
;
1181 pdev
= &at91sam9260_dbgu_device
;
1182 configure_dbgu_pins();
1184 case AT91SAM9260_ID_US0
:
1185 pdev
= &at91sam9260_uart0_device
;
1186 configure_usart0_pins(pins
);
1188 case AT91SAM9260_ID_US1
:
1189 pdev
= &at91sam9260_uart1_device
;
1190 configure_usart1_pins(pins
);
1192 case AT91SAM9260_ID_US2
:
1193 pdev
= &at91sam9260_uart2_device
;
1194 configure_usart2_pins(pins
);
1196 case AT91SAM9260_ID_US3
:
1197 pdev
= &at91sam9260_uart3_device
;
1198 configure_usart3_pins(pins
);
1200 case AT91SAM9260_ID_US4
:
1201 pdev
= &at91sam9260_uart4_device
;
1202 configure_usart4_pins();
1204 case AT91SAM9260_ID_US5
:
1205 pdev
= &at91sam9260_uart5_device
;
1206 configure_usart5_pins();
1211 pdata
= pdev
->dev
.platform_data
;
1212 pdata
->num
= portnr
; /* update to mapped ID */
1214 if (portnr
< ATMEL_MAX_UART
)
1215 at91_uarts
[portnr
] = pdev
;
1218 void __init
at91_add_device_serial(void)
1222 for (i
= 0; i
< ATMEL_MAX_UART
; i
++) {
1224 platform_device_register(at91_uarts
[i
]);
1228 void __init
at91_register_uart(unsigned id
, unsigned portnr
, unsigned pins
) {}
1229 void __init
at91_add_device_serial(void) {}
1232 /* --------------------------------------------------------------------
1234 * -------------------------------------------------------------------- */
1236 #if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
1237 defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
1239 static struct at91_cf_data cf0_data
;
1241 static struct resource cf0_resources
[] = {
1243 .start
= AT91_CHIPSELECT_4
,
1244 .end
= AT91_CHIPSELECT_4
+ SZ_256M
- 1,
1245 .flags
= IORESOURCE_MEM
,
1249 static struct platform_device cf0_device
= {
1252 .platform_data
= &cf0_data
,
1254 .resource
= cf0_resources
,
1255 .num_resources
= ARRAY_SIZE(cf0_resources
),
1258 static struct at91_cf_data cf1_data
;
1260 static struct resource cf1_resources
[] = {
1262 .start
= AT91_CHIPSELECT_5
,
1263 .end
= AT91_CHIPSELECT_5
+ SZ_256M
- 1,
1264 .flags
= IORESOURCE_MEM
,
1268 static struct platform_device cf1_device
= {
1271 .platform_data
= &cf1_data
,
1273 .resource
= cf1_resources
,
1274 .num_resources
= ARRAY_SIZE(cf1_resources
),
1277 void __init
at91_add_device_cf(struct at91_cf_data
*data
)
1279 struct platform_device
*pdev
;
1285 csa
= at91_matrix_read(AT91_MATRIX_EBICSA
);
1287 switch (data
->chipselect
) {
1289 at91_set_multi_drive(AT91_PIN_PC8
, 0);
1290 at91_set_A_periph(AT91_PIN_PC8
, 0);
1291 csa
|= AT91_MATRIX_CS4A_SMC_CF1
;
1296 at91_set_multi_drive(AT91_PIN_PC9
, 0);
1297 at91_set_A_periph(AT91_PIN_PC9
, 0);
1298 csa
|= AT91_MATRIX_CS5A_SMC_CF2
;
1303 printk(KERN_ERR
"AT91 CF: bad chip-select requested (%u)\n",
1308 at91_matrix_write(AT91_MATRIX_EBICSA
, csa
);
1310 if (gpio_is_valid(data
->rst_pin
)) {
1311 at91_set_multi_drive(data
->rst_pin
, 0);
1312 at91_set_gpio_output(data
->rst_pin
, 1);
1315 if (gpio_is_valid(data
->irq_pin
)) {
1316 at91_set_gpio_input(data
->irq_pin
, 0);
1317 at91_set_deglitch(data
->irq_pin
, 1);
1320 if (gpio_is_valid(data
->det_pin
)) {
1321 at91_set_gpio_input(data
->det_pin
, 0);
1322 at91_set_deglitch(data
->det_pin
, 1);
1325 at91_set_B_periph(AT91_PIN_PC6
, 0); /* CFCE1 */
1326 at91_set_B_periph(AT91_PIN_PC7
, 0); /* CFCE2 */
1327 at91_set_A_periph(AT91_PIN_PC10
, 0); /* CFRNW */
1328 at91_set_A_periph(AT91_PIN_PC15
, 1); /* NWAIT */
1330 if (data
->flags
& AT91_CF_TRUE_IDE
)
1331 #if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE)
1332 pdev
->name
= "pata_at91";
1334 #warning "board requires AT91_CF_TRUE_IDE: enable pata_at91"
1337 pdev
->name
= "at91_cf";
1339 platform_device_register(pdev
);
1343 void __init
at91_add_device_cf(struct at91_cf_data
* data
) {}
1346 /* --------------------------------------------------------------------
1348 * -------------------------------------------------------------------- */
1350 #if IS_ENABLED(CONFIG_AT91_ADC)
1351 static struct at91_adc_data adc_data
;
1353 static struct resource adc_resources
[] = {
1355 .start
= AT91SAM9260_BASE_ADC
,
1356 .end
= AT91SAM9260_BASE_ADC
+ SZ_16K
- 1,
1357 .flags
= IORESOURCE_MEM
,
1360 .start
= AT91SAM9260_ID_ADC
,
1361 .end
= AT91SAM9260_ID_ADC
,
1362 .flags
= IORESOURCE_IRQ
,
1366 static struct platform_device at91_adc_device
= {
1370 .platform_data
= &adc_data
,
1372 .resource
= adc_resources
,
1373 .num_resources
= ARRAY_SIZE(adc_resources
),
1376 static struct at91_adc_trigger at91_adc_triggers
[] = {
1378 .name
= "timer-counter-0",
1379 .value
= AT91_ADC_TRGSEL_TC0
| AT91_ADC_TRGEN
,
1382 .name
= "timer-counter-1",
1383 .value
= AT91_ADC_TRGSEL_TC1
| AT91_ADC_TRGEN
,
1386 .name
= "timer-counter-2",
1387 .value
= AT91_ADC_TRGSEL_TC2
| AT91_ADC_TRGEN
,
1391 .value
= AT91_ADC_TRGSEL_EXTERNAL
| AT91_ADC_TRGEN
,
1392 .is_external
= true,
1396 static struct at91_adc_reg_desc at91_adc_register_g20
= {
1397 .channel_base
= AT91_ADC_CHR(0),
1398 .drdy_mask
= AT91_ADC_DRDY
,
1399 .status_register
= AT91_ADC_SR
,
1400 .trigger_register
= AT91_ADC_MR
,
1403 void __init
at91_add_device_adc(struct at91_adc_data
*data
)
1408 if (test_bit(0, &data
->channels_used
))
1409 at91_set_A_periph(AT91_PIN_PC0
, 0);
1410 if (test_bit(1, &data
->channels_used
))
1411 at91_set_A_periph(AT91_PIN_PC1
, 0);
1412 if (test_bit(2, &data
->channels_used
))
1413 at91_set_A_periph(AT91_PIN_PC2
, 0);
1414 if (test_bit(3, &data
->channels_used
))
1415 at91_set_A_periph(AT91_PIN_PC3
, 0);
1417 if (data
->use_external_triggers
)
1418 at91_set_A_periph(AT91_PIN_PA22
, 0);
1420 data
->num_channels
= 4;
1421 data
->startup_time
= 10;
1422 data
->registers
= &at91_adc_register_g20
;
1423 data
->trigger_number
= 4;
1424 data
->trigger_list
= at91_adc_triggers
;
1427 platform_device_register(&at91_adc_device
);
1430 void __init
at91_add_device_adc(struct at91_adc_data
*data
) {}
1433 /* -------------------------------------------------------------------- */
1435 * These devices are always present and don't need any board-specific
1438 static int __init
at91_add_standard_devices(void)
1440 if (of_have_populated_dt())
1443 at91_add_device_rtt();
1444 at91_add_device_watchdog();
1445 at91_add_device_tc();
1449 arch_initcall(at91_add_standard_devices
);