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ARM: at91/tc: add device tree support to atmel_tclib
[deliverable/linux.git] / arch / arm / mach-at91 / at91sam9260_devices.c
1 /*
2 * arch/arm/mach-at91/at91sam9260_devices.c
3 *
4 * Copyright (C) 2006 Atmel
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 */
12 #include <asm/mach/arch.h>
13 #include <asm/mach/map.h>
14
15 #include <linux/dma-mapping.h>
16 #include <linux/gpio.h>
17 #include <linux/platform_device.h>
18 #include <linux/i2c-gpio.h>
19
20 #include <mach/board.h>
21 #include <mach/cpu.h>
22 #include <mach/at91sam9260.h>
23 #include <mach/at91sam9260_matrix.h>
24 #include <mach/at91_matrix.h>
25 #include <mach/at91sam9_smc.h>
26
27 #include "generic.h"
28
29
30 /* --------------------------------------------------------------------
31 * USB Host
32 * -------------------------------------------------------------------- */
33
34 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
35 static u64 ohci_dmamask = DMA_BIT_MASK(32);
36 static struct at91_usbh_data usbh_data;
37
38 static struct resource usbh_resources[] = {
39 [0] = {
40 .start = AT91SAM9260_UHP_BASE,
41 .end = AT91SAM9260_UHP_BASE + SZ_1M - 1,
42 .flags = IORESOURCE_MEM,
43 },
44 [1] = {
45 .start = AT91SAM9260_ID_UHP,
46 .end = AT91SAM9260_ID_UHP,
47 .flags = IORESOURCE_IRQ,
48 },
49 };
50
51 static struct platform_device at91_usbh_device = {
52 .name = "at91_ohci",
53 .id = -1,
54 .dev = {
55 .dma_mask = &ohci_dmamask,
56 .coherent_dma_mask = DMA_BIT_MASK(32),
57 .platform_data = &usbh_data,
58 },
59 .resource = usbh_resources,
60 .num_resources = ARRAY_SIZE(usbh_resources),
61 };
62
63 void __init at91_add_device_usbh(struct at91_usbh_data *data)
64 {
65 int i;
66
67 if (!data)
68 return;
69
70 /* Enable overcurrent notification */
71 for (i = 0; i < data->ports; i++) {
72 if (data->overcurrent_pin[i])
73 at91_set_gpio_input(data->overcurrent_pin[i], 1);
74 }
75
76 usbh_data = *data;
77 platform_device_register(&at91_usbh_device);
78 }
79 #else
80 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
81 #endif
82
83
84 /* --------------------------------------------------------------------
85 * USB Device (Gadget)
86 * -------------------------------------------------------------------- */
87
88 #ifdef CONFIG_USB_AT91
89 static struct at91_udc_data udc_data;
90
91 static struct resource udc_resources[] = {
92 [0] = {
93 .start = AT91SAM9260_BASE_UDP,
94 .end = AT91SAM9260_BASE_UDP + SZ_16K - 1,
95 .flags = IORESOURCE_MEM,
96 },
97 [1] = {
98 .start = AT91SAM9260_ID_UDP,
99 .end = AT91SAM9260_ID_UDP,
100 .flags = IORESOURCE_IRQ,
101 },
102 };
103
104 static struct platform_device at91_udc_device = {
105 .name = "at91_udc",
106 .id = -1,
107 .dev = {
108 .platform_data = &udc_data,
109 },
110 .resource = udc_resources,
111 .num_resources = ARRAY_SIZE(udc_resources),
112 };
113
114 void __init at91_add_device_udc(struct at91_udc_data *data)
115 {
116 if (!data)
117 return;
118
119 if (gpio_is_valid(data->vbus_pin)) {
120 at91_set_gpio_input(data->vbus_pin, 0);
121 at91_set_deglitch(data->vbus_pin, 1);
122 }
123
124 /* Pullup pin is handled internally by USB device peripheral */
125
126 udc_data = *data;
127 platform_device_register(&at91_udc_device);
128 }
129 #else
130 void __init at91_add_device_udc(struct at91_udc_data *data) {}
131 #endif
132
133
134 /* --------------------------------------------------------------------
135 * Ethernet
136 * -------------------------------------------------------------------- */
137
138 #if defined(CONFIG_MACB) || defined(CONFIG_MACB_MODULE)
139 static u64 eth_dmamask = DMA_BIT_MASK(32);
140 static struct macb_platform_data eth_data;
141
142 static struct resource eth_resources[] = {
143 [0] = {
144 .start = AT91SAM9260_BASE_EMAC,
145 .end = AT91SAM9260_BASE_EMAC + SZ_16K - 1,
146 .flags = IORESOURCE_MEM,
147 },
148 [1] = {
149 .start = AT91SAM9260_ID_EMAC,
150 .end = AT91SAM9260_ID_EMAC,
151 .flags = IORESOURCE_IRQ,
152 },
153 };
154
155 static struct platform_device at91sam9260_eth_device = {
156 .name = "macb",
157 .id = -1,
158 .dev = {
159 .dma_mask = &eth_dmamask,
160 .coherent_dma_mask = DMA_BIT_MASK(32),
161 .platform_data = &eth_data,
162 },
163 .resource = eth_resources,
164 .num_resources = ARRAY_SIZE(eth_resources),
165 };
166
167 void __init at91_add_device_eth(struct macb_platform_data *data)
168 {
169 if (!data)
170 return;
171
172 if (gpio_is_valid(data->phy_irq_pin)) {
173 at91_set_gpio_input(data->phy_irq_pin, 0);
174 at91_set_deglitch(data->phy_irq_pin, 1);
175 }
176
177 /* Pins used for MII and RMII */
178 at91_set_A_periph(AT91_PIN_PA19, 0); /* ETXCK_EREFCK */
179 at91_set_A_periph(AT91_PIN_PA17, 0); /* ERXDV */
180 at91_set_A_periph(AT91_PIN_PA14, 0); /* ERX0 */
181 at91_set_A_periph(AT91_PIN_PA15, 0); /* ERX1 */
182 at91_set_A_periph(AT91_PIN_PA18, 0); /* ERXER */
183 at91_set_A_periph(AT91_PIN_PA16, 0); /* ETXEN */
184 at91_set_A_periph(AT91_PIN_PA12, 0); /* ETX0 */
185 at91_set_A_periph(AT91_PIN_PA13, 0); /* ETX1 */
186 at91_set_A_periph(AT91_PIN_PA21, 0); /* EMDIO */
187 at91_set_A_periph(AT91_PIN_PA20, 0); /* EMDC */
188
189 if (!data->is_rmii) {
190 at91_set_B_periph(AT91_PIN_PA28, 0); /* ECRS */
191 at91_set_B_periph(AT91_PIN_PA29, 0); /* ECOL */
192 at91_set_B_periph(AT91_PIN_PA25, 0); /* ERX2 */
193 at91_set_B_periph(AT91_PIN_PA26, 0); /* ERX3 */
194 at91_set_B_periph(AT91_PIN_PA27, 0); /* ERXCK */
195 at91_set_B_periph(AT91_PIN_PA23, 0); /* ETX2 */
196 at91_set_B_periph(AT91_PIN_PA24, 0); /* ETX3 */
197 at91_set_B_periph(AT91_PIN_PA22, 0); /* ETXER */
198 }
199
200 eth_data = *data;
201 platform_device_register(&at91sam9260_eth_device);
202 }
203 #else
204 void __init at91_add_device_eth(struct macb_platform_data *data) {}
205 #endif
206
207
208 /* --------------------------------------------------------------------
209 * MMC / SD
210 * -------------------------------------------------------------------- */
211
212 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
213 static u64 mmc_dmamask = DMA_BIT_MASK(32);
214 static struct at91_mmc_data mmc_data;
215
216 static struct resource mmc_resources[] = {
217 [0] = {
218 .start = AT91SAM9260_BASE_MCI,
219 .end = AT91SAM9260_BASE_MCI + SZ_16K - 1,
220 .flags = IORESOURCE_MEM,
221 },
222 [1] = {
223 .start = AT91SAM9260_ID_MCI,
224 .end = AT91SAM9260_ID_MCI,
225 .flags = IORESOURCE_IRQ,
226 },
227 };
228
229 static struct platform_device at91sam9260_mmc_device = {
230 .name = "at91_mci",
231 .id = -1,
232 .dev = {
233 .dma_mask = &mmc_dmamask,
234 .coherent_dma_mask = DMA_BIT_MASK(32),
235 .platform_data = &mmc_data,
236 },
237 .resource = mmc_resources,
238 .num_resources = ARRAY_SIZE(mmc_resources),
239 };
240
241 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
242 {
243 if (!data)
244 return;
245
246 /* input/irq */
247 if (gpio_is_valid(data->det_pin)) {
248 at91_set_gpio_input(data->det_pin, 1);
249 at91_set_deglitch(data->det_pin, 1);
250 }
251 if (gpio_is_valid(data->wp_pin))
252 at91_set_gpio_input(data->wp_pin, 1);
253 if (gpio_is_valid(data->vcc_pin))
254 at91_set_gpio_output(data->vcc_pin, 0);
255
256 /* CLK */
257 at91_set_A_periph(AT91_PIN_PA8, 0);
258
259 if (data->slot_b) {
260 /* CMD */
261 at91_set_B_periph(AT91_PIN_PA1, 1);
262
263 /* DAT0, maybe DAT1..DAT3 */
264 at91_set_B_periph(AT91_PIN_PA0, 1);
265 if (data->wire4) {
266 at91_set_B_periph(AT91_PIN_PA5, 1);
267 at91_set_B_periph(AT91_PIN_PA4, 1);
268 at91_set_B_periph(AT91_PIN_PA3, 1);
269 }
270 } else {
271 /* CMD */
272 at91_set_A_periph(AT91_PIN_PA7, 1);
273
274 /* DAT0, maybe DAT1..DAT3 */
275 at91_set_A_periph(AT91_PIN_PA6, 1);
276 if (data->wire4) {
277 at91_set_A_periph(AT91_PIN_PA9, 1);
278 at91_set_A_periph(AT91_PIN_PA10, 1);
279 at91_set_A_periph(AT91_PIN_PA11, 1);
280 }
281 }
282
283 mmc_data = *data;
284 platform_device_register(&at91sam9260_mmc_device);
285 }
286 #else
287 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
288 #endif
289
290 /* --------------------------------------------------------------------
291 * MMC / SD Slot for Atmel MCI Driver
292 * -------------------------------------------------------------------- */
293
294 #if defined(CONFIG_MMC_ATMELMCI) || defined(CONFIG_MMC_ATMELMCI_MODULE)
295 static u64 mmc_dmamask = DMA_BIT_MASK(32);
296 static struct mci_platform_data mmc_data;
297
298 static struct resource mmc_resources[] = {
299 [0] = {
300 .start = AT91SAM9260_BASE_MCI,
301 .end = AT91SAM9260_BASE_MCI + SZ_16K - 1,
302 .flags = IORESOURCE_MEM,
303 },
304 [1] = {
305 .start = AT91SAM9260_ID_MCI,
306 .end = AT91SAM9260_ID_MCI,
307 .flags = IORESOURCE_IRQ,
308 },
309 };
310
311 static struct platform_device at91sam9260_mmc_device = {
312 .name = "atmel_mci",
313 .id = -1,
314 .dev = {
315 .dma_mask = &mmc_dmamask,
316 .coherent_dma_mask = DMA_BIT_MASK(32),
317 .platform_data = &mmc_data,
318 },
319 .resource = mmc_resources,
320 .num_resources = ARRAY_SIZE(mmc_resources),
321 };
322
323 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data)
324 {
325 unsigned int i;
326 unsigned int slot_count = 0;
327
328 if (!data)
329 return;
330
331 for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) {
332 if (data->slot[i].bus_width) {
333 /* input/irq */
334 if (gpio_is_valid(data->slot[i].detect_pin)) {
335 at91_set_gpio_input(data->slot[i].detect_pin, 1);
336 at91_set_deglitch(data->slot[i].detect_pin, 1);
337 }
338 if (gpio_is_valid(data->slot[i].wp_pin))
339 at91_set_gpio_input(data->slot[i].wp_pin, 1);
340
341 switch (i) {
342 case 0:
343 /* CMD */
344 at91_set_A_periph(AT91_PIN_PA7, 1);
345 /* DAT0, maybe DAT1..DAT3 */
346 at91_set_A_periph(AT91_PIN_PA6, 1);
347 if (data->slot[i].bus_width == 4) {
348 at91_set_A_periph(AT91_PIN_PA9, 1);
349 at91_set_A_periph(AT91_PIN_PA10, 1);
350 at91_set_A_periph(AT91_PIN_PA11, 1);
351 }
352 slot_count++;
353 break;
354 case 1:
355 /* CMD */
356 at91_set_B_periph(AT91_PIN_PA1, 1);
357 /* DAT0, maybe DAT1..DAT3 */
358 at91_set_B_periph(AT91_PIN_PA0, 1);
359 if (data->slot[i].bus_width == 4) {
360 at91_set_B_periph(AT91_PIN_PA5, 1);
361 at91_set_B_periph(AT91_PIN_PA4, 1);
362 at91_set_B_periph(AT91_PIN_PA3, 1);
363 }
364 slot_count++;
365 break;
366 default:
367 printk(KERN_ERR
368 "AT91: SD/MMC slot %d not available\n", i);
369 break;
370 }
371 }
372 }
373
374 if (slot_count) {
375 /* CLK */
376 at91_set_A_periph(AT91_PIN_PA8, 0);
377
378 mmc_data = *data;
379 platform_device_register(&at91sam9260_mmc_device);
380 }
381 }
382 #else
383 void __init at91_add_device_mci(short mmc_id, struct mci_platform_data *data) {}
384 #endif
385
386
387 /* --------------------------------------------------------------------
388 * NAND / SmartMedia
389 * -------------------------------------------------------------------- */
390
391 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
392 static struct atmel_nand_data nand_data;
393
394 #define NAND_BASE AT91_CHIPSELECT_3
395
396 static struct resource nand_resources[] = {
397 [0] = {
398 .start = NAND_BASE,
399 .end = NAND_BASE + SZ_256M - 1,
400 .flags = IORESOURCE_MEM,
401 },
402 [1] = {
403 .start = AT91SAM9260_BASE_ECC,
404 .end = AT91SAM9260_BASE_ECC + SZ_512 - 1,
405 .flags = IORESOURCE_MEM,
406 }
407 };
408
409 static struct platform_device at91sam9260_nand_device = {
410 .name = "atmel_nand",
411 .id = -1,
412 .dev = {
413 .platform_data = &nand_data,
414 },
415 .resource = nand_resources,
416 .num_resources = ARRAY_SIZE(nand_resources),
417 };
418
419 void __init at91_add_device_nand(struct atmel_nand_data *data)
420 {
421 unsigned long csa;
422
423 if (!data)
424 return;
425
426 csa = at91_matrix_read(AT91_MATRIX_EBICSA);
427 at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
428
429 /* enable pin */
430 if (gpio_is_valid(data->enable_pin))
431 at91_set_gpio_output(data->enable_pin, 1);
432
433 /* ready/busy pin */
434 if (gpio_is_valid(data->rdy_pin))
435 at91_set_gpio_input(data->rdy_pin, 1);
436
437 /* card detect pin */
438 if (gpio_is_valid(data->det_pin))
439 at91_set_gpio_input(data->det_pin, 1);
440
441 nand_data = *data;
442 platform_device_register(&at91sam9260_nand_device);
443 }
444 #else
445 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
446 #endif
447
448
449 /* --------------------------------------------------------------------
450 * TWI (i2c)
451 * -------------------------------------------------------------------- */
452
453 /*
454 * Prefer the GPIO code since the TWI controller isn't robust
455 * (gets overruns and underruns under load) and can only issue
456 * repeated STARTs in one scenario (the driver doesn't yet handle them).
457 */
458
459 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
460
461 static struct i2c_gpio_platform_data pdata = {
462 .sda_pin = AT91_PIN_PA23,
463 .sda_is_open_drain = 1,
464 .scl_pin = AT91_PIN_PA24,
465 .scl_is_open_drain = 1,
466 .udelay = 2, /* ~100 kHz */
467 };
468
469 static struct platform_device at91sam9260_twi_device = {
470 .name = "i2c-gpio",
471 .id = -1,
472 .dev.platform_data = &pdata,
473 };
474
475 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
476 {
477 at91_set_GPIO_periph(AT91_PIN_PA23, 1); /* TWD (SDA) */
478 at91_set_multi_drive(AT91_PIN_PA23, 1);
479
480 at91_set_GPIO_periph(AT91_PIN_PA24, 1); /* TWCK (SCL) */
481 at91_set_multi_drive(AT91_PIN_PA24, 1);
482
483 i2c_register_board_info(0, devices, nr_devices);
484 platform_device_register(&at91sam9260_twi_device);
485 }
486
487 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
488
489 static struct resource twi_resources[] = {
490 [0] = {
491 .start = AT91SAM9260_BASE_TWI,
492 .end = AT91SAM9260_BASE_TWI + SZ_16K - 1,
493 .flags = IORESOURCE_MEM,
494 },
495 [1] = {
496 .start = AT91SAM9260_ID_TWI,
497 .end = AT91SAM9260_ID_TWI,
498 .flags = IORESOURCE_IRQ,
499 },
500 };
501
502 static struct platform_device at91sam9260_twi_device = {
503 .name = "at91_i2c",
504 .id = -1,
505 .resource = twi_resources,
506 .num_resources = ARRAY_SIZE(twi_resources),
507 };
508
509 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
510 {
511 /* pins used for TWI interface */
512 at91_set_A_periph(AT91_PIN_PA23, 0); /* TWD */
513 at91_set_multi_drive(AT91_PIN_PA23, 1);
514
515 at91_set_A_periph(AT91_PIN_PA24, 0); /* TWCK */
516 at91_set_multi_drive(AT91_PIN_PA24, 1);
517
518 i2c_register_board_info(0, devices, nr_devices);
519 platform_device_register(&at91sam9260_twi_device);
520 }
521 #else
522 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
523 #endif
524
525
526 /* --------------------------------------------------------------------
527 * SPI
528 * -------------------------------------------------------------------- */
529
530 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
531 static u64 spi_dmamask = DMA_BIT_MASK(32);
532
533 static struct resource spi0_resources[] = {
534 [0] = {
535 .start = AT91SAM9260_BASE_SPI0,
536 .end = AT91SAM9260_BASE_SPI0 + SZ_16K - 1,
537 .flags = IORESOURCE_MEM,
538 },
539 [1] = {
540 .start = AT91SAM9260_ID_SPI0,
541 .end = AT91SAM9260_ID_SPI0,
542 .flags = IORESOURCE_IRQ,
543 },
544 };
545
546 static struct platform_device at91sam9260_spi0_device = {
547 .name = "atmel_spi",
548 .id = 0,
549 .dev = {
550 .dma_mask = &spi_dmamask,
551 .coherent_dma_mask = DMA_BIT_MASK(32),
552 },
553 .resource = spi0_resources,
554 .num_resources = ARRAY_SIZE(spi0_resources),
555 };
556
557 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PC11, AT91_PIN_PC16, AT91_PIN_PC17 };
558
559 static struct resource spi1_resources[] = {
560 [0] = {
561 .start = AT91SAM9260_BASE_SPI1,
562 .end = AT91SAM9260_BASE_SPI1 + SZ_16K - 1,
563 .flags = IORESOURCE_MEM,
564 },
565 [1] = {
566 .start = AT91SAM9260_ID_SPI1,
567 .end = AT91SAM9260_ID_SPI1,
568 .flags = IORESOURCE_IRQ,
569 },
570 };
571
572 static struct platform_device at91sam9260_spi1_device = {
573 .name = "atmel_spi",
574 .id = 1,
575 .dev = {
576 .dma_mask = &spi_dmamask,
577 .coherent_dma_mask = DMA_BIT_MASK(32),
578 },
579 .resource = spi1_resources,
580 .num_resources = ARRAY_SIZE(spi1_resources),
581 };
582
583 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB3, AT91_PIN_PC5, AT91_PIN_PC4, AT91_PIN_PC3 };
584
585 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
586 {
587 int i;
588 unsigned long cs_pin;
589 short enable_spi0 = 0;
590 short enable_spi1 = 0;
591
592 /* Choose SPI chip-selects */
593 for (i = 0; i < nr_devices; i++) {
594 if (devices[i].controller_data)
595 cs_pin = (unsigned long) devices[i].controller_data;
596 else if (devices[i].bus_num == 0)
597 cs_pin = spi0_standard_cs[devices[i].chip_select];
598 else
599 cs_pin = spi1_standard_cs[devices[i].chip_select];
600
601 if (devices[i].bus_num == 0)
602 enable_spi0 = 1;
603 else
604 enable_spi1 = 1;
605
606 /* enable chip-select pin */
607 at91_set_gpio_output(cs_pin, 1);
608
609 /* pass chip-select pin to driver */
610 devices[i].controller_data = (void *) cs_pin;
611 }
612
613 spi_register_board_info(devices, nr_devices);
614
615 /* Configure SPI bus(es) */
616 if (enable_spi0) {
617 at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
618 at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
619 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI1_SPCK */
620
621 platform_device_register(&at91sam9260_spi0_device);
622 }
623 if (enable_spi1) {
624 at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI1_MISO */
625 at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI1_MOSI */
626 at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI1_SPCK */
627
628 platform_device_register(&at91sam9260_spi1_device);
629 }
630 }
631 #else
632 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
633 #endif
634
635
636 /* --------------------------------------------------------------------
637 * Timer/Counter blocks
638 * -------------------------------------------------------------------- */
639
640 #ifdef CONFIG_ATMEL_TCLIB
641
642 static struct resource tcb0_resources[] = {
643 [0] = {
644 .start = AT91SAM9260_BASE_TCB0,
645 .end = AT91SAM9260_BASE_TCB0 + SZ_256 - 1,
646 .flags = IORESOURCE_MEM,
647 },
648 [1] = {
649 .start = AT91SAM9260_ID_TC0,
650 .end = AT91SAM9260_ID_TC0,
651 .flags = IORESOURCE_IRQ,
652 },
653 [2] = {
654 .start = AT91SAM9260_ID_TC1,
655 .end = AT91SAM9260_ID_TC1,
656 .flags = IORESOURCE_IRQ,
657 },
658 [3] = {
659 .start = AT91SAM9260_ID_TC2,
660 .end = AT91SAM9260_ID_TC2,
661 .flags = IORESOURCE_IRQ,
662 },
663 };
664
665 static struct platform_device at91sam9260_tcb0_device = {
666 .name = "atmel_tcb",
667 .id = 0,
668 .resource = tcb0_resources,
669 .num_resources = ARRAY_SIZE(tcb0_resources),
670 };
671
672 static struct resource tcb1_resources[] = {
673 [0] = {
674 .start = AT91SAM9260_BASE_TCB1,
675 .end = AT91SAM9260_BASE_TCB1 + SZ_256 - 1,
676 .flags = IORESOURCE_MEM,
677 },
678 [1] = {
679 .start = AT91SAM9260_ID_TC3,
680 .end = AT91SAM9260_ID_TC3,
681 .flags = IORESOURCE_IRQ,
682 },
683 [2] = {
684 .start = AT91SAM9260_ID_TC4,
685 .end = AT91SAM9260_ID_TC4,
686 .flags = IORESOURCE_IRQ,
687 },
688 [3] = {
689 .start = AT91SAM9260_ID_TC5,
690 .end = AT91SAM9260_ID_TC5,
691 .flags = IORESOURCE_IRQ,
692 },
693 };
694
695 static struct platform_device at91sam9260_tcb1_device = {
696 .name = "atmel_tcb",
697 .id = 1,
698 .resource = tcb1_resources,
699 .num_resources = ARRAY_SIZE(tcb1_resources),
700 };
701
702 #if defined(CONFIG_OF)
703 static struct of_device_id tcb_ids[] = {
704 { .compatible = "atmel,at91rm9200-tcb" },
705 { /*sentinel*/ }
706 };
707 #endif
708
709 static void __init at91_add_device_tc(void)
710 {
711 #if defined(CONFIG_OF)
712 struct device_node *np;
713
714 np = of_find_matching_node(NULL, tcb_ids);
715 if (np) {
716 of_node_put(np);
717 return;
718 }
719 #endif
720
721 platform_device_register(&at91sam9260_tcb0_device);
722 platform_device_register(&at91sam9260_tcb1_device);
723 }
724 #else
725 static void __init at91_add_device_tc(void) { }
726 #endif
727
728
729 /* --------------------------------------------------------------------
730 * RTT
731 * -------------------------------------------------------------------- */
732
733 static struct resource rtt_resources[] = {
734 {
735 .start = AT91SAM9260_BASE_RTT,
736 .end = AT91SAM9260_BASE_RTT + SZ_16 - 1,
737 .flags = IORESOURCE_MEM,
738 }, {
739 .flags = IORESOURCE_MEM,
740 },
741 };
742
743 static struct platform_device at91sam9260_rtt_device = {
744 .name = "at91_rtt",
745 .id = 0,
746 .resource = rtt_resources,
747 };
748
749
750 #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
751 static void __init at91_add_device_rtt_rtc(void)
752 {
753 at91sam9260_rtt_device.name = "rtc-at91sam9";
754 /*
755 * The second resource is needed:
756 * GPBR will serve as the storage for RTC time offset
757 */
758 at91sam9260_rtt_device.num_resources = 2;
759 rtt_resources[1].start = AT91SAM9260_BASE_GPBR +
760 4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
761 rtt_resources[1].end = rtt_resources[1].start + 3;
762 }
763 #else
764 static void __init at91_add_device_rtt_rtc(void)
765 {
766 /* Only one resource is needed: RTT not used as RTC */
767 at91sam9260_rtt_device.num_resources = 1;
768 }
769 #endif
770
771 static void __init at91_add_device_rtt(void)
772 {
773 at91_add_device_rtt_rtc();
774 platform_device_register(&at91sam9260_rtt_device);
775 }
776
777
778 /* --------------------------------------------------------------------
779 * Watchdog
780 * -------------------------------------------------------------------- */
781
782 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
783 static struct resource wdt_resources[] = {
784 {
785 .start = AT91SAM9260_BASE_WDT,
786 .end = AT91SAM9260_BASE_WDT + SZ_16 - 1,
787 .flags = IORESOURCE_MEM,
788 }
789 };
790
791 static struct platform_device at91sam9260_wdt_device = {
792 .name = "at91_wdt",
793 .id = -1,
794 .resource = wdt_resources,
795 .num_resources = ARRAY_SIZE(wdt_resources),
796 };
797
798 static void __init at91_add_device_watchdog(void)
799 {
800 platform_device_register(&at91sam9260_wdt_device);
801 }
802 #else
803 static void __init at91_add_device_watchdog(void) {}
804 #endif
805
806
807 /* --------------------------------------------------------------------
808 * SSC -- Synchronous Serial Controller
809 * -------------------------------------------------------------------- */
810
811 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
812 static u64 ssc_dmamask = DMA_BIT_MASK(32);
813
814 static struct resource ssc_resources[] = {
815 [0] = {
816 .start = AT91SAM9260_BASE_SSC,
817 .end = AT91SAM9260_BASE_SSC + SZ_16K - 1,
818 .flags = IORESOURCE_MEM,
819 },
820 [1] = {
821 .start = AT91SAM9260_ID_SSC,
822 .end = AT91SAM9260_ID_SSC,
823 .flags = IORESOURCE_IRQ,
824 },
825 };
826
827 static struct platform_device at91sam9260_ssc_device = {
828 .name = "ssc",
829 .id = 0,
830 .dev = {
831 .dma_mask = &ssc_dmamask,
832 .coherent_dma_mask = DMA_BIT_MASK(32),
833 },
834 .resource = ssc_resources,
835 .num_resources = ARRAY_SIZE(ssc_resources),
836 };
837
838 static inline void configure_ssc_pins(unsigned pins)
839 {
840 if (pins & ATMEL_SSC_TF)
841 at91_set_A_periph(AT91_PIN_PB17, 1);
842 if (pins & ATMEL_SSC_TK)
843 at91_set_A_periph(AT91_PIN_PB16, 1);
844 if (pins & ATMEL_SSC_TD)
845 at91_set_A_periph(AT91_PIN_PB18, 1);
846 if (pins & ATMEL_SSC_RD)
847 at91_set_A_periph(AT91_PIN_PB19, 1);
848 if (pins & ATMEL_SSC_RK)
849 at91_set_A_periph(AT91_PIN_PB20, 1);
850 if (pins & ATMEL_SSC_RF)
851 at91_set_A_periph(AT91_PIN_PB21, 1);
852 }
853
854 /*
855 * SSC controllers are accessed through library code, instead of any
856 * kind of all-singing/all-dancing driver. For example one could be
857 * used by a particular I2S audio codec's driver, while another one
858 * on the same system might be used by a custom data capture driver.
859 */
860 void __init at91_add_device_ssc(unsigned id, unsigned pins)
861 {
862 struct platform_device *pdev;
863
864 /*
865 * NOTE: caller is responsible for passing information matching
866 * "pins" to whatever will be using each particular controller.
867 */
868 switch (id) {
869 case AT91SAM9260_ID_SSC:
870 pdev = &at91sam9260_ssc_device;
871 configure_ssc_pins(pins);
872 break;
873 default:
874 return;
875 }
876
877 platform_device_register(pdev);
878 }
879
880 #else
881 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
882 #endif
883
884
885 /* --------------------------------------------------------------------
886 * UART
887 * -------------------------------------------------------------------- */
888 #if defined(CONFIG_SERIAL_ATMEL)
889 static struct resource dbgu_resources[] = {
890 [0] = {
891 .start = AT91SAM9260_BASE_DBGU,
892 .end = AT91SAM9260_BASE_DBGU + SZ_512 - 1,
893 .flags = IORESOURCE_MEM,
894 },
895 [1] = {
896 .start = AT91_ID_SYS,
897 .end = AT91_ID_SYS,
898 .flags = IORESOURCE_IRQ,
899 },
900 };
901
902 static struct atmel_uart_data dbgu_data = {
903 .use_dma_tx = 0,
904 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
905 };
906
907 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
908
909 static struct platform_device at91sam9260_dbgu_device = {
910 .name = "atmel_usart",
911 .id = 0,
912 .dev = {
913 .dma_mask = &dbgu_dmamask,
914 .coherent_dma_mask = DMA_BIT_MASK(32),
915 .platform_data = &dbgu_data,
916 },
917 .resource = dbgu_resources,
918 .num_resources = ARRAY_SIZE(dbgu_resources),
919 };
920
921 static inline void configure_dbgu_pins(void)
922 {
923 at91_set_A_periph(AT91_PIN_PB14, 0); /* DRXD */
924 at91_set_A_periph(AT91_PIN_PB15, 1); /* DTXD */
925 }
926
927 static struct resource uart0_resources[] = {
928 [0] = {
929 .start = AT91SAM9260_BASE_US0,
930 .end = AT91SAM9260_BASE_US0 + SZ_16K - 1,
931 .flags = IORESOURCE_MEM,
932 },
933 [1] = {
934 .start = AT91SAM9260_ID_US0,
935 .end = AT91SAM9260_ID_US0,
936 .flags = IORESOURCE_IRQ,
937 },
938 };
939
940 static struct atmel_uart_data uart0_data = {
941 .use_dma_tx = 1,
942 .use_dma_rx = 1,
943 };
944
945 static u64 uart0_dmamask = DMA_BIT_MASK(32);
946
947 static struct platform_device at91sam9260_uart0_device = {
948 .name = "atmel_usart",
949 .id = 1,
950 .dev = {
951 .dma_mask = &uart0_dmamask,
952 .coherent_dma_mask = DMA_BIT_MASK(32),
953 .platform_data = &uart0_data,
954 },
955 .resource = uart0_resources,
956 .num_resources = ARRAY_SIZE(uart0_resources),
957 };
958
959 static inline void configure_usart0_pins(unsigned pins)
960 {
961 at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD0 */
962 at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD0 */
963
964 if (pins & ATMEL_UART_RTS)
965 at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS0 */
966 if (pins & ATMEL_UART_CTS)
967 at91_set_A_periph(AT91_PIN_PB27, 0); /* CTS0 */
968 if (pins & ATMEL_UART_DTR)
969 at91_set_A_periph(AT91_PIN_PB24, 0); /* DTR0 */
970 if (pins & ATMEL_UART_DSR)
971 at91_set_A_periph(AT91_PIN_PB22, 0); /* DSR0 */
972 if (pins & ATMEL_UART_DCD)
973 at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD0 */
974 if (pins & ATMEL_UART_RI)
975 at91_set_A_periph(AT91_PIN_PB25, 0); /* RI0 */
976 }
977
978 static struct resource uart1_resources[] = {
979 [0] = {
980 .start = AT91SAM9260_BASE_US1,
981 .end = AT91SAM9260_BASE_US1 + SZ_16K - 1,
982 .flags = IORESOURCE_MEM,
983 },
984 [1] = {
985 .start = AT91SAM9260_ID_US1,
986 .end = AT91SAM9260_ID_US1,
987 .flags = IORESOURCE_IRQ,
988 },
989 };
990
991 static struct atmel_uart_data uart1_data = {
992 .use_dma_tx = 1,
993 .use_dma_rx = 1,
994 };
995
996 static u64 uart1_dmamask = DMA_BIT_MASK(32);
997
998 static struct platform_device at91sam9260_uart1_device = {
999 .name = "atmel_usart",
1000 .id = 2,
1001 .dev = {
1002 .dma_mask = &uart1_dmamask,
1003 .coherent_dma_mask = DMA_BIT_MASK(32),
1004 .platform_data = &uart1_data,
1005 },
1006 .resource = uart1_resources,
1007 .num_resources = ARRAY_SIZE(uart1_resources),
1008 };
1009
1010 static inline void configure_usart1_pins(unsigned pins)
1011 {
1012 at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD1 */
1013 at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD1 */
1014
1015 if (pins & ATMEL_UART_RTS)
1016 at91_set_A_periph(AT91_PIN_PB28, 0); /* RTS1 */
1017 if (pins & ATMEL_UART_CTS)
1018 at91_set_A_periph(AT91_PIN_PB29, 0); /* CTS1 */
1019 }
1020
1021 static struct resource uart2_resources[] = {
1022 [0] = {
1023 .start = AT91SAM9260_BASE_US2,
1024 .end = AT91SAM9260_BASE_US2 + SZ_16K - 1,
1025 .flags = IORESOURCE_MEM,
1026 },
1027 [1] = {
1028 .start = AT91SAM9260_ID_US2,
1029 .end = AT91SAM9260_ID_US2,
1030 .flags = IORESOURCE_IRQ,
1031 },
1032 };
1033
1034 static struct atmel_uart_data uart2_data = {
1035 .use_dma_tx = 1,
1036 .use_dma_rx = 1,
1037 };
1038
1039 static u64 uart2_dmamask = DMA_BIT_MASK(32);
1040
1041 static struct platform_device at91sam9260_uart2_device = {
1042 .name = "atmel_usart",
1043 .id = 3,
1044 .dev = {
1045 .dma_mask = &uart2_dmamask,
1046 .coherent_dma_mask = DMA_BIT_MASK(32),
1047 .platform_data = &uart2_data,
1048 },
1049 .resource = uart2_resources,
1050 .num_resources = ARRAY_SIZE(uart2_resources),
1051 };
1052
1053 static inline void configure_usart2_pins(unsigned pins)
1054 {
1055 at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD2 */
1056 at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD2 */
1057
1058 if (pins & ATMEL_UART_RTS)
1059 at91_set_A_periph(AT91_PIN_PA4, 0); /* RTS2 */
1060 if (pins & ATMEL_UART_CTS)
1061 at91_set_A_periph(AT91_PIN_PA5, 0); /* CTS2 */
1062 }
1063
1064 static struct resource uart3_resources[] = {
1065 [0] = {
1066 .start = AT91SAM9260_BASE_US3,
1067 .end = AT91SAM9260_BASE_US3 + SZ_16K - 1,
1068 .flags = IORESOURCE_MEM,
1069 },
1070 [1] = {
1071 .start = AT91SAM9260_ID_US3,
1072 .end = AT91SAM9260_ID_US3,
1073 .flags = IORESOURCE_IRQ,
1074 },
1075 };
1076
1077 static struct atmel_uart_data uart3_data = {
1078 .use_dma_tx = 1,
1079 .use_dma_rx = 1,
1080 };
1081
1082 static u64 uart3_dmamask = DMA_BIT_MASK(32);
1083
1084 static struct platform_device at91sam9260_uart3_device = {
1085 .name = "atmel_usart",
1086 .id = 4,
1087 .dev = {
1088 .dma_mask = &uart3_dmamask,
1089 .coherent_dma_mask = DMA_BIT_MASK(32),
1090 .platform_data = &uart3_data,
1091 },
1092 .resource = uart3_resources,
1093 .num_resources = ARRAY_SIZE(uart3_resources),
1094 };
1095
1096 static inline void configure_usart3_pins(unsigned pins)
1097 {
1098 at91_set_A_periph(AT91_PIN_PB10, 1); /* TXD3 */
1099 at91_set_A_periph(AT91_PIN_PB11, 0); /* RXD3 */
1100
1101 if (pins & ATMEL_UART_RTS)
1102 at91_set_B_periph(AT91_PIN_PC8, 0); /* RTS3 */
1103 if (pins & ATMEL_UART_CTS)
1104 at91_set_B_periph(AT91_PIN_PC10, 0); /* CTS3 */
1105 }
1106
1107 static struct resource uart4_resources[] = {
1108 [0] = {
1109 .start = AT91SAM9260_BASE_US4,
1110 .end = AT91SAM9260_BASE_US4 + SZ_16K - 1,
1111 .flags = IORESOURCE_MEM,
1112 },
1113 [1] = {
1114 .start = AT91SAM9260_ID_US4,
1115 .end = AT91SAM9260_ID_US4,
1116 .flags = IORESOURCE_IRQ,
1117 },
1118 };
1119
1120 static struct atmel_uart_data uart4_data = {
1121 .use_dma_tx = 1,
1122 .use_dma_rx = 1,
1123 };
1124
1125 static u64 uart4_dmamask = DMA_BIT_MASK(32);
1126
1127 static struct platform_device at91sam9260_uart4_device = {
1128 .name = "atmel_usart",
1129 .id = 5,
1130 .dev = {
1131 .dma_mask = &uart4_dmamask,
1132 .coherent_dma_mask = DMA_BIT_MASK(32),
1133 .platform_data = &uart4_data,
1134 },
1135 .resource = uart4_resources,
1136 .num_resources = ARRAY_SIZE(uart4_resources),
1137 };
1138
1139 static inline void configure_usart4_pins(void)
1140 {
1141 at91_set_B_periph(AT91_PIN_PA31, 1); /* TXD4 */
1142 at91_set_B_periph(AT91_PIN_PA30, 0); /* RXD4 */
1143 }
1144
1145 static struct resource uart5_resources[] = {
1146 [0] = {
1147 .start = AT91SAM9260_BASE_US5,
1148 .end = AT91SAM9260_BASE_US5 + SZ_16K - 1,
1149 .flags = IORESOURCE_MEM,
1150 },
1151 [1] = {
1152 .start = AT91SAM9260_ID_US5,
1153 .end = AT91SAM9260_ID_US5,
1154 .flags = IORESOURCE_IRQ,
1155 },
1156 };
1157
1158 static struct atmel_uart_data uart5_data = {
1159 .use_dma_tx = 1,
1160 .use_dma_rx = 1,
1161 };
1162
1163 static u64 uart5_dmamask = DMA_BIT_MASK(32);
1164
1165 static struct platform_device at91sam9260_uart5_device = {
1166 .name = "atmel_usart",
1167 .id = 6,
1168 .dev = {
1169 .dma_mask = &uart5_dmamask,
1170 .coherent_dma_mask = DMA_BIT_MASK(32),
1171 .platform_data = &uart5_data,
1172 },
1173 .resource = uart5_resources,
1174 .num_resources = ARRAY_SIZE(uart5_resources),
1175 };
1176
1177 static inline void configure_usart5_pins(void)
1178 {
1179 at91_set_A_periph(AT91_PIN_PB12, 1); /* TXD5 */
1180 at91_set_A_periph(AT91_PIN_PB13, 0); /* RXD5 */
1181 }
1182
1183 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1184
1185 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1186 {
1187 struct platform_device *pdev;
1188 struct atmel_uart_data *pdata;
1189
1190 switch (id) {
1191 case 0: /* DBGU */
1192 pdev = &at91sam9260_dbgu_device;
1193 configure_dbgu_pins();
1194 break;
1195 case AT91SAM9260_ID_US0:
1196 pdev = &at91sam9260_uart0_device;
1197 configure_usart0_pins(pins);
1198 break;
1199 case AT91SAM9260_ID_US1:
1200 pdev = &at91sam9260_uart1_device;
1201 configure_usart1_pins(pins);
1202 break;
1203 case AT91SAM9260_ID_US2:
1204 pdev = &at91sam9260_uart2_device;
1205 configure_usart2_pins(pins);
1206 break;
1207 case AT91SAM9260_ID_US3:
1208 pdev = &at91sam9260_uart3_device;
1209 configure_usart3_pins(pins);
1210 break;
1211 case AT91SAM9260_ID_US4:
1212 pdev = &at91sam9260_uart4_device;
1213 configure_usart4_pins();
1214 break;
1215 case AT91SAM9260_ID_US5:
1216 pdev = &at91sam9260_uart5_device;
1217 configure_usart5_pins();
1218 break;
1219 default:
1220 return;
1221 }
1222 pdata = pdev->dev.platform_data;
1223 pdata->num = portnr; /* update to mapped ID */
1224
1225 if (portnr < ATMEL_MAX_UART)
1226 at91_uarts[portnr] = pdev;
1227 }
1228
1229 void __init at91_set_serial_console(unsigned portnr)
1230 {
1231 if (portnr < ATMEL_MAX_UART) {
1232 atmel_default_console_device = at91_uarts[portnr];
1233 at91sam9260_set_console_clock(at91_uarts[portnr]->id);
1234 }
1235 }
1236
1237 void __init at91_add_device_serial(void)
1238 {
1239 int i;
1240
1241 for (i = 0; i < ATMEL_MAX_UART; i++) {
1242 if (at91_uarts[i])
1243 platform_device_register(at91_uarts[i]);
1244 }
1245
1246 if (!atmel_default_console_device)
1247 printk(KERN_INFO "AT91: No default serial console defined.\n");
1248 }
1249 #else
1250 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1251 void __init at91_set_serial_console(unsigned portnr) {}
1252 void __init at91_add_device_serial(void) {}
1253 #endif
1254
1255 /* --------------------------------------------------------------------
1256 * CF/IDE
1257 * -------------------------------------------------------------------- */
1258
1259 #if defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE) || \
1260 defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE) || \
1261 defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
1262
1263 static struct at91_cf_data cf0_data;
1264
1265 static struct resource cf0_resources[] = {
1266 [0] = {
1267 .start = AT91_CHIPSELECT_4,
1268 .end = AT91_CHIPSELECT_4 + SZ_256M - 1,
1269 .flags = IORESOURCE_MEM,
1270 }
1271 };
1272
1273 static struct platform_device cf0_device = {
1274 .id = 0,
1275 .dev = {
1276 .platform_data = &cf0_data,
1277 },
1278 .resource = cf0_resources,
1279 .num_resources = ARRAY_SIZE(cf0_resources),
1280 };
1281
1282 static struct at91_cf_data cf1_data;
1283
1284 static struct resource cf1_resources[] = {
1285 [0] = {
1286 .start = AT91_CHIPSELECT_5,
1287 .end = AT91_CHIPSELECT_5 + SZ_256M - 1,
1288 .flags = IORESOURCE_MEM,
1289 }
1290 };
1291
1292 static struct platform_device cf1_device = {
1293 .id = 1,
1294 .dev = {
1295 .platform_data = &cf1_data,
1296 },
1297 .resource = cf1_resources,
1298 .num_resources = ARRAY_SIZE(cf1_resources),
1299 };
1300
1301 void __init at91_add_device_cf(struct at91_cf_data *data)
1302 {
1303 struct platform_device *pdev;
1304 unsigned long csa;
1305
1306 if (!data)
1307 return;
1308
1309 csa = at91_matrix_read(AT91_MATRIX_EBICSA);
1310
1311 switch (data->chipselect) {
1312 case 4:
1313 at91_set_multi_drive(AT91_PIN_PC8, 0);
1314 at91_set_A_periph(AT91_PIN_PC8, 0);
1315 csa |= AT91_MATRIX_CS4A_SMC_CF1;
1316 cf0_data = *data;
1317 pdev = &cf0_device;
1318 break;
1319 case 5:
1320 at91_set_multi_drive(AT91_PIN_PC9, 0);
1321 at91_set_A_periph(AT91_PIN_PC9, 0);
1322 csa |= AT91_MATRIX_CS5A_SMC_CF2;
1323 cf1_data = *data;
1324 pdev = &cf1_device;
1325 break;
1326 default:
1327 printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n",
1328 data->chipselect);
1329 return;
1330 }
1331
1332 at91_matrix_write(AT91_MATRIX_EBICSA, csa);
1333
1334 if (gpio_is_valid(data->rst_pin)) {
1335 at91_set_multi_drive(data->rst_pin, 0);
1336 at91_set_gpio_output(data->rst_pin, 1);
1337 }
1338
1339 if (gpio_is_valid(data->irq_pin)) {
1340 at91_set_gpio_input(data->irq_pin, 0);
1341 at91_set_deglitch(data->irq_pin, 1);
1342 }
1343
1344 if (gpio_is_valid(data->det_pin)) {
1345 at91_set_gpio_input(data->det_pin, 0);
1346 at91_set_deglitch(data->det_pin, 1);
1347 }
1348
1349 at91_set_B_periph(AT91_PIN_PC6, 0); /* CFCE1 */
1350 at91_set_B_periph(AT91_PIN_PC7, 0); /* CFCE2 */
1351 at91_set_A_periph(AT91_PIN_PC10, 0); /* CFRNW */
1352 at91_set_A_periph(AT91_PIN_PC15, 1); /* NWAIT */
1353
1354 if (data->flags & AT91_CF_TRUE_IDE)
1355 #if defined(CONFIG_PATA_AT91) || defined(CONFIG_PATA_AT91_MODULE)
1356 pdev->name = "pata_at91";
1357 #elif defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE)
1358 pdev->name = "at91_ide";
1359 #else
1360 #warning "board requires AT91_CF_TRUE_IDE: enable either at91_ide or pata_at91"
1361 #endif
1362 else
1363 pdev->name = "at91_cf";
1364
1365 platform_device_register(pdev);
1366 }
1367
1368 #else
1369 void __init at91_add_device_cf(struct at91_cf_data * data) {}
1370 #endif
1371
1372 /* -------------------------------------------------------------------- */
1373 /*
1374 * These devices are always present and don't need any board-specific
1375 * setup.
1376 */
1377 static int __init at91_add_standard_devices(void)
1378 {
1379 at91_add_device_rtt();
1380 at91_add_device_watchdog();
1381 at91_add_device_tc();
1382 return 0;
1383 }
1384
1385 arch_initcall(at91_add_standard_devices);
Linux kernel - Deliverables
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