2 * arch/arm/mach-at91/at91sam9261.c
4 * Copyright (C) 2005 SAN People
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
13 #include <linux/module.h>
14 #include <linux/platform_device.h>
15 #include <linux/clk/at91_pmc.h>
17 #include <asm/proc-fns.h>
19 #include <asm/mach/arch.h>
20 #include <asm/mach/map.h>
21 #include <asm/system_misc.h>
23 #include <mach/at91sam9261.h>
24 #include <mach/hardware.h>
32 #if defined(CONFIG_OLD_CLK_AT91)
35 /* --------------------------------------------------------------------
37 * -------------------------------------------------------------------- */
40 * The peripheral clocks.
42 static struct clk pioA_clk
= {
44 .pmc_mask
= 1 << AT91SAM9261_ID_PIOA
,
45 .type
= CLK_TYPE_PERIPHERAL
,
47 static struct clk pioB_clk
= {
49 .pmc_mask
= 1 << AT91SAM9261_ID_PIOB
,
50 .type
= CLK_TYPE_PERIPHERAL
,
52 static struct clk pioC_clk
= {
54 .pmc_mask
= 1 << AT91SAM9261_ID_PIOC
,
55 .type
= CLK_TYPE_PERIPHERAL
,
57 static struct clk usart0_clk
= {
59 .pmc_mask
= 1 << AT91SAM9261_ID_US0
,
60 .type
= CLK_TYPE_PERIPHERAL
,
62 static struct clk usart1_clk
= {
64 .pmc_mask
= 1 << AT91SAM9261_ID_US1
,
65 .type
= CLK_TYPE_PERIPHERAL
,
67 static struct clk usart2_clk
= {
69 .pmc_mask
= 1 << AT91SAM9261_ID_US2
,
70 .type
= CLK_TYPE_PERIPHERAL
,
72 static struct clk mmc_clk
= {
74 .pmc_mask
= 1 << AT91SAM9261_ID_MCI
,
75 .type
= CLK_TYPE_PERIPHERAL
,
77 static struct clk udc_clk
= {
79 .pmc_mask
= 1 << AT91SAM9261_ID_UDP
,
80 .type
= CLK_TYPE_PERIPHERAL
,
82 static struct clk twi_clk
= {
84 .pmc_mask
= 1 << AT91SAM9261_ID_TWI
,
85 .type
= CLK_TYPE_PERIPHERAL
,
87 static struct clk spi0_clk
= {
89 .pmc_mask
= 1 << AT91SAM9261_ID_SPI0
,
90 .type
= CLK_TYPE_PERIPHERAL
,
92 static struct clk spi1_clk
= {
94 .pmc_mask
= 1 << AT91SAM9261_ID_SPI1
,
95 .type
= CLK_TYPE_PERIPHERAL
,
97 static struct clk ssc0_clk
= {
99 .pmc_mask
= 1 << AT91SAM9261_ID_SSC0
,
100 .type
= CLK_TYPE_PERIPHERAL
,
102 static struct clk ssc1_clk
= {
104 .pmc_mask
= 1 << AT91SAM9261_ID_SSC1
,
105 .type
= CLK_TYPE_PERIPHERAL
,
107 static struct clk ssc2_clk
= {
109 .pmc_mask
= 1 << AT91SAM9261_ID_SSC2
,
110 .type
= CLK_TYPE_PERIPHERAL
,
112 static struct clk tc0_clk
= {
114 .pmc_mask
= 1 << AT91SAM9261_ID_TC0
,
115 .type
= CLK_TYPE_PERIPHERAL
,
117 static struct clk tc1_clk
= {
119 .pmc_mask
= 1 << AT91SAM9261_ID_TC1
,
120 .type
= CLK_TYPE_PERIPHERAL
,
122 static struct clk tc2_clk
= {
124 .pmc_mask
= 1 << AT91SAM9261_ID_TC2
,
125 .type
= CLK_TYPE_PERIPHERAL
,
127 static struct clk ohci_clk
= {
129 .pmc_mask
= 1 << AT91SAM9261_ID_UHP
,
130 .type
= CLK_TYPE_PERIPHERAL
,
132 static struct clk lcdc_clk
= {
134 .pmc_mask
= 1 << AT91SAM9261_ID_LCDC
,
135 .type
= CLK_TYPE_PERIPHERAL
,
139 static struct clk hck0
= {
141 .pmc_mask
= AT91_PMC_HCK0
,
142 .type
= CLK_TYPE_SYSTEM
,
145 static struct clk hck1
= {
147 .pmc_mask
= AT91_PMC_HCK1
,
148 .type
= CLK_TYPE_SYSTEM
,
152 static struct clk
*periph_clocks
[] __initdata
= {
175 static struct clk_lookup periph_clocks_lookups
[] = {
176 CLKDEV_CON_DEV_ID("hclk", "at91sam9261-lcdfb.0", &hck1
),
177 CLKDEV_CON_DEV_ID("hclk", "at91sam9g10-lcdfb.0", &hck1
),
178 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk
),
179 CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk
),
180 CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk
),
181 CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk
),
182 CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk
),
183 CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.0", &ssc0_clk
),
184 CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.1", &ssc1_clk
),
185 CLKDEV_CON_DEV_ID("pclk", "at91rm9200_ssc.2", &ssc2_clk
),
186 CLKDEV_CON_DEV_ID("pclk", "fffbc000.ssc", &ssc0_clk
),
187 CLKDEV_CON_DEV_ID("pclk", "fffc0000.ssc", &ssc1_clk
),
188 CLKDEV_CON_DEV_ID("pclk", "fffc4000.ssc", &ssc2_clk
),
189 CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &hck0
),
190 CLKDEV_CON_DEV_ID(NULL
, "i2c-at91sam9261.0", &twi_clk
),
191 CLKDEV_CON_DEV_ID(NULL
, "i2c-at91sam9g10.0", &twi_clk
),
192 CLKDEV_CON_ID("pioA", &pioA_clk
),
193 CLKDEV_CON_ID("pioB", &pioB_clk
),
194 CLKDEV_CON_ID("pioC", &pioC_clk
),
195 /* more lookup table for DT entries */
196 CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck
),
197 CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk
),
198 CLKDEV_CON_DEV_ID("usart", "ffffb400.serial", &usart1_clk
),
199 CLKDEV_CON_DEV_ID("usart", "fff94000.serial", &usart2_clk
),
200 CLKDEV_CON_DEV_ID("t0_clk", "fffa0000.timer", &tc0_clk
),
201 CLKDEV_CON_DEV_ID("t1_clk", "fffa0000.timer", &tc1_clk
),
202 CLKDEV_CON_DEV_ID("t2_clk", "fffa0000.timer", &tc2_clk
),
203 CLKDEV_CON_DEV_ID("hclk", "500000.ohci", &hck0
),
204 CLKDEV_CON_DEV_ID("hclk", "600000.fb", &hck1
),
205 CLKDEV_CON_DEV_ID("spi_clk", "fffc8000.spi", &spi0_clk
),
206 CLKDEV_CON_DEV_ID("spi_clk", "fffcc000.spi", &spi1_clk
),
207 CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk
),
208 CLKDEV_CON_DEV_ID(NULL
, "fffac000.i2c", &twi_clk
),
209 CLKDEV_CON_DEV_ID(NULL
, "fffff400.gpio", &pioA_clk
),
210 CLKDEV_CON_DEV_ID(NULL
, "fffff600.gpio", &pioB_clk
),
211 CLKDEV_CON_DEV_ID(NULL
, "fffff800.gpio", &pioC_clk
),
214 static struct clk_lookup usart_clocks_lookups
[] = {
215 CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck
),
216 CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk
),
217 CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk
),
218 CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk
),
222 * The four programmable clocks.
223 * You must configure pin multiplexing to bring these signals out.
225 static struct clk pck0
= {
227 .pmc_mask
= AT91_PMC_PCK0
,
228 .type
= CLK_TYPE_PROGRAMMABLE
,
231 static struct clk pck1
= {
233 .pmc_mask
= AT91_PMC_PCK1
,
234 .type
= CLK_TYPE_PROGRAMMABLE
,
237 static struct clk pck2
= {
239 .pmc_mask
= AT91_PMC_PCK2
,
240 .type
= CLK_TYPE_PROGRAMMABLE
,
243 static struct clk pck3
= {
245 .pmc_mask
= AT91_PMC_PCK3
,
246 .type
= CLK_TYPE_PROGRAMMABLE
,
250 static void __init
at91sam9261_register_clocks(void)
254 for (i
= 0; i
< ARRAY_SIZE(periph_clocks
); i
++)
255 clk_register(periph_clocks
[i
]);
257 clkdev_add_table(periph_clocks_lookups
,
258 ARRAY_SIZE(periph_clocks_lookups
));
259 clkdev_add_table(usart_clocks_lookups
,
260 ARRAY_SIZE(usart_clocks_lookups
));
271 #define at91sam9261_register_clocks NULL
273 /* --------------------------------------------------------------------
275 * -------------------------------------------------------------------- */
277 static struct at91_gpio_bank at91sam9261_gpio
[] __initdata
= {
279 .id
= AT91SAM9261_ID_PIOA
,
280 .regbase
= AT91SAM9261_BASE_PIOA
,
282 .id
= AT91SAM9261_ID_PIOB
,
283 .regbase
= AT91SAM9261_BASE_PIOB
,
285 .id
= AT91SAM9261_ID_PIOC
,
286 .regbase
= AT91SAM9261_BASE_PIOC
,
290 /* --------------------------------------------------------------------
291 * AT91SAM9261 processor initialization
292 * -------------------------------------------------------------------- */
294 static void __init
at91sam9261_map_io(void)
296 if (cpu_is_at91sam9g10())
297 at91_init_sram(0, AT91SAM9G10_SRAM_BASE
, AT91SAM9G10_SRAM_SIZE
);
299 at91_init_sram(0, AT91SAM9261_SRAM_BASE
, AT91SAM9261_SRAM_SIZE
);
302 static void __init
at91sam9261_ioremap_registers(void)
304 at91_ioremap_ramc(0, AT91SAM9261_BASE_SDRAMC
, 512);
305 at91sam926x_ioremap_pit(AT91SAM9261_BASE_PIT
);
306 at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC
);
307 at91_ioremap_matrix(AT91SAM9261_BASE_MATRIX
);
308 at91_pm_set_standby(at91sam9_sdram_standby
);
311 static void __init
at91sam9261_initialize(void)
313 arm_pm_idle
= at91sam9_idle
;
315 at91_sysirq_mask_rtt(AT91SAM9261_BASE_RTT
);
317 /* Register GPIO subsystem */
318 at91_gpio_init(at91sam9261_gpio
, 3);
321 static struct resource rstc_resources
[] = {
323 .start
= AT91SAM9261_BASE_RSTC
,
324 .end
= AT91SAM9261_BASE_RSTC
+ SZ_16
- 1,
325 .flags
= IORESOURCE_MEM
,
328 .start
= AT91SAM9261_BASE_SDRAMC
,
329 .end
= AT91SAM9261_BASE_SDRAMC
+ SZ_512
- 1,
330 .flags
= IORESOURCE_MEM
,
334 static struct platform_device rstc_device
= {
335 .name
= "at91-sam9260-reset",
336 .resource
= rstc_resources
,
337 .num_resources
= ARRAY_SIZE(rstc_resources
),
340 static struct resource shdwc_resources
[] = {
342 .start
= AT91SAM9261_BASE_SHDWC
,
343 .end
= AT91SAM9261_BASE_SHDWC
+ SZ_16
- 1,
344 .flags
= IORESOURCE_MEM
,
348 static struct platform_device shdwc_device
= {
349 .name
= "at91-poweroff",
350 .resource
= shdwc_resources
,
351 .num_resources
= ARRAY_SIZE(shdwc_resources
),
354 static void __init
at91sam9261_register_devices(void)
356 platform_device_register(&rstc_device
);
357 platform_device_register(&shdwc_device
);
360 /* --------------------------------------------------------------------
361 * Interrupt initialization
362 * -------------------------------------------------------------------- */
365 * The default interrupt priority levels (0 = lowest, 7 = highest).
367 static unsigned int at91sam9261_default_irq_priority
[NR_AIC_IRQS
] __initdata
= {
368 7, /* Advanced Interrupt Controller */
369 7, /* System Peripherals */
370 1, /* Parallel IO Controller A */
371 1, /* Parallel IO Controller B */
372 1, /* Parallel IO Controller C */
377 0, /* Multimedia Card Interface */
378 2, /* USB Device Port */
379 6, /* Two-Wire Interface */
380 5, /* Serial Peripheral Interface 0 */
381 5, /* Serial Peripheral Interface 1 */
382 4, /* Serial Synchronous Controller 0 */
383 4, /* Serial Synchronous Controller 1 */
384 4, /* Serial Synchronous Controller 2 */
385 0, /* Timer Counter 0 */
386 0, /* Timer Counter 1 */
387 0, /* Timer Counter 2 */
388 2, /* USB Host port */
389 3, /* LCD Controller */
397 0, /* Advanced Interrupt Controller */
398 0, /* Advanced Interrupt Controller */
399 0, /* Advanced Interrupt Controller */
402 static void __init
at91sam9261_init_time(void)
404 at91sam926x_pit_init();
407 AT91_SOC_START(at91sam9261
)
408 .map_io
= at91sam9261_map_io
,
409 .default_irq_priority
= at91sam9261_default_irq_priority
,
410 .extern_irq
= (1 << AT91SAM9261_ID_IRQ0
) | (1 << AT91SAM9261_ID_IRQ1
)
411 | (1 << AT91SAM9261_ID_IRQ2
),
412 .ioremap_registers
= at91sam9261_ioremap_registers
,
413 .register_clocks
= at91sam9261_register_clocks
,
414 .register_devices
= at91sam9261_register_devices
,
415 .init
= at91sam9261_initialize
,
416 .init_time
= at91sam9261_init_time
,