arch/arm/mach-at91/include/mach/hardware.h

   1 /*
   2  * arch/arm/mach-at91/include/mach/hardware.h
   3  *
   4  *  Copyright (C) 2003 SAN People
   5  *  Copyright (C) 2003 ATMEL
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  */
  13
  14 #ifndef __ASM_ARCH_HARDWARE_H
  15 #define __ASM_ARCH_HARDWARE_H
  16
  17 #include <asm/sizes.h>
  18
  19 /* DBGU base */
  20 /* rm9200, 9260/9g20, 9261/9g10, 9rl */
  21 #define AT91_BASE_DBGU0 0xfffff200
  22 /* 9263, 9g45 */
  23 #define AT91_BASE_DBGU1 0xffffee00
  24
  25 #if defined(CONFIG_ARCH_AT91X40)
  26 #include <mach/at91x40.h>
  27 #else
  28 #include <mach/at91rm9200.h>
  29 #include <mach/at91sam9260.h>
  30 #include <mach/at91sam9261.h>
  31 #include <mach/at91sam9263.h>
  32 #include <mach/at91sam9rl.h>
  33 #include <mach/at91sam9g45.h>
  34 #include <mach/at91sam9x5.h>
  35 #include <mach/at91sam9n12.h>
  36
  37 /*
  38  * On all at91 except rm9200 and x40 have the System Controller starts
  39  * at address 0xffffc000 and has a size of 16KiB.
  40  *
  41  * On rm9200 it's start at 0xfffe4000 of 111KiB with non reserved data starting
  42  * at 0xfffff000
  43  *
  44  * Removes the individual definitions of AT91_BASE_SYS and
  45  * replaces them with a common version at base 0xfffffc000 and size 16KiB
  46  * and map the same memory space
  47  */
  48 #define AT91_BASE_SYS   0xffffc000
  49 #endif
  50
  51 /*
  52  * On all at91 have the Advanced Interrupt Controller starts at address
  53  * 0xfffff000 and the Power Management Controller starts at 0xfffffc00
  54  */
  55 #define AT91_AIC        0xfffff000
  56 #define AT91_PMC        0xfffffc00
  57
  58 /*
  59  * Peripheral identifiers/interrupts.
  60  */
  61 #define AT91_ID_FIQ             0       /* Advanced Interrupt Controller (FIQ) */
  62 #define AT91_ID_SYS             1       /* System Peripherals */
  63
  64 #ifdef CONFIG_MMU
  65 /*
  66  * Remap the peripherals from address 0xFFF78000 .. 0xFFFFFFFF
  67  * to 0xFEF78000 .. 0xFF000000.  (544Kb)
  68  */
  69 #define AT91_IO_PHYS_BASE       0xFFF78000
  70 #define AT91_IO_VIRT_BASE       (0xFF000000 - AT91_IO_SIZE)
  71 #else
  72 /*
  73  * Identity mapping for the non MMU case.
  74  */
  75 #define AT91_IO_PHYS_BASE       AT91_BASE_SYS
  76 #define AT91_IO_VIRT_BASE       AT91_IO_PHYS_BASE
  77 #endif
  78
  79 #define AT91_IO_SIZE            (0xFFFFFFFF - AT91_IO_PHYS_BASE + 1)
  80
  81  /* Convert a physical IO address to virtual IO address */
  82 #define AT91_IO_P2V(x)          ((x) - AT91_IO_PHYS_BASE + AT91_IO_VIRT_BASE)
  83
  84 /*
  85  * Virtual to Physical Address mapping for IO devices.
  86  */
  87 #define AT91_VA_BASE_SYS        AT91_IO_P2V(AT91_BASE_SYS)
  88
  89  /* Internal SRAM is mapped below the IO devices */
  90 #define AT91_SRAM_MAX           SZ_1M
  91 #define AT91_VIRT_BASE          (AT91_IO_VIRT_BASE - AT91_SRAM_MAX)
  92
  93 /* Serial ports */
  94 #define ATMEL_MAX_UART          7               /* 6 USART3's and one DBGU port (SAM9260) */
  95
  96 /* External Memory Map */
  97 #define AT91_CHIPSELECT_0       0x10000000
  98 #define AT91_CHIPSELECT_1       0x20000000
  99 #define AT91_CHIPSELECT_2       0x30000000
 100 #define AT91_CHIPSELECT_3       0x40000000
 101 #define AT91_CHIPSELECT_4       0x50000000
 102 #define AT91_CHIPSELECT_5       0x60000000
 103 #define AT91_CHIPSELECT_6       0x70000000
 104 #define AT91_CHIPSELECT_7       0x80000000
 105
 106 /* Clocks */
 107 #define AT91_SLOW_CLOCK         32768           /* slow clock */
 108
 109
 110 #endif