Merge branch 'picoxcell/timer' into next/timer
[deliverable/linux.git] / arch / arm / mach-clps711x / common.c
1 /*
2 * linux/arch/arm/mach-clps711x/core.c
3 *
4 * Core support for the CLPS711x-based machines.
5 *
6 * Copyright (C) 2001,2011 Deep Blue Solutions Ltd
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22 #include <linux/kernel.h>
23 #include <linux/mm.h>
24 #include <linux/init.h>
25 #include <linux/interrupt.h>
26 #include <linux/io.h>
27 #include <linux/irq.h>
28 #include <linux/sched.h>
29 #include <linux/timex.h>
30
31 #include <asm/sizes.h>
32 #include <mach/hardware.h>
33 #include <asm/irq.h>
34 #include <asm/leds.h>
35 #include <asm/pgtable.h>
36 #include <asm/page.h>
37 #include <asm/mach/map.h>
38 #include <asm/mach/time.h>
39 #include <asm/system_misc.h>
40
41 /*
42 * This maps the generic CLPS711x registers
43 */
44 static struct map_desc clps711x_io_desc[] __initdata = {
45 {
46 .virtual = (unsigned long)CLPS711X_VIRT_BASE,
47 .pfn = __phys_to_pfn(CLPS711X_PHYS_BASE),
48 .length = SZ_1M,
49 .type = MT_DEVICE
50 }
51 };
52
53 void __init clps711x_map_io(void)
54 {
55 iotable_init(clps711x_io_desc, ARRAY_SIZE(clps711x_io_desc));
56 }
57
58 static void int1_mask(struct irq_data *d)
59 {
60 u32 intmr1;
61
62 intmr1 = clps_readl(INTMR1);
63 intmr1 &= ~(1 << d->irq);
64 clps_writel(intmr1, INTMR1);
65 }
66
67 static void int1_ack(struct irq_data *d)
68 {
69 switch (d->irq) {
70 case IRQ_CSINT: clps_writel(0, COEOI); break;
71 case IRQ_TC1OI: clps_writel(0, TC1EOI); break;
72 case IRQ_TC2OI: clps_writel(0, TC2EOI); break;
73 case IRQ_RTCMI: clps_writel(0, RTCEOI); break;
74 case IRQ_TINT: clps_writel(0, TEOI); break;
75 case IRQ_UMSINT: clps_writel(0, UMSEOI); break;
76 }
77 }
78
79 static void int1_unmask(struct irq_data *d)
80 {
81 u32 intmr1;
82
83 intmr1 = clps_readl(INTMR1);
84 intmr1 |= 1 << d->irq;
85 clps_writel(intmr1, INTMR1);
86 }
87
88 static struct irq_chip int1_chip = {
89 .irq_ack = int1_ack,
90 .irq_mask = int1_mask,
91 .irq_unmask = int1_unmask,
92 };
93
94 static void int2_mask(struct irq_data *d)
95 {
96 u32 intmr2;
97
98 intmr2 = clps_readl(INTMR2);
99 intmr2 &= ~(1 << (d->irq - 16));
100 clps_writel(intmr2, INTMR2);
101 }
102
103 static void int2_ack(struct irq_data *d)
104 {
105 switch (d->irq) {
106 case IRQ_KBDINT: clps_writel(0, KBDEOI); break;
107 }
108 }
109
110 static void int2_unmask(struct irq_data *d)
111 {
112 u32 intmr2;
113
114 intmr2 = clps_readl(INTMR2);
115 intmr2 |= 1 << (d->irq - 16);
116 clps_writel(intmr2, INTMR2);
117 }
118
119 static struct irq_chip int2_chip = {
120 .irq_ack = int2_ack,
121 .irq_mask = int2_mask,
122 .irq_unmask = int2_unmask,
123 };
124
125 void __init clps711x_init_irq(void)
126 {
127 unsigned int i;
128
129 for (i = 0; i < NR_IRQS; i++) {
130 if (INT1_IRQS & (1 << i)) {
131 irq_set_chip_and_handler(i, &int1_chip,
132 handle_level_irq);
133 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
134 }
135 if (INT2_IRQS & (1 << i)) {
136 irq_set_chip_and_handler(i, &int2_chip,
137 handle_level_irq);
138 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
139 }
140 }
141
142 /*
143 * Disable interrupts
144 */
145 clps_writel(0, INTMR1);
146 clps_writel(0, INTMR2);
147
148 /*
149 * Clear down any pending interrupts
150 */
151 clps_writel(0, COEOI);
152 clps_writel(0, TC1EOI);
153 clps_writel(0, TC2EOI);
154 clps_writel(0, RTCEOI);
155 clps_writel(0, TEOI);
156 clps_writel(0, UMSEOI);
157 clps_writel(0, SYNCIO);
158 clps_writel(0, KBDEOI);
159 }
160
161 /*
162 * gettimeoffset() returns time since last timer tick, in usecs.
163 *
164 * 'LATCH' is hwclock ticks (see CLOCK_TICK_RATE in timex.h) per jiffy.
165 * 'tick' is usecs per jiffy.
166 */
167 static unsigned long clps711x_gettimeoffset(void)
168 {
169 unsigned long hwticks;
170 hwticks = LATCH - (clps_readl(TC2D) & 0xffff); /* since last underflow */
171 return (hwticks * (tick_nsec / 1000)) / LATCH;
172 }
173
174 /*
175 * IRQ handler for the timer
176 */
177 static irqreturn_t p720t_timer_interrupt(int irq, void *dev_id)
178 {
179 timer_tick();
180 return IRQ_HANDLED;
181 }
182
183 static struct irqaction clps711x_timer_irq = {
184 .name = "CLPS711x Timer Tick",
185 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
186 .handler = p720t_timer_interrupt,
187 };
188
189 static void __init clps711x_timer_init(void)
190 {
191 struct timespec tv;
192 unsigned int syscon;
193
194 syscon = clps_readl(SYSCON1);
195 syscon |= SYSCON1_TC2S | SYSCON1_TC2M;
196 clps_writel(syscon, SYSCON1);
197
198 clps_writel(LATCH-1, TC2D); /* 512kHz / 100Hz - 1 */
199
200 setup_irq(IRQ_TC2OI, &clps711x_timer_irq);
201
202 tv.tv_nsec = 0;
203 tv.tv_sec = clps_readl(RTCDR);
204 do_settimeofday(&tv);
205 }
206
207 struct sys_timer clps711x_timer = {
208 .init = clps711x_timer_init,
209 .offset = clps711x_gettimeoffset,
210 };
211
212 void clps711x_restart(char mode, const char *cmd)
213 {
214 soft_restart(0);
215 }
216
217 static void clps711x_idle(void)
218 {
219 clps_writel(1, HALT);
220 __asm__ __volatile__(
221 "mov r0, r0\n\
222 mov r0, r0");
223 }
224
225 static int __init clps711x_idle_init(void)
226 {
227 arm_pm_idle = clps711x_idle;
228 return 0;
229 }
230
231 arch_initcall(clps711x_idle_init);
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