arch/arm/mach-davinci/board-dm646x-evm.c

   1 /*
   2  * TI DaVinci DM646X EVM board
   3  *
   4  * Derived from: arch/arm/mach-davinci/board-evm.c
   5  * Copyright (C) 2006 Texas Instruments.
   6  *
   7  * (C) 2007-2008, MontaVista Software, Inc.
   8  *
   9  * This file is licensed under the terms of the GNU General Public License
  10  * version 2. This program is licensed "as is" without any warranty of any
  11  * kind, whether express or implied.
  12  *
  13  */
  14
  15 /**************************************************************************
  16  * Included Files
  17  **************************************************************************/
  18
  19 #include <linux/kernel.h>
  20 #include <linux/init.h>
  21 #include <linux/leds.h>
  22 #include <linux/gpio.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/i2c.h>
  25 #include <linux/platform_data/at24.h>
  26 #include <linux/i2c/pcf857x.h>
  27
  28 #include <media/i2c/tvp514x.h>
  29 #include <media/i2c/adv7343.h>
  30
  31 #include <linux/mtd/mtd.h>
  32 #include <linux/mtd/nand.h>
  33 #include <linux/mtd/partitions.h>
  34 #include <linux/clk.h>
  35 #include <linux/export.h>
  36 #include <linux/platform_data/gpio-davinci.h>
  37 #include <linux/platform_data/i2c-davinci.h>
  38 #include <linux/platform_data/mtd-davinci.h>
  39 #include <linux/platform_data/mtd-davinci-aemif.h>
  40
  41 #include <asm/mach-types.h>
  42 #include <asm/mach/arch.h>
  43
  44 #include <mach/common.h>
  45 #include <mach/irqs.h>
  46 #include <mach/serial.h>
  47 #include <mach/clock.h>
  48
  49 #include "davinci.h"
  50 #include "clock.h"
  51
  52 #define NAND_BLOCK_SIZE         SZ_128K
  53
  54 /* Note: We are setting first partition as 'bootloader' constituting UBL, U-Boot
  55  * and U-Boot environment this avoids dependency on any particular combination
  56  * of UBL, U-Boot or flashing tools etc.
  57  */
  58 static struct mtd_partition davinci_nand_partitions[] = {
  59         {
  60                 /* UBL, U-Boot with environment */
  61                 .name           = "bootloader",
  62                 .offset         = MTDPART_OFS_APPEND,
  63                 .size           = 16 * NAND_BLOCK_SIZE,
  64                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
  65         }, {
  66                 .name           = "kernel",
  67                 .offset         = MTDPART_OFS_APPEND,
  68                 .size           = SZ_4M,
  69                 .mask_flags     = 0,
  70         }, {
  71                 .name           = "filesystem",
  72                 .offset         = MTDPART_OFS_APPEND,
  73                 .size           = MTDPART_SIZ_FULL,
  74                 .mask_flags     = 0,
  75         }
  76 };
  77
  78 static struct davinci_aemif_timing dm6467tevm_nandflash_timing = {
  79         .wsetup         = 29,
  80         .wstrobe        = 24,
  81         .whold          = 14,
  82         .rsetup         = 19,
  83         .rstrobe        = 33,
  84         .rhold          = 0,
  85         .ta             = 29,
  86 };
  87
  88 static struct davinci_nand_pdata davinci_nand_data = {
  89         .mask_cle               = 0x80000,
  90         .mask_ale               = 0x40000,
  91         .parts                  = davinci_nand_partitions,
  92         .nr_parts               = ARRAY_SIZE(davinci_nand_partitions),
  93         .ecc_mode               = NAND_ECC_HW,
  94         .ecc_bits               = 1,
  95         .options                = 0,
  96 };
  97
  98 static struct resource davinci_nand_resources[] = {
  99         {
 100                 .start          = DM646X_ASYNC_EMIF_CS2_SPACE_BASE,
 101                 .end            = DM646X_ASYNC_EMIF_CS2_SPACE_BASE + SZ_32M - 1,
 102                 .flags          = IORESOURCE_MEM,
 103         }, {
 104                 .start          = DM646X_ASYNC_EMIF_CONTROL_BASE,
 105                 .end            = DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
 106                 .flags          = IORESOURCE_MEM,
 107         },
 108 };
 109
 110 static struct platform_device davinci_nand_device = {
 111         .name                   = "davinci_nand",
 112         .id                     = 0,
 113
 114         .num_resources          = ARRAY_SIZE(davinci_nand_resources),
 115         .resource               = davinci_nand_resources,
 116
 117         .dev                    = {
 118                 .platform_data  = &davinci_nand_data,
 119         },
 120 };
 121
 122 #define HAS_ATA         IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710)
 123
 124 /* CPLD Register 0 bits to control ATA */
 125 #define DM646X_EVM_ATA_RST              BIT(0)
 126 #define DM646X_EVM_ATA_PWD              BIT(1)
 127
 128 /* CPLD Register 0 Client: used for I/O Control */
 129 static int cpld_reg0_probe(struct i2c_client *client,
 130                            const struct i2c_device_id *id)
 131 {
 132         if (HAS_ATA) {
 133                 u8 data;
 134                 struct i2c_msg msg[2] = {
 135                         {
 136                                 .addr = client->addr,
 137                                 .flags = I2C_M_RD,
 138                                 .len = 1,
 139                                 .buf = &data,
 140                         },
 141                         {
 142                                 .addr = client->addr,
 143                                 .flags = 0,
 144                                 .len = 1,
 145                                 .buf = &data,
 146                         },
 147                 };
 148
 149                 /* Clear ATA_RSTn and ATA_PWD bits to enable ATA operation. */
 150                 i2c_transfer(client->adapter, msg, 1);
 151                 data &= ~(DM646X_EVM_ATA_RST | DM646X_EVM_ATA_PWD);
 152                 i2c_transfer(client->adapter, msg + 1, 1);
 153         }
 154
 155         return 0;
 156 }
 157
 158 static const struct i2c_device_id cpld_reg_ids[] = {
 159         { "cpld_reg0", 0, },
 160         { },
 161 };
 162
 163 static struct i2c_driver dm6467evm_cpld_driver = {
 164         .driver.name    = "cpld_reg0",
 165         .id_table       = cpld_reg_ids,
 166         .probe          = cpld_reg0_probe,
 167 };
 168
 169 /* LEDS */
 170
 171 static struct gpio_led evm_leds[] = {
 172         { .name = "DS1", .active_low = 1, },
 173         { .name = "DS2", .active_low = 1, },
 174         { .name = "DS3", .active_low = 1, },
 175         { .name = "DS4", .active_low = 1, },
 176 };
 177
 178 static const struct gpio_led_platform_data evm_led_data = {
 179         .num_leds = ARRAY_SIZE(evm_leds),
 180         .leds     = evm_leds,
 181 };
 182
 183 static struct platform_device *evm_led_dev;
 184
 185 static int evm_led_setup(struct i2c_client *client, int gpio,
 186                         unsigned int ngpio, void *c)
 187 {
 188         struct gpio_led *leds = evm_leds;
 189         int status;
 190
 191         while (ngpio--) {
 192                 leds->gpio = gpio++;
 193                 leds++;
 194         }
 195
 196         evm_led_dev = platform_device_alloc("leds-gpio", 0);
 197         platform_device_add_data(evm_led_dev, &evm_led_data,
 198                                 sizeof(evm_led_data));
 199
 200         evm_led_dev->dev.parent = &client->dev;
 201         status = platform_device_add(evm_led_dev);
 202         if (status < 0) {
 203                 platform_device_put(evm_led_dev);
 204                 evm_led_dev = NULL;
 205         }
 206         return status;
 207 }
 208
 209 static int evm_led_teardown(struct i2c_client *client, int gpio,
 210                                 unsigned ngpio, void *c)
 211 {
 212         if (evm_led_dev) {
 213                 platform_device_unregister(evm_led_dev);
 214                 evm_led_dev = NULL;
 215         }
 216         return 0;
 217 }
 218
 219 static int evm_sw_gpio[4] = { -EINVAL, -EINVAL, -EINVAL, -EINVAL };
 220
 221 static int evm_sw_setup(struct i2c_client *client, int gpio,
 222                         unsigned ngpio, void *c)
 223 {
 224         int status;
 225         int i;
 226         char label[10];
 227
 228         for (i = 0; i < 4; ++i) {
 229                 snprintf(label, 10, "user_sw%d", i);
 230                 status = gpio_request(gpio, label);
 231                 if (status)
 232                         goto out_free;
 233                 evm_sw_gpio[i] = gpio++;
 234
 235                 status = gpio_direction_input(evm_sw_gpio[i]);
 236                 if (status) {
 237                         gpio_free(evm_sw_gpio[i]);
 238                         evm_sw_gpio[i] = -EINVAL;
 239                         goto out_free;
 240                 }
 241
 242                 status = gpio_export(evm_sw_gpio[i], 0);
 243                 if (status) {
 244                         gpio_free(evm_sw_gpio[i]);
 245                         evm_sw_gpio[i] = -EINVAL;
 246                         goto out_free;
 247                 }
 248         }
 249         return status;
 250 out_free:
 251         for (i = 0; i < 4; ++i) {
 252                 if (evm_sw_gpio[i] != -EINVAL) {
 253                         gpio_free(evm_sw_gpio[i]);
 254                         evm_sw_gpio[i] = -EINVAL;
 255                 }
 256         }
 257         return status;
 258 }
 259
 260 static int evm_sw_teardown(struct i2c_client *client, int gpio,
 261                         unsigned ngpio, void *c)
 262 {
 263         int i;
 264
 265         for (i = 0; i < 4; ++i) {
 266                 if (evm_sw_gpio[i] != -EINVAL) {
 267                         gpio_unexport(evm_sw_gpio[i]);
 268                         gpio_free(evm_sw_gpio[i]);
 269                         evm_sw_gpio[i] = -EINVAL;
 270                 }
 271         }
 272         return 0;
 273 }
 274
 275 static int evm_pcf_setup(struct i2c_client *client, int gpio,
 276                         unsigned int ngpio, void *c)
 277 {
 278         int status;
 279
 280         if (ngpio < 8)
 281                 return -EINVAL;
 282
 283         status = evm_sw_setup(client, gpio, 4, c);
 284         if (status)
 285                 return status;
 286
 287         return evm_led_setup(client, gpio+4, 4, c);
 288 }
 289
 290 static int evm_pcf_teardown(struct i2c_client *client, int gpio,
 291                         unsigned int ngpio, void *c)
 292 {
 293         BUG_ON(ngpio < 8);
 294
 295         evm_sw_teardown(client, gpio, 4, c);
 296         evm_led_teardown(client, gpio+4, 4, c);
 297
 298         return 0;
 299 }
 300
 301 static struct pcf857x_platform_data pcf_data = {
 302         .gpio_base      = DAVINCI_N_GPIO+1,
 303         .setup          = evm_pcf_setup,
 304         .teardown       = evm_pcf_teardown,
 305 };
 306
 307 /* Most of this EEPROM is unused, but U-Boot uses some data:
 308  *  - 0x7f00, 6 bytes Ethernet Address
 309  *  - ... newer boards may have more
 310  */
 311
 312 static struct at24_platform_data eeprom_info = {
 313         .byte_len       = (256*1024) / 8,
 314         .page_size      = 64,
 315         .flags          = AT24_FLAG_ADDR16,
 316         .setup          = davinci_get_mac_addr,
 317         .context        = (void *)0x7f00,
 318 };
 319
 320 static u8 dm646x_iis_serializer_direction[] = {
 321        TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
 322 };
 323
 324 static u8 dm646x_dit_serializer_direction[] = {
 325        TX_MODE,
 326 };
 327
 328 static struct snd_platform_data dm646x_evm_snd_data[] = {
 329         {
 330                 .tx_dma_offset  = 0x400,
 331                 .rx_dma_offset  = 0x400,
 332                 .op_mode        = DAVINCI_MCASP_IIS_MODE,
 333                 .num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction),
 334                 .tdm_slots      = 2,
 335                 .serial_dir     = dm646x_iis_serializer_direction,
 336                 .asp_chan_q     = EVENTQ_0,
 337         },
 338         {
 339                 .tx_dma_offset  = 0x400,
 340                 .rx_dma_offset  = 0,
 341                 .op_mode        = DAVINCI_MCASP_DIT_MODE,
 342                 .num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction),
 343                 .tdm_slots      = 32,
 344                 .serial_dir     = dm646x_dit_serializer_direction,
 345                 .asp_chan_q     = EVENTQ_0,
 346         },
 347 };
 348
 349 static struct i2c_client *cpld_client;
 350
 351 static int cpld_video_probe(struct i2c_client *client,
 352                         const struct i2c_device_id *id)
 353 {
 354         cpld_client = client;
 355         return 0;
 356 }
 357
 358 static int cpld_video_remove(struct i2c_client *client)
 359 {
 360         cpld_client = NULL;
 361         return 0;
 362 }
 363
 364 static const struct i2c_device_id cpld_video_id[] = {
 365         { "cpld_video", 0 },
 366         { }
 367 };
 368
 369 static struct i2c_driver cpld_video_driver = {
 370         .driver = {
 371                 .name   = "cpld_video",
 372         },
 373         .probe          = cpld_video_probe,
 374         .remove         = cpld_video_remove,
 375         .id_table       = cpld_video_id,
 376 };
 377
 378 static void evm_init_cpld(void)
 379 {
 380         i2c_add_driver(&cpld_video_driver);
 381 }
 382
 383 static struct i2c_board_info __initdata i2c_info[] =  {
 384         {
 385                 I2C_BOARD_INFO("24c256", 0x50),
 386                 .platform_data  = &eeprom_info,
 387         },
 388         {
 389                 I2C_BOARD_INFO("pcf8574a", 0x38),
 390                 .platform_data  = &pcf_data,
 391         },
 392         {
 393                 I2C_BOARD_INFO("cpld_reg0", 0x3a),
 394         },
 395         {
 396                 I2C_BOARD_INFO("tlv320aic33", 0x18),
 397         },
 398         {
 399                 I2C_BOARD_INFO("cpld_video", 0x3b),
 400         },
 401 };
 402
 403 static struct davinci_i2c_platform_data i2c_pdata = {
 404         .bus_freq       = 100 /* kHz */,
 405         .bus_delay      = 0 /* usec */,
 406 };
 407
 408 #define VCH2CLK_MASK            (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
 409 #define VCH2CLK_SYSCLK8         (BIT(9))
 410 #define VCH2CLK_AUXCLK          (BIT(9) | BIT(8))
 411 #define VCH3CLK_MASK            (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12))
 412 #define VCH3CLK_SYSCLK8         (BIT(13))
 413 #define VCH3CLK_AUXCLK          (BIT(14) | BIT(13))
 414
 415 #define VIDCH2CLK               (BIT(10))
 416 #define VIDCH3CLK               (BIT(11))
 417 #define VIDCH1CLK               (BIT(4))
 418 #define TVP7002_INPUT           (BIT(4))
 419 #define TVP5147_INPUT           (~BIT(4))
 420 #define VPIF_INPUT_ONE_CHANNEL  (BIT(5))
 421 #define VPIF_INPUT_TWO_CHANNEL  (~BIT(5))
 422 #define TVP5147_CH0             "tvp514x-0"
 423 #define TVP5147_CH1             "tvp514x-1"
 424
 425 /* spin lock for updating above registers */
 426 static spinlock_t vpif_reg_lock;
 427
 428 static int set_vpif_clock(int mux_mode, int hd)
 429 {
 430         unsigned long flags;
 431         unsigned int value;
 432         int val = 0;
 433         int err = 0;
 434
 435         if (!cpld_client)
 436                 return -ENXIO;
 437
 438         /* disable the clock */
 439         spin_lock_irqsave(&vpif_reg_lock, flags);
 440         value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
 441         value |= (VIDCH3CLK | VIDCH2CLK);
 442         __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
 443         spin_unlock_irqrestore(&vpif_reg_lock, flags);
 444
 445         val = i2c_smbus_read_byte(cpld_client);
 446         if (val < 0)
 447                 return val;
 448
 449         if (mux_mode == 1)
 450                 val &= ~0x40;
 451         else
 452                 val |= 0x40;
 453
 454         err = i2c_smbus_write_byte(cpld_client, val);
 455         if (err)
 456                 return err;
 457
 458         value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
 459         value &= ~(VCH2CLK_MASK);
 460         value &= ~(VCH3CLK_MASK);
 461
 462         if (hd >= 1)
 463                 value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8);
 464         else
 465                 value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
 466
 467         __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
 468
 469         spin_lock_irqsave(&vpif_reg_lock, flags);
 470         value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
 471         /* enable the clock */
 472         value &= ~(VIDCH3CLK | VIDCH2CLK);
 473         __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
 474         spin_unlock_irqrestore(&vpif_reg_lock, flags);
 475
 476         return 0;
 477 }
 478
 479 static struct vpif_subdev_info dm646x_vpif_subdev[] = {
 480         {
 481                 .name   = "adv7343",
 482                 .board_info = {
 483                         I2C_BOARD_INFO("adv7343", 0x2a),
 484                 },
 485         },
 486         {
 487                 .name   = "ths7303",
 488                 .board_info = {
 489                         I2C_BOARD_INFO("ths7303", 0x2c),
 490                 },
 491         },
 492 };
 493
 494 static const struct vpif_output dm6467_ch0_outputs[] = {
 495         {
 496                 .output = {
 497                         .index = 0,
 498                         .name = "Composite",
 499                         .type = V4L2_OUTPUT_TYPE_ANALOG,
 500                         .capabilities = V4L2_OUT_CAP_STD,
 501                         .std = V4L2_STD_ALL,
 502                 },
 503                 .subdev_name = "adv7343",
 504                 .output_route = ADV7343_COMPOSITE_ID,
 505         },
 506         {
 507                 .output = {
 508                         .index = 1,
 509                         .name = "Component",
 510                         .type = V4L2_OUTPUT_TYPE_ANALOG,
 511                         .capabilities = V4L2_OUT_CAP_DV_TIMINGS,
 512                 },
 513                 .subdev_name = "adv7343",
 514                 .output_route = ADV7343_COMPONENT_ID,
 515         },
 516         {
 517                 .output = {
 518                         .index = 2,
 519                         .name = "S-Video",
 520                         .type = V4L2_OUTPUT_TYPE_ANALOG,
 521                         .capabilities = V4L2_OUT_CAP_STD,
 522                         .std = V4L2_STD_ALL,
 523                 },
 524                 .subdev_name = "adv7343",
 525                 .output_route = ADV7343_SVIDEO_ID,
 526         },
 527 };
 528
 529 static struct vpif_display_config dm646x_vpif_display_config = {
 530         .set_clock      = set_vpif_clock,
 531         .subdevinfo     = dm646x_vpif_subdev,
 532         .subdev_count   = ARRAY_SIZE(dm646x_vpif_subdev),
 533         .chan_config[0] = {
 534                 .outputs = dm6467_ch0_outputs,
 535                 .output_count = ARRAY_SIZE(dm6467_ch0_outputs),
 536         },
 537         .card_name      = "DM646x EVM",
 538 };
 539
 540 /**
 541  * setup_vpif_input_path()
 542  * @channel: channel id (0 - CH0, 1 - CH1)
 543  * @sub_dev_name: ptr sub device name
 544  *
 545  * This will set vpif input to capture data from tvp514x or
 546  * tvp7002.
 547  */
 548 static int setup_vpif_input_path(int channel, const char *sub_dev_name)
 549 {
 550         int err = 0;
 551         int val;
 552
 553         /* for channel 1, we don't do anything */
 554         if (channel != 0)
 555                 return 0;
 556
 557         if (!cpld_client)
 558                 return -ENXIO;
 559
 560         val = i2c_smbus_read_byte(cpld_client);
 561         if (val < 0)
 562                 return val;
 563
 564         if (!strcmp(sub_dev_name, TVP5147_CH0) ||
 565             !strcmp(sub_dev_name, TVP5147_CH1))
 566                 val &= TVP5147_INPUT;
 567         else
 568                 val |= TVP7002_INPUT;
 569
 570         err = i2c_smbus_write_byte(cpld_client, val);
 571         if (err)
 572                 return err;
 573         return 0;
 574 }
 575
 576 /**
 577  * setup_vpif_input_channel_mode()
 578  * @mux_mode:  mux mode. 0 - 1 channel or (1) - 2 channel
 579  *
 580  * This will setup input mode to one channel (TVP7002) or 2 channel (TVP5147)
 581  */
 582 static int setup_vpif_input_channel_mode(int mux_mode)
 583 {
 584         unsigned long flags;
 585         int err = 0;
 586         int val;
 587         u32 value;
 588
 589         if (!cpld_client)
 590                 return -ENXIO;
 591
 592         val = i2c_smbus_read_byte(cpld_client);
 593         if (val < 0)
 594                 return val;
 595
 596         spin_lock_irqsave(&vpif_reg_lock, flags);
 597         value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
 598         if (mux_mode) {
 599                 val &= VPIF_INPUT_TWO_CHANNEL;
 600                 value |= VIDCH1CLK;
 601         } else {
 602                 val |= VPIF_INPUT_ONE_CHANNEL;
 603                 value &= ~VIDCH1CLK;
 604         }
 605         __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
 606         spin_unlock_irqrestore(&vpif_reg_lock, flags);
 607
 608         err = i2c_smbus_write_byte(cpld_client, val);
 609         if (err)
 610                 return err;
 611
 612         return 0;
 613 }
 614
 615 static struct tvp514x_platform_data tvp5146_pdata = {
 616         .clk_polarity = 0,
 617         .hs_polarity = 1,
 618         .vs_polarity = 1
 619 };
 620
 621 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
 622
 623 static struct vpif_subdev_info vpif_capture_sdev_info[] = {
 624         {
 625                 .name   = TVP5147_CH0,
 626                 .board_info = {
 627                         I2C_BOARD_INFO("tvp5146", 0x5d),
 628                         .platform_data = &tvp5146_pdata,
 629                 },
 630         },
 631         {
 632                 .name   = TVP5147_CH1,
 633                 .board_info = {
 634                         I2C_BOARD_INFO("tvp5146", 0x5c),
 635                         .platform_data = &tvp5146_pdata,
 636                 },
 637         },
 638 };
 639
 640 static const struct vpif_input dm6467_ch0_inputs[] = {
 641         {
 642                 .input = {
 643                         .index = 0,
 644                         .name = "Composite",
 645                         .type = V4L2_INPUT_TYPE_CAMERA,
 646                         .capabilities = V4L2_IN_CAP_STD,
 647                         .std = TVP514X_STD_ALL,
 648                 },
 649                 .subdev_name = TVP5147_CH0,
 650                 .input_route = INPUT_CVBS_VI2B,
 651                 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
 652         },
 653 };
 654
 655 static const struct vpif_input dm6467_ch1_inputs[] = {
 656        {
 657                 .input = {
 658                         .index = 0,
 659                         .name = "S-Video",
 660                         .type = V4L2_INPUT_TYPE_CAMERA,
 661                         .capabilities = V4L2_IN_CAP_STD,
 662                         .std = TVP514X_STD_ALL,
 663                 },
 664                 .subdev_name = TVP5147_CH1,
 665                 .input_route = INPUT_SVIDEO_VI2C_VI1C,
 666                 .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
 667         },
 668 };
 669
 670 static struct vpif_capture_config dm646x_vpif_capture_cfg = {
 671         .setup_input_path = setup_vpif_input_path,
 672         .setup_input_channel_mode = setup_vpif_input_channel_mode,
 673         .subdev_info = vpif_capture_sdev_info,
 674         .subdev_count = ARRAY_SIZE(vpif_capture_sdev_info),
 675         .chan_config[0] = {
 676                 .inputs = dm6467_ch0_inputs,
 677                 .input_count = ARRAY_SIZE(dm6467_ch0_inputs),
 678                 .vpif_if = {
 679                         .if_type = VPIF_IF_BT656,
 680                         .hd_pol = 1,
 681                         .vd_pol = 1,
 682                         .fid_pol = 0,
 683                 },
 684         },
 685         .chan_config[1] = {
 686                 .inputs = dm6467_ch1_inputs,
 687                 .input_count = ARRAY_SIZE(dm6467_ch1_inputs),
 688                 .vpif_if = {
 689                         .if_type = VPIF_IF_BT656,
 690                         .hd_pol = 1,
 691                         .vd_pol = 1,
 692                         .fid_pol = 0,
 693                 },
 694         },
 695 };
 696
 697 static void __init evm_init_video(void)
 698 {
 699         spin_lock_init(&vpif_reg_lock);
 700
 701         dm646x_setup_vpif(&dm646x_vpif_display_config,
 702                           &dm646x_vpif_capture_cfg);
 703 }
 704
 705 static void __init evm_init_i2c(void)
 706 {
 707         davinci_init_i2c(&i2c_pdata);
 708         i2c_add_driver(&dm6467evm_cpld_driver);
 709         i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
 710         evm_init_cpld();
 711         evm_init_video();
 712 }
 713
 714 #define DM6467T_EVM_REF_FREQ            33000000
 715
 716 static void __init davinci_map_io(void)
 717 {
 718         dm646x_init();
 719
 720         if (machine_is_davinci_dm6467tevm())
 721                 davinci_set_refclk_rate(DM6467T_EVM_REF_FREQ);
 722 }
 723
 724 #define DM646X_EVM_PHY_ID               "davinci_mdio-0:01"
 725 /*
 726  * The following EDMA channels/slots are not being used by drivers (for
 727  * example: Timer, GPIO, UART events etc) on dm646x, hence they are being
 728  * reserved for codecs on the DSP side.
 729  */
 730 static const s16 dm646x_dma_rsv_chans[][2] = {
 731         /* (offset, number) */
 732         { 0,  4},
 733         {13,  3},
 734         {24,  4},
 735         {30,  2},
 736         {54,  3},
 737         {-1, -1}
 738 };
 739
 740 static const s16 dm646x_dma_rsv_slots[][2] = {
 741         /* (offset, number) */
 742         { 0,  4},
 743         {13,  3},
 744         {24,  4},
 745         {30,  2},
 746         {54,  3},
 747         {128, 384},
 748         {-1, -1}
 749 };
 750
 751 static struct edma_rsv_info dm646x_edma_rsv[] = {
 752         {
 753                 .rsv_chans      = dm646x_dma_rsv_chans,
 754                 .rsv_slots      = dm646x_dma_rsv_slots,
 755         },
 756 };
 757
 758 static __init void evm_init(void)
 759 {
 760         int ret;
 761         struct davinci_soc_info *soc_info = &davinci_soc_info;
 762
 763         ret = dm646x_gpio_register();
 764         if (ret)
 765                 pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
 766
 767         evm_init_i2c();
 768         davinci_serial_init(dm646x_serial_device);
 769         dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
 770         dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
 771
 772         if (machine_is_davinci_dm6467tevm())
 773                 davinci_nand_data.timing = &dm6467tevm_nandflash_timing;
 774
 775         platform_device_register(&davinci_nand_device);
 776
 777         if (davinci_aemif_setup(&davinci_nand_device))
 778                 pr_warn("%s: Cannot configure AEMIF.\n", __func__);
 779
 780         dm646x_init_edma(dm646x_edma_rsv);
 781
 782         if (HAS_ATA)
 783                 davinci_init_ide();
 784
 785         soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID;
 786 }
 787
 788 MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
 789         .atag_offset  = 0x100,
 790         .map_io       = davinci_map_io,
 791         .init_irq     = davinci_irq_init,
 792         .init_time      = davinci_timer_init,
 793         .init_machine = evm_init,
 794         .init_late      = davinci_init_late,
 795         .dma_zone_size  = SZ_128M,
 796         .restart        = davinci_restart,
 797 MACHINE_END
 798
 799 MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
 800         .atag_offset  = 0x100,
 801         .map_io       = davinci_map_io,
 802         .init_irq     = davinci_irq_init,
 803         .init_time      = davinci_timer_init,
 804         .init_machine = evm_init,
 805         .init_late      = davinci_init_late,
 806         .dma_zone_size  = SZ_128M,
 807         .restart        = davinci_restart,
 808 MACHINE_END
 809