arch/arm/mach-davinci/include/mach/gpio.h

   1 /*
   2  * TI DaVinci GPIO Support
   3  *
   4  * Copyright (c) 2006 David Brownell
   5  * Copyright (c) 2007, MontaVista Software, Inc. <source@mvista.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  */
  12
  13 #ifndef __DAVINCI_GPIO_H
  14 #define __DAVINCI_GPIO_H
  15
  16 #include <linux/io.h>
  17 #include <asm-generic/gpio.h>
  18
  19 #include <mach/irqs.h>
  20 #include <mach/common.h>
  21
  22 #define DAVINCI_GPIO_BASE 0x01C67000
  23
  24 enum davinci_gpio_type {
  25         GPIO_TYPE_DAVINCI = 0,
  26 };
  27
  28 /*
  29  * basic gpio routines
  30  *
  31  * board-specific init should be done by arch/.../.../board-XXX.c (maybe
  32  * initializing banks together) rather than boot loaders; kexec() won't
  33  * go through boot loaders.
  34  *
  35  * the gpio clock will be turned on when gpios are used, and you may also
  36  * need to pay attention to PINMUX registers to be sure those pins are
  37  * used as gpios, not with other peripherals.
  38  *
  39  * On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1).  For documentation,
  40  * and maybe for later updates, code may write GPIO(N).  These may be
  41  * all 1.8V signals, all 3.3V ones, or a mix of the two.  A given chip
  42  * may not support all the GPIOs in that range.
  43  *
  44  * GPIOs can also be on external chips, numbered after the ones built-in
  45  * to the DaVinci chip.  For now, they won't be usable as IRQ sources.
  46  */
  47 #define GPIO(X)         (X)             /* 0 <= X <= (DAVINCI_N_GPIO - 1) */
  48
  49 /* Convert GPIO signal to GPIO pin number */
  50 #define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio))
  51
  52 struct davinci_gpio_controller {
  53         struct gpio_chip        chip;
  54         int                     irq_base;
  55         void __iomem            *regs;
  56         void __iomem            *set_data;
  57         void __iomem            *clr_data;
  58         void __iomem            *in_data;
  59 };
  60
  61 /* The __gpio_to_controller() and __gpio_mask() functions inline to constants
  62  * with constant parameters; or in outlined code they execute at runtime.
  63  *
  64  * You'd access the controller directly when reading or writing more than
  65  * one gpio value at a time, and to support wired logic where the value
  66  * being driven by the cpu need not match the value read back.
  67  *
  68  * These are NOT part of the cross-platform GPIO interface
  69  */
  70 static inline struct davinci_gpio_controller *
  71 __gpio_to_controller(unsigned gpio)
  72 {
  73         struct davinci_gpio_controller *ctlrs = davinci_soc_info.gpio_ctlrs;
  74         int index = gpio / 32;
  75
  76         if (!ctlrs || index >= davinci_soc_info.gpio_ctlrs_num)
  77                 return NULL;
  78
  79         return ctlrs + index;
  80 }
  81
  82 static inline u32 __gpio_mask(unsigned gpio)
  83 {
  84         return 1 << (gpio % 32);
  85 }
  86
  87 /* The get/set/clear functions will inline when called with constant
  88  * parameters referencing built-in GPIOs, for low-overhead bitbanging.
  89  *
  90  * Otherwise, calls with variable parameters or referencing external
  91  * GPIOs (e.g. on GPIO expander chips) use outlined functions.
  92  */
  93 static inline void gpio_set_value(unsigned gpio, int value)
  94 {
  95         if (__builtin_constant_p(value) && gpio < davinci_soc_info.gpio_num) {
  96                 struct davinci_gpio_controller *ctlr;
  97                 u32                             mask;
  98
  99                 ctlr = __gpio_to_controller(gpio);
 100                 mask = __gpio_mask(gpio);
 101                 if (value)
 102                         __raw_writel(mask, ctlr->set_data);
 103                 else
 104                         __raw_writel(mask, ctlr->clr_data);
 105                 return;
 106         }
 107
 108         __gpio_set_value(gpio, value);
 109 }
 110
 111 /* Returns zero or nonzero; works for gpios configured as inputs OR
 112  * as outputs, at least for built-in GPIOs.
 113  *
 114  * NOTE: for built-in GPIOs, changes in reported values are synchronized
 115  * to the GPIO clock.  This is easily seen after calling gpio_set_value()
 116  * and then immediately gpio_get_value(), where the gpio_get_value() will
 117  * return the old value until the GPIO clock ticks and the new value gets
 118  * latched.
 119  */
 120 static inline int gpio_get_value(unsigned gpio)
 121 {
 122         struct davinci_gpio_controller *ctlr;
 123
 124         if (!__builtin_constant_p(gpio) || gpio >= davinci_soc_info.gpio_num)
 125                 return __gpio_get_value(gpio);
 126
 127         ctlr = __gpio_to_controller(gpio);
 128         return __gpio_mask(gpio) & __raw_readl(ctlr->in_data);
 129 }
 130
 131 static inline int gpio_cansleep(unsigned gpio)
 132 {
 133         if (__builtin_constant_p(gpio) && gpio < davinci_soc_info.gpio_num)
 134                 return 0;
 135         else
 136                 return __gpio_cansleep(gpio);
 137 }
 138
 139 static inline int gpio_to_irq(unsigned gpio)
 140 {
 141         return __gpio_to_irq(gpio);
 142 }
 143
 144 static inline int irq_to_gpio(unsigned irq)
 145 {
 146         /* don't support the reverse mapping */
 147         return -ENOSYS;
 148 }
 149
 150 #endif                          /* __DAVINCI_GPIO_H */