arch/arm/mach-davinci/include/mach/gpio.h

   1 /*
   2  * TI DaVinci GPIO Support
   3  *
   4  * Copyright (c) 2006 David Brownell
   5  * Copyright (c) 2007, MontaVista Software, Inc. <source@mvista.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  */
  12
  13 #ifndef __DAVINCI_GPIO_H
  14 #define __DAVINCI_GPIO_H
  15
  16 #include <linux/io.h>
  17 #include <asm-generic/gpio.h>
  18 #include <mach/hardware.h>
  19 #include <mach/irqs.h>
  20
  21 /*
  22  * basic gpio routines
  23  *
  24  * board-specific init should be done by arch/.../.../board-XXX.c (maybe
  25  * initializing banks together) rather than boot loaders; kexec() won't
  26  * go through boot loaders.
  27  *
  28  * the gpio clock will be turned on when gpios are used, and you may also
  29  * need to pay attention to PINMUX0 and PINMUX1 to be sure those pins are
  30  * used as gpios, not with other peripherals.
  31  *
  32  * On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1).  For documentation,
  33  * and maybe for later updates, code should write GPIO(N) or:
  34  *  - GPIOV18(N) for 1.8V pins, N in 0..53; same as GPIO(0)..GPIO(53)
  35  *  - GPIOV33(N) for 3.3V pins, N in 0..17; same as GPIO(54)..GPIO(70)
  36  *
  37  * For GPIO IRQs use gpio_to_irq(GPIO(N)) or gpio_to_irq(GPIOV33(N)) etc
  38  * for now, that's != GPIO(N)
  39  *
  40  * GPIOs can also be on external chips, numbered after the ones built-in
  41  * to the DaVinci chip.  For now, they won't be usable as IRQ sources.
  42  */
  43 #define GPIO(X)         (X)             /* 0 <= X <= 70 */
  44 #define GPIOV18(X)      (X)             /* 1.8V i/o; 0 <= X <= 53 */
  45 #define GPIOV33(X)      ((X)+54)        /* 3.3V i/o; 0 <= X <= 17 */
  46
  47 struct gpio_controller {
  48         u32     dir;
  49         u32     out_data;
  50         u32     set_data;
  51         u32     clr_data;
  52         u32     in_data;
  53         u32     set_rising;
  54         u32     clr_rising;
  55         u32     set_falling;
  56         u32     clr_falling;
  57         u32     intstat;
  58 };
  59
  60 /* The __gpio_to_controller() and __gpio_mask() functions inline to constants
  61  * with constant parameters; or in outlined code they execute at runtime.
  62  *
  63  * You'd access the controller directly when reading or writing more than
  64  * one gpio value at a time, and to support wired logic where the value
  65  * being driven by the cpu need not match the value read back.
  66  *
  67  * These are NOT part of the cross-platform GPIO interface
  68  */
  69 static inline struct gpio_controller *__iomem
  70 __gpio_to_controller(unsigned gpio)
  71 {
  72         void *__iomem ptr;
  73
  74         if (gpio < 32)
  75                 ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x10);
  76         else if (gpio < 64)
  77                 ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x38);
  78         else if (gpio < DAVINCI_N_GPIO)
  79                 ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x60);
  80         else
  81                 ptr = NULL;
  82         return ptr;
  83 }
  84
  85 static inline u32 __gpio_mask(unsigned gpio)
  86 {
  87         return 1 << (gpio % 32);
  88 }
  89
  90 /* The get/set/clear functions will inline when called with constant
  91  * parameters referencing built-in GPIOs, for low-overhead bitbanging.
  92  *
  93  * Otherwise, calls with variable parameters or referencing external
  94  * GPIOs (e.g. on GPIO expander chips) use outlined functions.
  95  */
  96 static inline void gpio_set_value(unsigned gpio, int value)
  97 {
  98         if (__builtin_constant_p(value) && gpio < DAVINCI_N_GPIO) {
  99                 struct gpio_controller  *__iomem g;
 100                 u32                     mask;
 101
 102                 g = __gpio_to_controller(gpio);
 103                 mask = __gpio_mask(gpio);
 104                 if (value)
 105                         __raw_writel(mask, &g->set_data);
 106                 else
 107                         __raw_writel(mask, &g->clr_data);
 108                 return;
 109         }
 110
 111         __gpio_set_value(gpio, value);
 112 }
 113
 114 /* Returns zero or nonzero; works for gpios configured as inputs OR
 115  * as outputs, at least for built-in GPIOs.
 116  *
 117  * NOTE: for built-in GPIOs, changes in reported values are synchronized
 118  * to the GPIO clock.  This is easily seen after calling gpio_set_value()
 119  * and then immediately gpio_get_value(), where the gpio_get_value() will
 120  * return the old value until the GPIO clock ticks and the new value gets
 121  * latched.
 122  */
 123 static inline int gpio_get_value(unsigned gpio)
 124 {
 125         struct gpio_controller  *__iomem g;
 126
 127         if (!__builtin_constant_p(gpio) || gpio >= DAVINCI_N_GPIO)
 128                 return __gpio_get_value(gpio);
 129
 130         g = __gpio_to_controller(gpio);
 131         return __gpio_mask(gpio) & __raw_readl(&g->in_data);
 132 }
 133
 134 static inline int gpio_cansleep(unsigned gpio)
 135 {
 136         if (__builtin_constant_p(gpio) && gpio < DAVINCI_N_GPIO)
 137                 return 0;
 138         else
 139                 return __gpio_cansleep(gpio);
 140 }
 141
 142 static inline int gpio_to_irq(unsigned gpio)
 143 {
 144         if (gpio >= DAVINCI_N_GPIO)
 145                 return -EINVAL;
 146         return DAVINCI_N_AINTC_IRQ + gpio;
 147 }
 148
 149 static inline int irq_to_gpio(unsigned irq)
 150 {
 151         /* caller guarantees gpio_to_irq() succeeded */
 152         return irq - DAVINCI_N_AINTC_IRQ;
 153 }
 154
 155 #endif                          /* __DAVINCI_GPIO_H */