arch/arm/mach-dove/common.c

   1 /*
   2  * arch/arm/mach-dove/common.c
   3  *
   4  * Core functions for Marvell Dove 88AP510 System On Chip
   5  *
   6  * This file is licensed under the terms of the GNU General Public
   7  * License version 2.  This program is licensed "as is" without any
   8  * warranty of any kind, whether express or implied.
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/delay.h>
  13 #include <linux/init.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/pci.h>
  16 #include <linux/serial_8250.h>
  17 #include <linux/clk.h>
  18 #include <linux/mbus.h>
  19 #include <linux/ata_platform.h>
  20 #include <linux/serial_8250.h>
  21 #include <linux/gpio.h>
  22 #include <asm/page.h>
  23 #include <asm/setup.h>
  24 #include <asm/timex.h>
  25 #include <asm/hardware/cache-tauros2.h>
  26 #include <asm/mach/map.h>
  27 #include <asm/mach/time.h>
  28 #include <asm/mach/pci.h>
  29 #include <mach/dove.h>
  30 #include <mach/bridge-regs.h>
  31 #include <asm/mach/arch.h>
  32 #include <linux/irq.h>
  33 #include <plat/time.h>
  34 #include <plat/common.h>
  35 #include "common.h"
  36
  37 static int get_tclk(void);
  38
  39 /*****************************************************************************
  40  * I/O Address Mapping
  41  ****************************************************************************/
  42 static struct map_desc dove_io_desc[] __initdata = {
  43         {
  44                 .virtual        = DOVE_SB_REGS_VIRT_BASE,
  45                 .pfn            = __phys_to_pfn(DOVE_SB_REGS_PHYS_BASE),
  46                 .length         = DOVE_SB_REGS_SIZE,
  47                 .type           = MT_DEVICE,
  48         }, {
  49                 .virtual        = DOVE_NB_REGS_VIRT_BASE,
  50                 .pfn            = __phys_to_pfn(DOVE_NB_REGS_PHYS_BASE),
  51                 .length         = DOVE_NB_REGS_SIZE,
  52                 .type           = MT_DEVICE,
  53         }, {
  54                 .virtual        = DOVE_PCIE0_IO_VIRT_BASE,
  55                 .pfn            = __phys_to_pfn(DOVE_PCIE0_IO_PHYS_BASE),
  56                 .length         = DOVE_PCIE0_IO_SIZE,
  57                 .type           = MT_DEVICE,
  58         }, {
  59                 .virtual        = DOVE_PCIE1_IO_VIRT_BASE,
  60                 .pfn            = __phys_to_pfn(DOVE_PCIE1_IO_PHYS_BASE),
  61                 .length         = DOVE_PCIE1_IO_SIZE,
  62                 .type           = MT_DEVICE,
  63         },
  64 };
  65
  66 void __init dove_map_io(void)
  67 {
  68         iotable_init(dove_io_desc, ARRAY_SIZE(dove_io_desc));
  69 }
  70
  71 /*****************************************************************************
  72  * EHCI0
  73  ****************************************************************************/
  74 void __init dove_ehci0_init(void)
  75 {
  76         orion_ehci_init(&dove_mbus_dram_info,
  77                         DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0);
  78 }
  79
  80 /*****************************************************************************
  81  * EHCI1
  82  ****************************************************************************/
  83 void __init dove_ehci1_init(void)
  84 {
  85         orion_ehci_1_init(&dove_mbus_dram_info,
  86                           DOVE_USB1_PHYS_BASE, IRQ_DOVE_USB1);
  87 }
  88
  89 /*****************************************************************************
  90  * GE00
  91  ****************************************************************************/
  92 void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
  93 {
  94         orion_ge00_init(eth_data, &dove_mbus_dram_info,
  95                         DOVE_GE00_PHYS_BASE, IRQ_DOVE_GE00_SUM,
  96                         0, get_tclk());
  97 }
  98
  99 /*****************************************************************************
 100  * SoC RTC
 101  ****************************************************************************/
 102 void __init dove_rtc_init(void)
 103 {
 104         orion_rtc_init(DOVE_RTC_PHYS_BASE, IRQ_DOVE_RTC);
 105 }
 106
 107 /*****************************************************************************
 108  * SATA
 109  ****************************************************************************/
 110 static struct resource dove_sata_resources[] = {
 111         {
 112                 .name   = "sata base",
 113                 .start  = DOVE_SATA_PHYS_BASE,
 114                 .end    = DOVE_SATA_PHYS_BASE + 0x5000 - 1,
 115                 .flags  = IORESOURCE_MEM,
 116         }, {
 117                 .name   = "sata irq",
 118                 .start  = IRQ_DOVE_SATA,
 119                 .end    = IRQ_DOVE_SATA,
 120                 .flags  = IORESOURCE_IRQ,
 121         },
 122 };
 123
 124 static struct platform_device dove_sata = {
 125         .name           = "sata_mv",
 126         .id             = 0,
 127         .dev            = {
 128                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 129         },
 130         .num_resources  = ARRAY_SIZE(dove_sata_resources),
 131         .resource       = dove_sata_resources,
 132 };
 133
 134 void __init dove_sata_init(struct mv_sata_platform_data *sata_data)
 135 {
 136         sata_data->dram = &dove_mbus_dram_info;
 137         dove_sata.dev.platform_data = sata_data;
 138         platform_device_register(&dove_sata);
 139 }
 140
 141 /*****************************************************************************
 142  * UART0
 143  ****************************************************************************/
 144 void __init dove_uart0_init(void)
 145 {
 146         orion_uart0_init(DOVE_UART0_VIRT_BASE, DOVE_UART0_PHYS_BASE,
 147                          IRQ_DOVE_UART_0, get_tclk());
 148 }
 149
 150 /*****************************************************************************
 151  * UART1
 152  ****************************************************************************/
 153 void __init dove_uart1_init(void)
 154 {
 155         orion_uart1_init(DOVE_UART1_VIRT_BASE, DOVE_UART1_PHYS_BASE,
 156                          IRQ_DOVE_UART_1, get_tclk());
 157 }
 158
 159 /*****************************************************************************
 160  * UART2
 161  ****************************************************************************/
 162 void __init dove_uart2_init(void)
 163 {
 164         orion_uart2_init(DOVE_UART2_VIRT_BASE, DOVE_UART2_PHYS_BASE,
 165                          IRQ_DOVE_UART_2, get_tclk());
 166 }
 167
 168 /*****************************************************************************
 169  * UART3
 170  ****************************************************************************/
 171 void __init dove_uart3_init(void)
 172 {
 173         orion_uart3_init(DOVE_UART3_VIRT_BASE, DOVE_UART3_PHYS_BASE,
 174                          IRQ_DOVE_UART_3, get_tclk());
 175 }
 176
 177 /*****************************************************************************
 178  * SPI
 179  ****************************************************************************/
 180 void __init dove_spi0_init(void)
 181 {
 182         orion_spi_init(DOVE_SPI0_PHYS_BASE, get_tclk());
 183 }
 184
 185 void __init dove_spi1_init(void)
 186 {
 187         orion_spi_init(DOVE_SPI1_PHYS_BASE, get_tclk());
 188 }
 189
 190 /*****************************************************************************
 191  * I2C
 192  ****************************************************************************/
 193 void __init dove_i2c_init(void)
 194 {
 195         orion_i2c_init(DOVE_I2C_PHYS_BASE, IRQ_DOVE_I2C, 10);
 196 }
 197
 198 /*****************************************************************************
 199  * Time handling
 200  ****************************************************************************/
 201 void __init dove_init_early(void)
 202 {
 203         orion_time_set_base(TIMER_VIRT_BASE);
 204 }
 205
 206 static int get_tclk(void)
 207 {
 208         /* use DOVE_RESET_SAMPLE_HI/LO to detect tclk */
 209         return 166666667;
 210 }
 211
 212 static void dove_timer_init(void)
 213 {
 214         orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
 215                         IRQ_DOVE_BRIDGE, get_tclk());
 216 }
 217
 218 struct sys_timer dove_timer = {
 219         .init = dove_timer_init,
 220 };
 221
 222 /*****************************************************************************
 223  * XOR 0
 224  ****************************************************************************/
 225 void __init dove_xor0_init(void)
 226 {
 227         orion_xor0_init(&dove_mbus_dram_info,
 228                         DOVE_XOR0_PHYS_BASE, DOVE_XOR0_HIGH_PHYS_BASE,
 229                         IRQ_DOVE_XOR_00, IRQ_DOVE_XOR_01);
 230 }
 231
 232 /*****************************************************************************
 233  * XOR 1
 234  ****************************************************************************/
 235 void __init dove_xor1_init(void)
 236 {
 237         orion_xor1_init(DOVE_XOR1_PHYS_BASE, DOVE_XOR1_HIGH_PHYS_BASE,
 238                         IRQ_DOVE_XOR_10, IRQ_DOVE_XOR_11);
 239 }
 240
 241 /*****************************************************************************
 242  * SDIO
 243  ****************************************************************************/
 244 static u64 sdio_dmamask = DMA_BIT_MASK(32);
 245
 246 static struct resource dove_sdio0_resources[] = {
 247         {
 248                 .start  = DOVE_SDIO0_PHYS_BASE,
 249                 .end    = DOVE_SDIO0_PHYS_BASE + 0xff,
 250                 .flags  = IORESOURCE_MEM,
 251         }, {
 252                 .start  = IRQ_DOVE_SDIO0,
 253                 .end    = IRQ_DOVE_SDIO0,
 254                 .flags  = IORESOURCE_IRQ,
 255         },
 256 };
 257
 258 static struct platform_device dove_sdio0 = {
 259         .name           = "sdhci-dove",
 260         .id             = 0,
 261         .dev            = {
 262                 .dma_mask               = &sdio_dmamask,
 263                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 264         },
 265         .resource       = dove_sdio0_resources,
 266         .num_resources  = ARRAY_SIZE(dove_sdio0_resources),
 267 };
 268
 269 void __init dove_sdio0_init(void)
 270 {
 271         platform_device_register(&dove_sdio0);
 272 }
 273
 274 static struct resource dove_sdio1_resources[] = {
 275         {
 276                 .start  = DOVE_SDIO1_PHYS_BASE,
 277                 .end    = DOVE_SDIO1_PHYS_BASE + 0xff,
 278                 .flags  = IORESOURCE_MEM,
 279         }, {
 280                 .start  = IRQ_DOVE_SDIO1,
 281                 .end    = IRQ_DOVE_SDIO1,
 282                 .flags  = IORESOURCE_IRQ,
 283         },
 284 };
 285
 286 static struct platform_device dove_sdio1 = {
 287         .name           = "sdhci-dove",
 288         .id             = 1,
 289         .dev            = {
 290                 .dma_mask               = &sdio_dmamask,
 291                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 292         },
 293         .resource       = dove_sdio1_resources,
 294         .num_resources  = ARRAY_SIZE(dove_sdio1_resources),
 295 };
 296
 297 void __init dove_sdio1_init(void)
 298 {
 299         platform_device_register(&dove_sdio1);
 300 }
 301
 302 void __init dove_init(void)
 303 {
 304         int tclk;
 305
 306         tclk = get_tclk();
 307
 308         printk(KERN_INFO "Dove 88AP510 SoC, ");
 309         printk(KERN_INFO "TCLK = %dMHz\n", (tclk + 499999) / 1000000);
 310
 311 #ifdef CONFIG_CACHE_TAUROS2
 312         tauros2_init();
 313 #endif
 314         dove_setup_cpu_mbus();
 315
 316         /* internal devices that every board has */
 317         dove_rtc_init();
 318         dove_xor0_init();
 319         dove_xor1_init();
 320 }