arch/arm/mach-dove/common.c

   1 /*
   2  * arch/arm/mach-dove/common.c
   3  *
   4  * Core functions for Marvell Dove 88AP510 System On Chip
   5  *
   6  * This file is licensed under the terms of the GNU General Public
   7  * License version 2.  This program is licensed "as is" without any
   8  * warranty of any kind, whether express or implied.
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/delay.h>
  13 #include <linux/init.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/pci.h>
  16 #include <linux/clk-provider.h>
  17 #include <linux/ata_platform.h>
  18 #include <linux/gpio.h>
  19 #include <linux/of.h>
  20 #include <linux/of_platform.h>
  21 #include <asm/page.h>
  22 #include <asm/setup.h>
  23 #include <asm/timex.h>
  24 #include <asm/hardware/cache-tauros2.h>
  25 #include <asm/mach/map.h>
  26 #include <asm/mach/time.h>
  27 #include <asm/mach/pci.h>
  28 #include <mach/dove.h>
  29 #include <mach/pm.h>
  30 #include <mach/bridge-regs.h>
  31 #include <asm/mach/arch.h>
  32 #include <linux/irq.h>
  33 #include <plat/time.h>
  34 #include <linux/platform_data/usb-ehci-orion.h>
  35 #include <plat/common.h>
  36 #include <plat/addr-map.h>
  37 #include "common.h"
  38
  39 /*****************************************************************************
  40  * I/O Address Mapping
  41  ****************************************************************************/
  42 static struct map_desc dove_io_desc[] __initdata = {
  43         {
  44                 .virtual        = DOVE_SB_REGS_VIRT_BASE,
  45                 .pfn            = __phys_to_pfn(DOVE_SB_REGS_PHYS_BASE),
  46                 .length         = DOVE_SB_REGS_SIZE,
  47                 .type           = MT_DEVICE,
  48         }, {
  49                 .virtual        = DOVE_NB_REGS_VIRT_BASE,
  50                 .pfn            = __phys_to_pfn(DOVE_NB_REGS_PHYS_BASE),
  51                 .length         = DOVE_NB_REGS_SIZE,
  52                 .type           = MT_DEVICE,
  53         },
  54 };
  55
  56 void __init dove_map_io(void)
  57 {
  58         iotable_init(dove_io_desc, ARRAY_SIZE(dove_io_desc));
  59 }
  60
  61 /*****************************************************************************
  62  * CLK tree
  63  ****************************************************************************/
  64 static int dove_tclk;
  65
  66 static DEFINE_SPINLOCK(gating_lock);
  67 static struct clk *tclk;
  68
  69 static struct clk __init *dove_register_gate(const char *name,
  70                                              const char *parent, u8 bit_idx)
  71 {
  72         return clk_register_gate(NULL, name, parent, 0,
  73                                  (void __iomem *)CLOCK_GATING_CONTROL,
  74                                  bit_idx, 0, &gating_lock);
  75 }
  76
  77 static void __init dove_clk_init(void)
  78 {
  79         struct clk *usb0, *usb1, *sata, *pex0, *pex1, *sdio0, *sdio1;
  80         struct clk *nand, *camera, *i2s0, *i2s1, *crypto, *ac97, *pdma;
  81         struct clk *xor0, *xor1, *ge, *gephy;
  82
  83         tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT,
  84                                        dove_tclk);
  85
  86         usb0 = dove_register_gate("usb0", "tclk", CLOCK_GATING_BIT_USB0);
  87         usb1 = dove_register_gate("usb1", "tclk", CLOCK_GATING_BIT_USB1);
  88         sata = dove_register_gate("sata", "tclk", CLOCK_GATING_BIT_SATA);
  89         pex0 = dove_register_gate("pex0", "tclk", CLOCK_GATING_BIT_PCIE0);
  90         pex1 = dove_register_gate("pex1", "tclk", CLOCK_GATING_BIT_PCIE1);
  91         sdio0 = dove_register_gate("sdio0", "tclk", CLOCK_GATING_BIT_SDIO0);
  92         sdio1 = dove_register_gate("sdio1", "tclk", CLOCK_GATING_BIT_SDIO1);
  93         nand = dove_register_gate("nand", "tclk", CLOCK_GATING_BIT_NAND);
  94         camera = dove_register_gate("camera", "tclk", CLOCK_GATING_BIT_CAMERA);
  95         i2s0 = dove_register_gate("i2s0", "tclk", CLOCK_GATING_BIT_I2S0);
  96         i2s1 = dove_register_gate("i2s1", "tclk", CLOCK_GATING_BIT_I2S1);
  97         crypto = dove_register_gate("crypto", "tclk", CLOCK_GATING_BIT_CRYPTO);
  98         ac97 = dove_register_gate("ac97", "tclk", CLOCK_GATING_BIT_AC97);
  99         pdma = dove_register_gate("pdma", "tclk", CLOCK_GATING_BIT_PDMA);
 100         xor0 = dove_register_gate("xor0", "tclk", CLOCK_GATING_BIT_XOR0);
 101         xor1 = dove_register_gate("xor1", "tclk", CLOCK_GATING_BIT_XOR1);
 102         gephy = dove_register_gate("gephy", "tclk", CLOCK_GATING_BIT_GIGA_PHY);
 103         ge = dove_register_gate("ge", "gephy", CLOCK_GATING_BIT_GBE);
 104
 105         orion_clkdev_add(NULL, "orion_spi.0", tclk);
 106         orion_clkdev_add(NULL, "orion_spi.1", tclk);
 107         orion_clkdev_add(NULL, "orion_wdt", tclk);
 108         orion_clkdev_add(NULL, "mv64xxx_i2c.0", tclk);
 109
 110         orion_clkdev_add(NULL, "orion-ehci.0", usb0);
 111         orion_clkdev_add(NULL, "orion-ehci.1", usb1);
 112         orion_clkdev_add(NULL, "mv643xx_eth.0", ge);
 113         orion_clkdev_add("0", "sata_mv.0", sata);
 114         orion_clkdev_add("0", "pcie", pex0);
 115         orion_clkdev_add("1", "pcie", pex1);
 116         orion_clkdev_add(NULL, "sdhci-dove.0", sdio0);
 117         orion_clkdev_add(NULL, "sdhci-dove.1", sdio1);
 118         orion_clkdev_add(NULL, "orion_nand", nand);
 119         orion_clkdev_add(NULL, "cafe1000-ccic.0", camera);
 120         orion_clkdev_add(NULL, "kirkwood-i2s.0", i2s0);
 121         orion_clkdev_add(NULL, "kirkwood-i2s.1", i2s1);
 122         orion_clkdev_add(NULL, "mv_crypto", crypto);
 123         orion_clkdev_add(NULL, "dove-ac97", ac97);
 124         orion_clkdev_add(NULL, "dove-pdma", pdma);
 125         orion_clkdev_add(NULL, "mv_xor_shared.0", xor0);
 126         orion_clkdev_add(NULL, "mv_xor_shared.1", xor1);
 127 }
 128
 129 /*****************************************************************************
 130  * EHCI0
 131  ****************************************************************************/
 132 void __init dove_ehci0_init(void)
 133 {
 134         orion_ehci_init(DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0, EHCI_PHY_NA);
 135 }
 136
 137 /*****************************************************************************
 138  * EHCI1
 139  ****************************************************************************/
 140 void __init dove_ehci1_init(void)
 141 {
 142         orion_ehci_1_init(DOVE_USB1_PHYS_BASE, IRQ_DOVE_USB1);
 143 }
 144
 145 /*****************************************************************************
 146  * GE00
 147  ****************************************************************************/
 148 void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
 149 {
 150         orion_ge00_init(eth_data, DOVE_GE00_PHYS_BASE,
 151                         IRQ_DOVE_GE00_SUM, IRQ_DOVE_GE00_ERR,
 152                         1600);
 153 }
 154
 155 /*****************************************************************************
 156  * SoC RTC
 157  ****************************************************************************/
 158 void __init dove_rtc_init(void)
 159 {
 160         orion_rtc_init(DOVE_RTC_PHYS_BASE, IRQ_DOVE_RTC);
 161 }
 162
 163 /*****************************************************************************
 164  * SATA
 165  ****************************************************************************/
 166 void __init dove_sata_init(struct mv_sata_platform_data *sata_data)
 167 {
 168         orion_sata_init(sata_data, DOVE_SATA_PHYS_BASE, IRQ_DOVE_SATA);
 169
 170 }
 171
 172 /*****************************************************************************
 173  * UART0
 174  ****************************************************************************/
 175 void __init dove_uart0_init(void)
 176 {
 177         orion_uart0_init(DOVE_UART0_VIRT_BASE, DOVE_UART0_PHYS_BASE,
 178                          IRQ_DOVE_UART_0, tclk);
 179 }
 180
 181 /*****************************************************************************
 182  * UART1
 183  ****************************************************************************/
 184 void __init dove_uart1_init(void)
 185 {
 186         orion_uart1_init(DOVE_UART1_VIRT_BASE, DOVE_UART1_PHYS_BASE,
 187                          IRQ_DOVE_UART_1, tclk);
 188 }
 189
 190 /*****************************************************************************
 191  * UART2
 192  ****************************************************************************/
 193 void __init dove_uart2_init(void)
 194 {
 195         orion_uart2_init(DOVE_UART2_VIRT_BASE, DOVE_UART2_PHYS_BASE,
 196                          IRQ_DOVE_UART_2, tclk);
 197 }
 198
 199 /*****************************************************************************
 200  * UART3
 201  ****************************************************************************/
 202 void __init dove_uart3_init(void)
 203 {
 204         orion_uart3_init(DOVE_UART3_VIRT_BASE, DOVE_UART3_PHYS_BASE,
 205                          IRQ_DOVE_UART_3, tclk);
 206 }
 207
 208 /*****************************************************************************
 209  * SPI
 210  ****************************************************************************/
 211 void __init dove_spi0_init(void)
 212 {
 213         orion_spi_init(DOVE_SPI0_PHYS_BASE);
 214 }
 215
 216 void __init dove_spi1_init(void)
 217 {
 218         orion_spi_1_init(DOVE_SPI1_PHYS_BASE);
 219 }
 220
 221 /*****************************************************************************
 222  * I2C
 223  ****************************************************************************/
 224 void __init dove_i2c_init(void)
 225 {
 226         orion_i2c_init(DOVE_I2C_PHYS_BASE, IRQ_DOVE_I2C, 10);
 227 }
 228
 229 /*****************************************************************************
 230  * Time handling
 231  ****************************************************************************/
 232 void __init dove_init_early(void)
 233 {
 234         orion_time_set_base(TIMER_VIRT_BASE);
 235 }
 236
 237 static int __init dove_find_tclk(void)
 238 {
 239         return 166666667;
 240 }
 241
 242 static void __init dove_timer_init(void)
 243 {
 244         dove_tclk = dove_find_tclk();
 245         orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
 246                         IRQ_DOVE_BRIDGE, dove_tclk);
 247 }
 248
 249 struct sys_timer dove_timer = {
 250         .init = dove_timer_init,
 251 };
 252
 253 /*****************************************************************************
 254  * Cryptographic Engines and Security Accelerator (CESA)
 255  ****************************************************************************/
 256 void __init dove_crypto_init(void)
 257 {
 258         orion_crypto_init(DOVE_CRYPT_PHYS_BASE, DOVE_CESA_PHYS_BASE,
 259                           DOVE_CESA_SIZE, IRQ_DOVE_CRYPTO);
 260 }
 261
 262 /*****************************************************************************
 263  * XOR 0
 264  ****************************************************************************/
 265 void __init dove_xor0_init(void)
 266 {
 267         orion_xor0_init(DOVE_XOR0_PHYS_BASE, DOVE_XOR0_HIGH_PHYS_BASE,
 268                         IRQ_DOVE_XOR_00, IRQ_DOVE_XOR_01);
 269 }
 270
 271 /*****************************************************************************
 272  * XOR 1
 273  ****************************************************************************/
 274 void __init dove_xor1_init(void)
 275 {
 276         orion_xor1_init(DOVE_XOR1_PHYS_BASE, DOVE_XOR1_HIGH_PHYS_BASE,
 277                         IRQ_DOVE_XOR_10, IRQ_DOVE_XOR_11);
 278 }
 279
 280 /*****************************************************************************
 281  * SDIO
 282  ****************************************************************************/
 283 static u64 sdio_dmamask = DMA_BIT_MASK(32);
 284
 285 static struct resource dove_sdio0_resources[] = {
 286         {
 287                 .start  = DOVE_SDIO0_PHYS_BASE,
 288                 .end    = DOVE_SDIO0_PHYS_BASE + 0xff,
 289                 .flags  = IORESOURCE_MEM,
 290         }, {
 291                 .start  = IRQ_DOVE_SDIO0,
 292                 .end    = IRQ_DOVE_SDIO0,
 293                 .flags  = IORESOURCE_IRQ,
 294         },
 295 };
 296
 297 static struct platform_device dove_sdio0 = {
 298         .name           = "sdhci-dove",
 299         .id             = 0,
 300         .dev            = {
 301                 .dma_mask               = &sdio_dmamask,
 302                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 303         },
 304         .resource       = dove_sdio0_resources,
 305         .num_resources  = ARRAY_SIZE(dove_sdio0_resources),
 306 };
 307
 308 void __init dove_sdio0_init(void)
 309 {
 310         platform_device_register(&dove_sdio0);
 311 }
 312
 313 static struct resource dove_sdio1_resources[] = {
 314         {
 315                 .start  = DOVE_SDIO1_PHYS_BASE,
 316                 .end    = DOVE_SDIO1_PHYS_BASE + 0xff,
 317                 .flags  = IORESOURCE_MEM,
 318         }, {
 319                 .start  = IRQ_DOVE_SDIO1,
 320                 .end    = IRQ_DOVE_SDIO1,
 321                 .flags  = IORESOURCE_IRQ,
 322         },
 323 };
 324
 325 static struct platform_device dove_sdio1 = {
 326         .name           = "sdhci-dove",
 327         .id             = 1,
 328         .dev            = {
 329                 .dma_mask               = &sdio_dmamask,
 330                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 331         },
 332         .resource       = dove_sdio1_resources,
 333         .num_resources  = ARRAY_SIZE(dove_sdio1_resources),
 334 };
 335
 336 void __init dove_sdio1_init(void)
 337 {
 338         platform_device_register(&dove_sdio1);
 339 }
 340
 341 void __init dove_init(void)
 342 {
 343         pr_info("Dove 88AP510 SoC, TCLK = %d MHz.\n",
 344                 (dove_tclk + 499999) / 1000000);
 345
 346 #ifdef CONFIG_CACHE_TAUROS2
 347         tauros2_init(0);
 348 #endif
 349         dove_setup_cpu_mbus();
 350
 351         /* Setup root of clk tree */
 352         dove_clk_init();
 353
 354         /* internal devices that every board has */
 355         dove_rtc_init();
 356         dove_xor0_init();
 357         dove_xor1_init();
 358 }
 359
 360 void dove_restart(char mode, const char *cmd)
 361 {
 362         /*
 363          * Enable soft reset to assert RSTOUTn.
 364          */
 365         writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
 366
 367         /*
 368          * Assert soft reset.
 369          */
 370         writel(SOFT_RESET, SYSTEM_SOFT_RESET);
 371
 372         while (1)
 373                 ;
 374 }
 375
 376 #if defined(CONFIG_MACH_DOVE_DT)
 377 /*
 378  * Auxdata required until real OF clock provider
 379  */
 380 struct of_dev_auxdata dove_auxdata_lookup[] __initdata = {
 381         OF_DEV_AUXDATA("marvell,orion-spi", 0xf1010600, "orion_spi.0", NULL),
 382         OF_DEV_AUXDATA("marvell,orion-spi", 0xf1014600, "orion_spi.1", NULL),
 383         OF_DEV_AUXDATA("marvell,orion-wdt", 0xf1020300, "orion_wdt", NULL),
 384         OF_DEV_AUXDATA("marvell,mv64xxx-i2c", 0xf1011000, "mv64xxx_i2c.0",
 385                        NULL),
 386         OF_DEV_AUXDATA("marvell,orion-sata", 0xf10a0000, "sata_mv.0", NULL),
 387         OF_DEV_AUXDATA("marvell,dove-sdhci", 0xf1092000, "sdhci-dove.0", NULL),
 388         OF_DEV_AUXDATA("marvell,dove-sdhci", 0xf1090000, "sdhci-dove.1", NULL),
 389         {},
 390 };
 391
 392 static struct mv643xx_eth_platform_data dove_dt_ge00_data = {
 393         .phy_addr = MV643XX_ETH_PHY_ADDR_DEFAULT,
 394 };
 395
 396 static void __init dove_dt_init(void)
 397 {
 398         pr_info("Dove 88AP510 SoC, TCLK = %d MHz.\n",
 399                 (dove_tclk + 499999) / 1000000);
 400
 401 #ifdef CONFIG_CACHE_TAUROS2
 402         tauros2_init();
 403 #endif
 404         dove_setup_cpu_mbus();
 405
 406         /* Setup root of clk tree */
 407         dove_clk_init();
 408
 409         /* Internal devices not ported to DT yet */
 410         dove_rtc_init();
 411         dove_xor0_init();
 412         dove_xor1_init();
 413
 414         dove_ge00_init(&dove_dt_ge00_data);
 415         dove_ehci0_init();
 416         dove_ehci1_init();
 417         dove_pcie_init(1, 1);
 418         dove_crypto_init();
 419
 420         of_platform_populate(NULL, of_default_bus_match_table,
 421                              dove_auxdata_lookup, NULL);
 422 }
 423
 424 static const char * const dove_dt_board_compat[] = {
 425         "marvell,dove",
 426         NULL
 427 };
 428
 429 DT_MACHINE_START(DOVE_DT, "Marvell Dove (Flattened Device Tree)")
 430         .map_io         = dove_map_io,
 431         .init_early     = dove_init_early,
 432         .init_irq       = orion_dt_init_irq,
 433         .timer          = &dove_timer,
 434         .init_machine   = dove_dt_init,
 435         .restart        = dove_restart,
 436         .dt_compat      = dove_dt_board_compat,
 437 MACHINE_END
 438 #endif