arch/arm/mach-dove/common.c

   1 /*
   2  * arch/arm/mach-dove/common.c
   3  *
   4  * Core functions for Marvell Dove 88AP510 System On Chip
   5  *
   6  * This file is licensed under the terms of the GNU General Public
   7  * License version 2.  This program is licensed "as is" without any
   8  * warranty of any kind, whether express or implied.
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/delay.h>
  13 #include <linux/init.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/pci.h>
  16 #include <linux/clk-provider.h>
  17 #include <linux/ata_platform.h>
  18 #include <linux/gpio.h>
  19 #include <asm/page.h>
  20 #include <asm/setup.h>
  21 #include <asm/timex.h>
  22 #include <asm/hardware/cache-tauros2.h>
  23 #include <asm/mach/map.h>
  24 #include <asm/mach/time.h>
  25 #include <asm/mach/pci.h>
  26 #include <mach/dove.h>
  27 #include <mach/bridge-regs.h>
  28 #include <asm/mach/arch.h>
  29 #include <linux/irq.h>
  30 #include <plat/time.h>
  31 #include <plat/ehci-orion.h>
  32 #include <plat/common.h>
  33 #include <plat/addr-map.h>
  34 #include "common.h"
  35
  36 static int get_tclk(void);
  37
  38 /*****************************************************************************
  39  * I/O Address Mapping
  40  ****************************************************************************/
  41 static struct map_desc dove_io_desc[] __initdata = {
  42         {
  43                 .virtual        = DOVE_SB_REGS_VIRT_BASE,
  44                 .pfn            = __phys_to_pfn(DOVE_SB_REGS_PHYS_BASE),
  45                 .length         = DOVE_SB_REGS_SIZE,
  46                 .type           = MT_DEVICE,
  47         }, {
  48                 .virtual        = DOVE_NB_REGS_VIRT_BASE,
  49                 .pfn            = __phys_to_pfn(DOVE_NB_REGS_PHYS_BASE),
  50                 .length         = DOVE_NB_REGS_SIZE,
  51                 .type           = MT_DEVICE,
  52         }, {
  53                 .virtual        = DOVE_PCIE0_IO_VIRT_BASE,
  54                 .pfn            = __phys_to_pfn(DOVE_PCIE0_IO_PHYS_BASE),
  55                 .length         = DOVE_PCIE0_IO_SIZE,
  56                 .type           = MT_DEVICE,
  57         }, {
  58                 .virtual        = DOVE_PCIE1_IO_VIRT_BASE,
  59                 .pfn            = __phys_to_pfn(DOVE_PCIE1_IO_PHYS_BASE),
  60                 .length         = DOVE_PCIE1_IO_SIZE,
  61                 .type           = MT_DEVICE,
  62         },
  63 };
  64
  65 void __init dove_map_io(void)
  66 {
  67         iotable_init(dove_io_desc, ARRAY_SIZE(dove_io_desc));
  68 }
  69
  70 /*****************************************************************************
  71  * CLK tree
  72  ****************************************************************************/
  73 static struct clk *tclk;
  74
  75 static void __init clk_init(void)
  76 {
  77         tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT,
  78                                        get_tclk());
  79
  80         orion_clkdev_init(tclk);
  81 }
  82
  83 /*****************************************************************************
  84  * EHCI0
  85  ****************************************************************************/
  86 void __init dove_ehci0_init(void)
  87 {
  88         orion_ehci_init(DOVE_USB0_PHYS_BASE, IRQ_DOVE_USB0, EHCI_PHY_NA);
  89 }
  90
  91 /*****************************************************************************
  92  * EHCI1
  93  ****************************************************************************/
  94 void __init dove_ehci1_init(void)
  95 {
  96         orion_ehci_1_init(DOVE_USB1_PHYS_BASE, IRQ_DOVE_USB1);
  97 }
  98
  99 /*****************************************************************************
 100  * GE00
 101  ****************************************************************************/
 102 void __init dove_ge00_init(struct mv643xx_eth_platform_data *eth_data)
 103 {
 104         orion_ge00_init(eth_data, DOVE_GE00_PHYS_BASE,
 105                         IRQ_DOVE_GE00_SUM, IRQ_DOVE_GE00_ERR,
 106                         1600);
 107 }
 108
 109 /*****************************************************************************
 110  * SoC RTC
 111  ****************************************************************************/
 112 void __init dove_rtc_init(void)
 113 {
 114         orion_rtc_init(DOVE_RTC_PHYS_BASE, IRQ_DOVE_RTC);
 115 }
 116
 117 /*****************************************************************************
 118  * SATA
 119  ****************************************************************************/
 120 void __init dove_sata_init(struct mv_sata_platform_data *sata_data)
 121 {
 122         orion_sata_init(sata_data, DOVE_SATA_PHYS_BASE, IRQ_DOVE_SATA);
 123
 124 }
 125
 126 /*****************************************************************************
 127  * UART0
 128  ****************************************************************************/
 129 void __init dove_uart0_init(void)
 130 {
 131         orion_uart0_init(DOVE_UART0_VIRT_BASE, DOVE_UART0_PHYS_BASE,
 132                          IRQ_DOVE_UART_0, tclk);
 133 }
 134
 135 /*****************************************************************************
 136  * UART1
 137  ****************************************************************************/
 138 void __init dove_uart1_init(void)
 139 {
 140         orion_uart1_init(DOVE_UART1_VIRT_BASE, DOVE_UART1_PHYS_BASE,
 141                          IRQ_DOVE_UART_1, tclk);
 142 }
 143
 144 /*****************************************************************************
 145  * UART2
 146  ****************************************************************************/
 147 void __init dove_uart2_init(void)
 148 {
 149         orion_uart2_init(DOVE_UART2_VIRT_BASE, DOVE_UART2_PHYS_BASE,
 150                          IRQ_DOVE_UART_2, tclk);
 151 }
 152
 153 /*****************************************************************************
 154  * UART3
 155  ****************************************************************************/
 156 void __init dove_uart3_init(void)
 157 {
 158         orion_uart3_init(DOVE_UART3_VIRT_BASE, DOVE_UART3_PHYS_BASE,
 159                          IRQ_DOVE_UART_3, tclk);
 160 }
 161
 162 /*****************************************************************************
 163  * SPI
 164  ****************************************************************************/
 165 void __init dove_spi0_init(void)
 166 {
 167         orion_spi_init(DOVE_SPI0_PHYS_BASE);
 168 }
 169
 170 void __init dove_spi1_init(void)
 171 {
 172         orion_spi_1_init(DOVE_SPI1_PHYS_BASE);
 173 }
 174
 175 /*****************************************************************************
 176  * I2C
 177  ****************************************************************************/
 178 void __init dove_i2c_init(void)
 179 {
 180         orion_i2c_init(DOVE_I2C_PHYS_BASE, IRQ_DOVE_I2C, 10);
 181 }
 182
 183 /*****************************************************************************
 184  * Time handling
 185  ****************************************************************************/
 186 void __init dove_init_early(void)
 187 {
 188         orion_time_set_base(TIMER_VIRT_BASE);
 189 }
 190
 191 static int get_tclk(void)
 192 {
 193         /* use DOVE_RESET_SAMPLE_HI/LO to detect tclk */
 194         return 166666667;
 195 }
 196
 197 static void __init dove_timer_init(void)
 198 {
 199         orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
 200                         IRQ_DOVE_BRIDGE, get_tclk());
 201 }
 202
 203 struct sys_timer dove_timer = {
 204         .init = dove_timer_init,
 205 };
 206
 207 /*****************************************************************************
 208  * XOR 0
 209  ****************************************************************************/
 210 void __init dove_xor0_init(void)
 211 {
 212         orion_xor0_init(DOVE_XOR0_PHYS_BASE, DOVE_XOR0_HIGH_PHYS_BASE,
 213                         IRQ_DOVE_XOR_00, IRQ_DOVE_XOR_01);
 214 }
 215
 216 /*****************************************************************************
 217  * XOR 1
 218  ****************************************************************************/
 219 void __init dove_xor1_init(void)
 220 {
 221         orion_xor1_init(DOVE_XOR1_PHYS_BASE, DOVE_XOR1_HIGH_PHYS_BASE,
 222                         IRQ_DOVE_XOR_10, IRQ_DOVE_XOR_11);
 223 }
 224
 225 /*****************************************************************************
 226  * SDIO
 227  ****************************************************************************/
 228 static u64 sdio_dmamask = DMA_BIT_MASK(32);
 229
 230 static struct resource dove_sdio0_resources[] = {
 231         {
 232                 .start  = DOVE_SDIO0_PHYS_BASE,
 233                 .end    = DOVE_SDIO0_PHYS_BASE + 0xff,
 234                 .flags  = IORESOURCE_MEM,
 235         }, {
 236                 .start  = IRQ_DOVE_SDIO0,
 237                 .end    = IRQ_DOVE_SDIO0,
 238                 .flags  = IORESOURCE_IRQ,
 239         },
 240 };
 241
 242 static struct platform_device dove_sdio0 = {
 243         .name           = "sdhci-dove",
 244         .id             = 0,
 245         .dev            = {
 246                 .dma_mask               = &sdio_dmamask,
 247                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 248         },
 249         .resource       = dove_sdio0_resources,
 250         .num_resources  = ARRAY_SIZE(dove_sdio0_resources),
 251 };
 252
 253 void __init dove_sdio0_init(void)
 254 {
 255         platform_device_register(&dove_sdio0);
 256 }
 257
 258 static struct resource dove_sdio1_resources[] = {
 259         {
 260                 .start  = DOVE_SDIO1_PHYS_BASE,
 261                 .end    = DOVE_SDIO1_PHYS_BASE + 0xff,
 262                 .flags  = IORESOURCE_MEM,
 263         }, {
 264                 .start  = IRQ_DOVE_SDIO1,
 265                 .end    = IRQ_DOVE_SDIO1,
 266                 .flags  = IORESOURCE_IRQ,
 267         },
 268 };
 269
 270 static struct platform_device dove_sdio1 = {
 271         .name           = "sdhci-dove",
 272         .id             = 1,
 273         .dev            = {
 274                 .dma_mask               = &sdio_dmamask,
 275                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 276         },
 277         .resource       = dove_sdio1_resources,
 278         .num_resources  = ARRAY_SIZE(dove_sdio1_resources),
 279 };
 280
 281 void __init dove_sdio1_init(void)
 282 {
 283         platform_device_register(&dove_sdio1);
 284 }
 285
 286 void __init dove_init(void)
 287 {
 288         printk(KERN_INFO "Dove 88AP510 SoC, ");
 289         printk(KERN_INFO "TCLK = %dMHz\n", (get_tclk() + 499999) / 1000000);
 290
 291 #ifdef CONFIG_CACHE_TAUROS2
 292         tauros2_init();
 293 #endif
 294         dove_setup_cpu_mbus();
 295
 296         /* Setup root of clk tree */
 297         clk_init();
 298
 299         /* internal devices that every board has */
 300         dove_rtc_init();
 301         dove_xor0_init();
 302         dove_xor1_init();
 303 }
 304
 305 void dove_restart(char mode, const char *cmd)
 306 {
 307         /*
 308          * Enable soft reset to assert RSTOUTn.
 309          */
 310         writel(SOFT_RESET_OUT_EN, RSTOUTn_MASK);
 311
 312         /*
 313          * Assert soft reset.
 314          */
 315         writel(SOFT_RESET, SYSTEM_SOFT_RESET);
 316
 317         while (1)
 318                 ;
 319 }