arch/arm/mach-ep93xx/core.c

   1 /*
   2  * arch/arm/mach-ep93xx/core.c
   3  * Core routines for Cirrus EP93xx chips.
   4  *
   5  * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
   6  *
   7  * Thanks go to Michael Burian and Ray Lehtiniemi for their key
   8  * role in the ep93xx linux community.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or (at
  13  * your option) any later version.
  14  */
  15
  16 #include <linux/config.h>
  17 #include <linux/kernel.h>
  18 #include <linux/init.h>
  19 #include <linux/spinlock.h>
  20 #include <linux/sched.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/serial.h>
  23 #include <linux/tty.h>
  24 #include <linux/bitops.h>
  25 #include <linux/serial.h>
  26 #include <linux/serial_8250.h>
  27 #include <linux/serial_core.h>
  28 #include <linux/device.h>
  29 #include <linux/mm.h>
  30 #include <linux/time.h>
  31 #include <linux/timex.h>
  32 #include <linux/delay.h>
  33 #include <linux/amba/bus.h>
  34
  35 #include <asm/types.h>
  36 #include <asm/setup.h>
  37 #include <asm/memory.h>
  38 #include <asm/hardware.h>
  39 #include <asm/irq.h>
  40 #include <asm/system.h>
  41 #include <asm/tlbflush.h>
  42 #include <asm/pgtable.h>
  43 #include <asm/io.h>
  44
  45 #include <asm/mach/map.h>
  46 #include <asm/mach/time.h>
  47 #include <asm/mach/irq.h>
  48 #include <asm/arch/gpio.h>
  49
  50 #include <asm/hardware/vic.h>
  51
  52
  53 /*************************************************************************
  54  * Static I/O mappings that are needed for all EP93xx platforms
  55  *************************************************************************/
  56 static struct map_desc ep93xx_io_desc[] __initdata = {
  57         {
  58                 .virtual        = EP93XX_AHB_VIRT_BASE,
  59                 .pfn            = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
  60                 .length         = EP93XX_AHB_SIZE,
  61                 .type           = MT_DEVICE,
  62         }, {
  63                 .virtual        = EP93XX_APB_VIRT_BASE,
  64                 .pfn            = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
  65                 .length         = EP93XX_APB_SIZE,
  66                 .type           = MT_DEVICE,
  67         },
  68 };
  69
  70 void __init ep93xx_map_io(void)
  71 {
  72         iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
  73 }
  74
  75
  76 /*************************************************************************
  77  * Timer handling for EP93xx
  78  *************************************************************************
  79  * The ep93xx has four internal timers.  Timers 1, 2 (both 16 bit) and
  80  * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
  81  * an interrupt on underflow.  Timer 4 (40 bit) counts down at 983.04 kHz,
  82  * is free-running, and can't generate interrupts.
  83  *
  84  * The 508 kHz timers are ideal for use for the timer interrupt, as the
  85  * most common values of HZ divide 508 kHz nicely.  We pick one of the 16
  86  * bit timers (timer 1) since we don't need more than 16 bits of reload
  87  * value as long as HZ >= 8.
  88  *
  89  * The higher clock rate of timer 4 makes it a better choice than the
  90  * other timers for use in gettimeoffset(), while the fact that it can't
  91  * generate interrupts means we don't have to worry about not being able
  92  * to use this timer for something else.  We also use timer 4 for keeping
  93  * track of lost jiffies.
  94  */
  95 static unsigned int last_jiffy_time;
  96
  97 #define TIMER4_TICKS_PER_JIFFY          ((CLOCK_TICK_RATE + (HZ/2)) / HZ)
  98
  99 static int ep93xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
 100 {
 101         write_seqlock(&xtime_lock);
 102
 103         __raw_writel(1, EP93XX_TIMER1_CLEAR);
 104         while (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time
 105                                                 >= TIMER4_TICKS_PER_JIFFY) {
 106                 last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
 107                 timer_tick(regs);
 108         }
 109
 110         write_sequnlock(&xtime_lock);
 111
 112         return IRQ_HANDLED;
 113 }
 114
 115 static struct irqaction ep93xx_timer_irq = {
 116         .name           = "ep93xx timer",
 117         .flags          = SA_INTERRUPT | SA_TIMER,
 118         .handler        = ep93xx_timer_interrupt,
 119 };
 120
 121 static void __init ep93xx_timer_init(void)
 122 {
 123         /* Enable periodic HZ timer.  */
 124         __raw_writel(0x48, EP93XX_TIMER1_CONTROL);
 125         __raw_writel((508000 / HZ) - 1, EP93XX_TIMER1_LOAD);
 126         __raw_writel(0xc8, EP93XX_TIMER1_CONTROL);
 127
 128         /* Enable lost jiffy timer.  */
 129         __raw_writel(0x100, EP93XX_TIMER4_VALUE_HIGH);
 130
 131         setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
 132 }
 133
 134 static unsigned long ep93xx_gettimeoffset(void)
 135 {
 136         int offset;
 137
 138         offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
 139
 140         /* Calculate (1000000 / 983040) * offset.  */
 141         return offset + (53 * offset / 3072);
 142 }
 143
 144 struct sys_timer ep93xx_timer = {
 145         .init           = ep93xx_timer_init,
 146         .offset         = ep93xx_gettimeoffset,
 147 };
 148
 149
 150 /*************************************************************************
 151  * GPIO handling for EP93xx
 152  *************************************************************************/
 153 static unsigned char data_register_offset[8] = {
 154         0x00, 0x04, 0x08, 0x0c, 0x20, 0x30, 0x38, 0x40,
 155 };
 156
 157 static unsigned char data_direction_register_offset[8] = {
 158         0x10, 0x14, 0x18, 0x1c, 0x24, 0x34, 0x3c, 0x44,
 159 };
 160
 161 void gpio_line_config(int line, int direction)
 162 {
 163         unsigned int data_direction_register;
 164         unsigned long flags;
 165         unsigned char v;
 166
 167         data_direction_register =
 168                 EP93XX_GPIO_REG(data_direction_register_offset[line >> 3]);
 169
 170         local_irq_save(flags);
 171         if (direction == GPIO_OUT) {
 172                 v = __raw_readb(data_direction_register);
 173                 v |= 1 << (line & 7);
 174                 __raw_writeb(v, data_direction_register);
 175         } else if (direction == GPIO_IN) {
 176                 v = __raw_readb(data_direction_register);
 177                 v &= ~(1 << (line & 7));
 178                 __raw_writeb(v, data_direction_register);
 179         }
 180         local_irq_restore(flags);
 181 }
 182 EXPORT_SYMBOL(gpio_line_config);
 183
 184 int gpio_line_get(int line)
 185 {
 186         unsigned int data_register;
 187
 188         data_register = EP93XX_GPIO_REG(data_register_offset[line >> 3]);
 189
 190         return !!(__raw_readb(data_register) & (1 << (line & 7)));
 191 }
 192 EXPORT_SYMBOL(gpio_line_get);
 193
 194 void gpio_line_set(int line, int value)
 195 {
 196         unsigned int data_register;
 197         unsigned long flags;
 198         unsigned char v;
 199
 200         data_register = EP93XX_GPIO_REG(data_register_offset[line >> 3]);
 201
 202         local_irq_save(flags);
 203         if (value == EP93XX_GPIO_HIGH) {
 204                 v = __raw_readb(data_register);
 205                 v |= 1 << (line & 7);
 206                 __raw_writeb(v, data_register);
 207         } else if (value == EP93XX_GPIO_LOW) {
 208                 v = __raw_readb(data_register);
 209                 v &= ~(1 << (line & 7));
 210                 __raw_writeb(v, data_register);
 211         }
 212         local_irq_restore(flags);
 213 }
 214 EXPORT_SYMBOL(gpio_line_set);
 215
 216
 217 /*************************************************************************
 218  * EP93xx IRQ handling
 219  *************************************************************************/
 220 void __init ep93xx_init_irq(void)
 221 {
 222         vic_init((void *)EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK);
 223         vic_init((void *)EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK);
 224 }
 225
 226
 227 /*************************************************************************
 228  * EP93xx peripheral handling
 229  *************************************************************************/
 230 void __init ep93xx_init_devices(void)
 231 {
 232         unsigned int v;
 233
 234         /*
 235          * Disallow access to MaverickCrunch initially.
 236          */
 237         v = __raw_readl(EP93XX_SYSCON_DEVICE_CONFIG);
 238         v &= ~EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE;
 239         __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
 240         __raw_writel(v, EP93XX_SYSCON_DEVICE_CONFIG);
 241 }