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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
[deliverable/linux.git] / arch / arm / mach-ep93xx / core.c
1 /*
2 * arch/arm/mach-ep93xx/core.c
3 * Core routines for Cirrus EP93xx chips.
4 *
5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6 * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
7 *
8 * Thanks go to Michael Burian and Ray Lehtiniemi for their key
9 * role in the ep93xx linux community.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 */
16
17 #define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
18
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/platform_device.h>
22 #include <linux/interrupt.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/sys_soc.h>
25 #include <linux/timex.h>
26 #include <linux/irq.h>
27 #include <linux/io.h>
28 #include <linux/gpio.h>
29 #include <linux/leds.h>
30 #include <linux/termios.h>
31 #include <linux/amba/bus.h>
32 #include <linux/amba/serial.h>
33 #include <linux/mtd/physmap.h>
34 #include <linux/i2c.h>
35 #include <linux/i2c-gpio.h>
36 #include <linux/spi/spi.h>
37 #include <linux/export.h>
38 #include <linux/irqchip/arm-vic.h>
39 #include <linux/reboot.h>
40 #include <linux/usb/ohci_pdriver.h>
41
42 #include <mach/hardware.h>
43 #include <linux/platform_data/video-ep93xx.h>
44 #include <linux/platform_data/keypad-ep93xx.h>
45 #include <linux/platform_data/spi-ep93xx.h>
46 #include <mach/gpio-ep93xx.h>
47
48 #include <asm/mach/arch.h>
49 #include <asm/mach/map.h>
50 #include <asm/mach/time.h>
51
52 #include "soc.h"
53
54 /*************************************************************************
55 * Static I/O mappings that are needed for all EP93xx platforms
56 *************************************************************************/
57 static struct map_desc ep93xx_io_desc[] __initdata = {
58 {
59 .virtual = EP93XX_AHB_VIRT_BASE,
60 .pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
61 .length = EP93XX_AHB_SIZE,
62 .type = MT_DEVICE,
63 }, {
64 .virtual = EP93XX_APB_VIRT_BASE,
65 .pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
66 .length = EP93XX_APB_SIZE,
67 .type = MT_DEVICE,
68 },
69 };
70
71 void __init ep93xx_map_io(void)
72 {
73 iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
74 }
75
76
77 /*************************************************************************
78 * Timer handling for EP93xx
79 *************************************************************************
80 * The ep93xx has four internal timers. Timers 1, 2 (both 16 bit) and
81 * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
82 * an interrupt on underflow. Timer 4 (40 bit) counts down at 983.04 kHz,
83 * is free-running, and can't generate interrupts.
84 *
85 * The 508 kHz timers are ideal for use for the timer interrupt, as the
86 * most common values of HZ divide 508 kHz nicely. We pick one of the 16
87 * bit timers (timer 1) since we don't need more than 16 bits of reload
88 * value as long as HZ >= 8.
89 *
90 * The higher clock rate of timer 4 makes it a better choice than the
91 * other timers for use in gettimeoffset(), while the fact that it can't
92 * generate interrupts means we don't have to worry about not being able
93 * to use this timer for something else. We also use timer 4 for keeping
94 * track of lost jiffies.
95 */
96 #define EP93XX_TIMER_REG(x) (EP93XX_TIMER_BASE + (x))
97 #define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00)
98 #define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04)
99 #define EP93XX_TIMER1_CONTROL EP93XX_TIMER_REG(0x08)
100 #define EP93XX_TIMER123_CONTROL_ENABLE (1 << 7)
101 #define EP93XX_TIMER123_CONTROL_MODE (1 << 6)
102 #define EP93XX_TIMER123_CONTROL_CLKSEL (1 << 3)
103 #define EP93XX_TIMER1_CLEAR EP93XX_TIMER_REG(0x0c)
104 #define EP93XX_TIMER2_LOAD EP93XX_TIMER_REG(0x20)
105 #define EP93XX_TIMER2_VALUE EP93XX_TIMER_REG(0x24)
106 #define EP93XX_TIMER2_CONTROL EP93XX_TIMER_REG(0x28)
107 #define EP93XX_TIMER2_CLEAR EP93XX_TIMER_REG(0x2c)
108 #define EP93XX_TIMER4_VALUE_LOW EP93XX_TIMER_REG(0x60)
109 #define EP93XX_TIMER4_VALUE_HIGH EP93XX_TIMER_REG(0x64)
110 #define EP93XX_TIMER4_VALUE_HIGH_ENABLE (1 << 8)
111 #define EP93XX_TIMER3_LOAD EP93XX_TIMER_REG(0x80)
112 #define EP93XX_TIMER3_VALUE EP93XX_TIMER_REG(0x84)
113 #define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88)
114 #define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c)
115
116 #define EP93XX_TIMER123_CLOCK 508469
117 #define EP93XX_TIMER4_CLOCK 983040
118
119 #define TIMER1_RELOAD ((EP93XX_TIMER123_CLOCK / HZ) - 1)
120 #define TIMER4_TICKS_PER_JIFFY DIV_ROUND_CLOSEST(CLOCK_TICK_RATE, HZ)
121
122 static unsigned int last_jiffy_time;
123
124 static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
125 {
126 /* Writing any value clears the timer interrupt */
127 __raw_writel(1, EP93XX_TIMER1_CLEAR);
128
129 /* Recover lost jiffies */
130 while ((signed long)
131 (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time)
132 >= TIMER4_TICKS_PER_JIFFY) {
133 last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
134 timer_tick();
135 }
136
137 return IRQ_HANDLED;
138 }
139
140 static struct irqaction ep93xx_timer_irq = {
141 .name = "ep93xx timer",
142 .flags = IRQF_TIMER | IRQF_IRQPOLL,
143 .handler = ep93xx_timer_interrupt,
144 };
145
146 static u32 ep93xx_gettimeoffset(void)
147 {
148 int offset;
149
150 offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
151
152 /*
153 * Timer 4 is based on a 983.04 kHz reference clock,
154 * so dividing by 983040 gives the fraction of a second,
155 * so dividing by 0.983040 converts to uS.
156 * Refactor the calculation to avoid overflow.
157 * Finally, multiply by 1000 to give nS.
158 */
159 return (offset + (53 * offset / 3072)) * 1000;
160 }
161
162 void __init ep93xx_timer_init(void)
163 {
164 u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
165 EP93XX_TIMER123_CONTROL_CLKSEL;
166
167 arch_gettimeoffset = ep93xx_gettimeoffset;
168
169 /* Enable periodic HZ timer. */
170 __raw_writel(tmode, EP93XX_TIMER1_CONTROL);
171 __raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD);
172 __raw_writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
173 EP93XX_TIMER1_CONTROL);
174
175 /* Enable lost jiffy timer. */
176 __raw_writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
177 EP93XX_TIMER4_VALUE_HIGH);
178
179 setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
180 }
181
182
183 /*************************************************************************
184 * EP93xx IRQ handling
185 *************************************************************************/
186 void __init ep93xx_init_irq(void)
187 {
188 vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
189 vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
190 }
191
192
193 /*************************************************************************
194 * EP93xx System Controller Software Locked register handling
195 *************************************************************************/
196
197 /*
198 * syscon_swlock prevents anything else from writing to the syscon
199 * block while a software locked register is being written.
200 */
201 static DEFINE_SPINLOCK(syscon_swlock);
202
203 void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
204 {
205 unsigned long flags;
206
207 spin_lock_irqsave(&syscon_swlock, flags);
208
209 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
210 __raw_writel(val, reg);
211
212 spin_unlock_irqrestore(&syscon_swlock, flags);
213 }
214
215 void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
216 {
217 unsigned long flags;
218 unsigned int val;
219
220 spin_lock_irqsave(&syscon_swlock, flags);
221
222 val = __raw_readl(EP93XX_SYSCON_DEVCFG);
223 val &= ~clear_bits;
224 val |= set_bits;
225 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
226 __raw_writel(val, EP93XX_SYSCON_DEVCFG);
227
228 spin_unlock_irqrestore(&syscon_swlock, flags);
229 }
230
231 /**
232 * ep93xx_chip_revision() - returns the EP93xx chip revision
233 *
234 * See <mach/platform.h> for more information.
235 */
236 unsigned int ep93xx_chip_revision(void)
237 {
238 unsigned int v;
239
240 v = __raw_readl(EP93XX_SYSCON_SYSCFG);
241 v &= EP93XX_SYSCON_SYSCFG_REV_MASK;
242 v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT;
243 return v;
244 }
245
246 /*************************************************************************
247 * EP93xx GPIO
248 *************************************************************************/
249 static struct resource ep93xx_gpio_resource[] = {
250 DEFINE_RES_MEM(EP93XX_GPIO_PHYS_BASE, 0xcc),
251 };
252
253 static struct platform_device ep93xx_gpio_device = {
254 .name = "gpio-ep93xx",
255 .id = -1,
256 .num_resources = ARRAY_SIZE(ep93xx_gpio_resource),
257 .resource = ep93xx_gpio_resource,
258 };
259
260 /*************************************************************************
261 * EP93xx peripheral handling
262 *************************************************************************/
263 #define EP93XX_UART_MCR_OFFSET (0x0100)
264
265 static void ep93xx_uart_set_mctrl(struct amba_device *dev,
266 void __iomem *base, unsigned int mctrl)
267 {
268 unsigned int mcr;
269
270 mcr = 0;
271 if (mctrl & TIOCM_RTS)
272 mcr |= 2;
273 if (mctrl & TIOCM_DTR)
274 mcr |= 1;
275
276 __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
277 }
278
279 static struct amba_pl010_data ep93xx_uart_data = {
280 .set_mctrl = ep93xx_uart_set_mctrl,
281 };
282
283 static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE,
284 { IRQ_EP93XX_UART1 }, &ep93xx_uart_data);
285
286 static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE,
287 { IRQ_EP93XX_UART2 }, NULL);
288
289 static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE,
290 { IRQ_EP93XX_UART3 }, &ep93xx_uart_data);
291
292 static struct resource ep93xx_rtc_resource[] = {
293 DEFINE_RES_MEM(EP93XX_RTC_PHYS_BASE, 0x10c),
294 };
295
296 static struct platform_device ep93xx_rtc_device = {
297 .name = "ep93xx-rtc",
298 .id = -1,
299 .num_resources = ARRAY_SIZE(ep93xx_rtc_resource),
300 .resource = ep93xx_rtc_resource,
301 };
302
303 /*************************************************************************
304 * EP93xx OHCI USB Host
305 *************************************************************************/
306
307 static struct clk *ep93xx_ohci_host_clock;
308
309 static int ep93xx_ohci_power_on(struct platform_device *pdev)
310 {
311 if (!ep93xx_ohci_host_clock) {
312 ep93xx_ohci_host_clock = devm_clk_get(&pdev->dev, NULL);
313 if (IS_ERR(ep93xx_ohci_host_clock))
314 return PTR_ERR(ep93xx_ohci_host_clock);
315 }
316
317 return clk_enable(ep93xx_ohci_host_clock);
318 }
319
320 static void ep93xx_ohci_power_off(struct platform_device *pdev)
321 {
322 clk_disable(ep93xx_ohci_host_clock);
323 }
324
325 static struct usb_ohci_pdata ep93xx_ohci_pdata = {
326 .power_on = ep93xx_ohci_power_on,
327 .power_off = ep93xx_ohci_power_off,
328 .power_suspend = ep93xx_ohci_power_off,
329 };
330
331 static struct resource ep93xx_ohci_resources[] = {
332 DEFINE_RES_MEM(EP93XX_USB_PHYS_BASE, 0x1000),
333 DEFINE_RES_IRQ(IRQ_EP93XX_USB),
334 };
335
336 static u64 ep93xx_ohci_dma_mask = DMA_BIT_MASK(32);
337
338 static struct platform_device ep93xx_ohci_device = {
339 .name = "ohci-platform",
340 .id = -1,
341 .num_resources = ARRAY_SIZE(ep93xx_ohci_resources),
342 .resource = ep93xx_ohci_resources,
343 .dev = {
344 .dma_mask = &ep93xx_ohci_dma_mask,
345 .coherent_dma_mask = DMA_BIT_MASK(32),
346 .platform_data = &ep93xx_ohci_pdata,
347 },
348 };
349
350 /*************************************************************************
351 * EP93xx physmap'ed flash
352 *************************************************************************/
353 static struct physmap_flash_data ep93xx_flash_data;
354
355 static struct resource ep93xx_flash_resource = {
356 .flags = IORESOURCE_MEM,
357 };
358
359 static struct platform_device ep93xx_flash = {
360 .name = "physmap-flash",
361 .id = 0,
362 .dev = {
363 .platform_data = &ep93xx_flash_data,
364 },
365 .num_resources = 1,
366 .resource = &ep93xx_flash_resource,
367 };
368
369 /**
370 * ep93xx_register_flash() - Register the external flash device.
371 * @width: bank width in octets
372 * @start: resource start address
373 * @size: resource size
374 */
375 void __init ep93xx_register_flash(unsigned int width,
376 resource_size_t start, resource_size_t size)
377 {
378 ep93xx_flash_data.width = width;
379
380 ep93xx_flash_resource.start = start;
381 ep93xx_flash_resource.end = start + size - 1;
382
383 platform_device_register(&ep93xx_flash);
384 }
385
386
387 /*************************************************************************
388 * EP93xx ethernet peripheral handling
389 *************************************************************************/
390 static struct ep93xx_eth_data ep93xx_eth_data;
391
392 static struct resource ep93xx_eth_resource[] = {
393 DEFINE_RES_MEM(EP93XX_ETHERNET_PHYS_BASE, 0x10000),
394 DEFINE_RES_IRQ(IRQ_EP93XX_ETHERNET),
395 };
396
397 static u64 ep93xx_eth_dma_mask = DMA_BIT_MASK(32);
398
399 static struct platform_device ep93xx_eth_device = {
400 .name = "ep93xx-eth",
401 .id = -1,
402 .dev = {
403 .platform_data = &ep93xx_eth_data,
404 .coherent_dma_mask = DMA_BIT_MASK(32),
405 .dma_mask = &ep93xx_eth_dma_mask,
406 },
407 .num_resources = ARRAY_SIZE(ep93xx_eth_resource),
408 .resource = ep93xx_eth_resource,
409 };
410
411 /**
412 * ep93xx_register_eth - Register the built-in ethernet platform device.
413 * @data: platform specific ethernet configuration (__initdata)
414 * @copy_addr: flag indicating that the MAC address should be copied
415 * from the IndAd registers (as programmed by the bootloader)
416 */
417 void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
418 {
419 if (copy_addr)
420 memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
421
422 ep93xx_eth_data = *data;
423 platform_device_register(&ep93xx_eth_device);
424 }
425
426
427 /*************************************************************************
428 * EP93xx i2c peripheral handling
429 *************************************************************************/
430 static struct i2c_gpio_platform_data ep93xx_i2c_data;
431
432 static struct platform_device ep93xx_i2c_device = {
433 .name = "i2c-gpio",
434 .id = 0,
435 .dev = {
436 .platform_data = &ep93xx_i2c_data,
437 },
438 };
439
440 /**
441 * ep93xx_register_i2c - Register the i2c platform device.
442 * @data: platform specific i2c-gpio configuration (__initdata)
443 * @devices: platform specific i2c bus device information (__initdata)
444 * @num: the number of devices on the i2c bus
445 */
446 void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
447 struct i2c_board_info *devices, int num)
448 {
449 /*
450 * Set the EEPROM interface pin drive type control.
451 * Defines the driver type for the EECLK and EEDAT pins as either
452 * open drain, which will require an external pull-up, or a normal
453 * CMOS driver.
454 */
455 if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT)
456 pr_warning("sda != EEDAT, open drain has no effect\n");
457 if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK)
458 pr_warning("scl != EECLK, open drain has no effect\n");
459
460 __raw_writel((data->sda_is_open_drain << 1) |
461 (data->scl_is_open_drain << 0),
462 EP93XX_GPIO_EEDRIVE);
463
464 ep93xx_i2c_data = *data;
465 i2c_register_board_info(0, devices, num);
466 platform_device_register(&ep93xx_i2c_device);
467 }
468
469 /*************************************************************************
470 * EP93xx SPI peripheral handling
471 *************************************************************************/
472 static struct ep93xx_spi_info ep93xx_spi_master_data;
473
474 static struct resource ep93xx_spi_resources[] = {
475 DEFINE_RES_MEM(EP93XX_SPI_PHYS_BASE, 0x18),
476 DEFINE_RES_IRQ(IRQ_EP93XX_SSP),
477 };
478
479 static u64 ep93xx_spi_dma_mask = DMA_BIT_MASK(32);
480
481 static struct platform_device ep93xx_spi_device = {
482 .name = "ep93xx-spi",
483 .id = 0,
484 .dev = {
485 .platform_data = &ep93xx_spi_master_data,
486 .coherent_dma_mask = DMA_BIT_MASK(32),
487 .dma_mask = &ep93xx_spi_dma_mask,
488 },
489 .num_resources = ARRAY_SIZE(ep93xx_spi_resources),
490 .resource = ep93xx_spi_resources,
491 };
492
493 /**
494 * ep93xx_register_spi() - registers spi platform device
495 * @info: ep93xx board specific spi master info (__initdata)
496 * @devices: SPI devices to register (__initdata)
497 * @num: number of SPI devices to register
498 *
499 * This function registers platform device for the EP93xx SPI controller and
500 * also makes sure that SPI pins are muxed so that I2S is not using those pins.
501 */
502 void __init ep93xx_register_spi(struct ep93xx_spi_info *info,
503 struct spi_board_info *devices, int num)
504 {
505 /*
506 * When SPI is used, we need to make sure that I2S is muxed off from
507 * SPI pins.
508 */
509 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP);
510
511 ep93xx_spi_master_data = *info;
512 spi_register_board_info(devices, num);
513 platform_device_register(&ep93xx_spi_device);
514 }
515
516 /*************************************************************************
517 * EP93xx LEDs
518 *************************************************************************/
519 static const struct gpio_led ep93xx_led_pins[] __initconst = {
520 {
521 .name = "platform:grled",
522 .gpio = EP93XX_GPIO_LINE_GRLED,
523 }, {
524 .name = "platform:rdled",
525 .gpio = EP93XX_GPIO_LINE_RDLED,
526 },
527 };
528
529 static const struct gpio_led_platform_data ep93xx_led_data __initconst = {
530 .num_leds = ARRAY_SIZE(ep93xx_led_pins),
531 .leds = ep93xx_led_pins,
532 };
533
534 /*************************************************************************
535 * EP93xx pwm peripheral handling
536 *************************************************************************/
537 static struct resource ep93xx_pwm0_resource[] = {
538 DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE, 0x10),
539 };
540
541 static struct platform_device ep93xx_pwm0_device = {
542 .name = "ep93xx-pwm",
543 .id = 0,
544 .num_resources = ARRAY_SIZE(ep93xx_pwm0_resource),
545 .resource = ep93xx_pwm0_resource,
546 };
547
548 static struct resource ep93xx_pwm1_resource[] = {
549 DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE + 0x20, 0x10),
550 };
551
552 static struct platform_device ep93xx_pwm1_device = {
553 .name = "ep93xx-pwm",
554 .id = 1,
555 .num_resources = ARRAY_SIZE(ep93xx_pwm1_resource),
556 .resource = ep93xx_pwm1_resource,
557 };
558
559 void __init ep93xx_register_pwm(int pwm0, int pwm1)
560 {
561 if (pwm0)
562 platform_device_register(&ep93xx_pwm0_device);
563
564 /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
565 if (pwm1)
566 platform_device_register(&ep93xx_pwm1_device);
567 }
568
569 int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
570 {
571 int err;
572
573 if (pdev->id == 0) {
574 err = 0;
575 } else if (pdev->id == 1) {
576 err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
577 dev_name(&pdev->dev));
578 if (err)
579 return err;
580 err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
581 if (err)
582 goto fail;
583
584 /* PWM 1 output on EGPIO[14] */
585 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
586 } else {
587 err = -ENODEV;
588 }
589
590 return err;
591
592 fail:
593 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
594 return err;
595 }
596 EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
597
598 void ep93xx_pwm_release_gpio(struct platform_device *pdev)
599 {
600 if (pdev->id == 1) {
601 gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
602 gpio_free(EP93XX_GPIO_LINE_EGPIO14);
603
604 /* EGPIO[14] used for GPIO */
605 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
606 }
607 }
608 EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
609
610
611 /*************************************************************************
612 * EP93xx video peripheral handling
613 *************************************************************************/
614 static struct ep93xxfb_mach_info ep93xxfb_data;
615
616 static struct resource ep93xx_fb_resource[] = {
617 DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE, 0x800),
618 };
619
620 static struct platform_device ep93xx_fb_device = {
621 .name = "ep93xx-fb",
622 .id = -1,
623 .dev = {
624 .platform_data = &ep93xxfb_data,
625 .coherent_dma_mask = DMA_BIT_MASK(32),
626 .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask,
627 },
628 .num_resources = ARRAY_SIZE(ep93xx_fb_resource),
629 .resource = ep93xx_fb_resource,
630 };
631
632 /* The backlight use a single register in the framebuffer's register space */
633 #define EP93XX_RASTER_REG_BRIGHTNESS 0x20
634
635 static struct resource ep93xx_bl_resources[] = {
636 DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE +
637 EP93XX_RASTER_REG_BRIGHTNESS, 0x04),
638 };
639
640 static struct platform_device ep93xx_bl_device = {
641 .name = "ep93xx-bl",
642 .id = -1,
643 .num_resources = ARRAY_SIZE(ep93xx_bl_resources),
644 .resource = ep93xx_bl_resources,
645 };
646
647 /**
648 * ep93xx_register_fb - Register the framebuffer platform device.
649 * @data: platform specific framebuffer configuration (__initdata)
650 */
651 void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
652 {
653 ep93xxfb_data = *data;
654 platform_device_register(&ep93xx_fb_device);
655 platform_device_register(&ep93xx_bl_device);
656 }
657
658
659 /*************************************************************************
660 * EP93xx matrix keypad peripheral handling
661 *************************************************************************/
662 static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
663
664 static struct resource ep93xx_keypad_resource[] = {
665 DEFINE_RES_MEM(EP93XX_KEY_MATRIX_PHYS_BASE, 0x0c),
666 DEFINE_RES_IRQ(IRQ_EP93XX_KEY),
667 };
668
669 static struct platform_device ep93xx_keypad_device = {
670 .name = "ep93xx-keypad",
671 .id = -1,
672 .dev = {
673 .platform_data = &ep93xx_keypad_data,
674 },
675 .num_resources = ARRAY_SIZE(ep93xx_keypad_resource),
676 .resource = ep93xx_keypad_resource,
677 };
678
679 /**
680 * ep93xx_register_keypad - Register the keypad platform device.
681 * @data: platform specific keypad configuration (__initdata)
682 */
683 void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
684 {
685 ep93xx_keypad_data = *data;
686 platform_device_register(&ep93xx_keypad_device);
687 }
688
689 int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
690 {
691 int err;
692 int i;
693
694 for (i = 0; i < 8; i++) {
695 err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
696 if (err)
697 goto fail_gpio_c;
698 err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
699 if (err)
700 goto fail_gpio_d;
701 }
702
703 /* Enable the keypad controller; GPIO ports C and D used for keypad */
704 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
705 EP93XX_SYSCON_DEVCFG_GONK);
706
707 return 0;
708
709 fail_gpio_d:
710 gpio_free(EP93XX_GPIO_LINE_C(i));
711 fail_gpio_c:
712 for (--i; i >= 0; --i) {
713 gpio_free(EP93XX_GPIO_LINE_C(i));
714 gpio_free(EP93XX_GPIO_LINE_D(i));
715 }
716 return err;
717 }
718 EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
719
720 void ep93xx_keypad_release_gpio(struct platform_device *pdev)
721 {
722 int i;
723
724 for (i = 0; i < 8; i++) {
725 gpio_free(EP93XX_GPIO_LINE_C(i));
726 gpio_free(EP93XX_GPIO_LINE_D(i));
727 }
728
729 /* Disable the keypad controller; GPIO ports C and D used for GPIO */
730 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
731 EP93XX_SYSCON_DEVCFG_GONK);
732 }
733 EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
734
735 /*************************************************************************
736 * EP93xx I2S audio peripheral handling
737 *************************************************************************/
738 static struct resource ep93xx_i2s_resource[] = {
739 DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),
740 };
741
742 static struct platform_device ep93xx_i2s_device = {
743 .name = "ep93xx-i2s",
744 .id = -1,
745 .num_resources = ARRAY_SIZE(ep93xx_i2s_resource),
746 .resource = ep93xx_i2s_resource,
747 };
748
749 static struct platform_device ep93xx_pcm_device = {
750 .name = "ep93xx-pcm-audio",
751 .id = -1,
752 };
753
754 void __init ep93xx_register_i2s(void)
755 {
756 platform_device_register(&ep93xx_i2s_device);
757 platform_device_register(&ep93xx_pcm_device);
758 }
759
760 #define EP93XX_SYSCON_DEVCFG_I2S_MASK (EP93XX_SYSCON_DEVCFG_I2SONSSP | \
761 EP93XX_SYSCON_DEVCFG_I2SONAC97)
762
763 #define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
764 EP93XX_SYSCON_I2SCLKDIV_SPOL)
765
766 int ep93xx_i2s_acquire(void)
767 {
768 unsigned val;
769
770 ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_I2SONAC97,
771 EP93XX_SYSCON_DEVCFG_I2S_MASK);
772
773 /*
774 * This is potentially racy with the clock api for i2s_mclk, sclk and
775 * lrclk. Since the i2s driver is the only user of those clocks we
776 * rely on it to prevent parallel use of this function and the
777 * clock api for the i2s clocks.
778 */
779 val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
780 val &= ~EP93XX_I2SCLKDIV_MASK;
781 val |= EP93XX_SYSCON_I2SCLKDIV_ORIDE | EP93XX_SYSCON_I2SCLKDIV_SPOL;
782 ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
783
784 return 0;
785 }
786 EXPORT_SYMBOL(ep93xx_i2s_acquire);
787
788 void ep93xx_i2s_release(void)
789 {
790 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
791 }
792 EXPORT_SYMBOL(ep93xx_i2s_release);
793
794 /*************************************************************************
795 * EP93xx AC97 audio peripheral handling
796 *************************************************************************/
797 static struct resource ep93xx_ac97_resources[] = {
798 DEFINE_RES_MEM(EP93XX_AAC_PHYS_BASE, 0xac),
799 DEFINE_RES_IRQ(IRQ_EP93XX_AACINTR),
800 };
801
802 static struct platform_device ep93xx_ac97_device = {
803 .name = "ep93xx-ac97",
804 .id = -1,
805 .num_resources = ARRAY_SIZE(ep93xx_ac97_resources),
806 .resource = ep93xx_ac97_resources,
807 };
808
809 void __init ep93xx_register_ac97(void)
810 {
811 /*
812 * Make sure that the AC97 pins are not used by I2S.
813 */
814 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
815
816 platform_device_register(&ep93xx_ac97_device);
817 platform_device_register(&ep93xx_pcm_device);
818 }
819
820 /*************************************************************************
821 * EP93xx Watchdog
822 *************************************************************************/
823 static struct resource ep93xx_wdt_resources[] = {
824 DEFINE_RES_MEM(EP93XX_WATCHDOG_PHYS_BASE, 0x08),
825 };
826
827 static struct platform_device ep93xx_wdt_device = {
828 .name = "ep93xx-wdt",
829 .id = -1,
830 .num_resources = ARRAY_SIZE(ep93xx_wdt_resources),
831 .resource = ep93xx_wdt_resources,
832 };
833
834 /*************************************************************************
835 * EP93xx IDE
836 *************************************************************************/
837 static struct resource ep93xx_ide_resources[] = {
838 DEFINE_RES_MEM(EP93XX_IDE_PHYS_BASE, 0x38),
839 DEFINE_RES_IRQ(IRQ_EP93XX_EXT3),
840 };
841
842 static struct platform_device ep93xx_ide_device = {
843 .name = "ep93xx-ide",
844 .id = -1,
845 .dev = {
846 .dma_mask = &ep93xx_ide_device.dev.coherent_dma_mask,
847 .coherent_dma_mask = DMA_BIT_MASK(32),
848 },
849 .num_resources = ARRAY_SIZE(ep93xx_ide_resources),
850 .resource = ep93xx_ide_resources,
851 };
852
853 void __init ep93xx_register_ide(void)
854 {
855 platform_device_register(&ep93xx_ide_device);
856 }
857
858 int ep93xx_ide_acquire_gpio(struct platform_device *pdev)
859 {
860 int err;
861 int i;
862
863 err = gpio_request(EP93XX_GPIO_LINE_EGPIO2, dev_name(&pdev->dev));
864 if (err)
865 return err;
866 err = gpio_request(EP93XX_GPIO_LINE_EGPIO15, dev_name(&pdev->dev));
867 if (err)
868 goto fail_egpio15;
869 for (i = 2; i < 8; i++) {
870 err = gpio_request(EP93XX_GPIO_LINE_E(i), dev_name(&pdev->dev));
871 if (err)
872 goto fail_gpio_e;
873 }
874 for (i = 4; i < 8; i++) {
875 err = gpio_request(EP93XX_GPIO_LINE_G(i), dev_name(&pdev->dev));
876 if (err)
877 goto fail_gpio_g;
878 }
879 for (i = 0; i < 8; i++) {
880 err = gpio_request(EP93XX_GPIO_LINE_H(i), dev_name(&pdev->dev));
881 if (err)
882 goto fail_gpio_h;
883 }
884
885 /* GPIO ports E[7:2], G[7:4] and H used by IDE */
886 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_EONIDE |
887 EP93XX_SYSCON_DEVCFG_GONIDE |
888 EP93XX_SYSCON_DEVCFG_HONIDE);
889 return 0;
890
891 fail_gpio_h:
892 for (--i; i >= 0; --i)
893 gpio_free(EP93XX_GPIO_LINE_H(i));
894 i = 8;
895 fail_gpio_g:
896 for (--i; i >= 4; --i)
897 gpio_free(EP93XX_GPIO_LINE_G(i));
898 i = 8;
899 fail_gpio_e:
900 for (--i; i >= 2; --i)
901 gpio_free(EP93XX_GPIO_LINE_E(i));
902 gpio_free(EP93XX_GPIO_LINE_EGPIO15);
903 fail_egpio15:
904 gpio_free(EP93XX_GPIO_LINE_EGPIO2);
905 return err;
906 }
907 EXPORT_SYMBOL(ep93xx_ide_acquire_gpio);
908
909 void ep93xx_ide_release_gpio(struct platform_device *pdev)
910 {
911 int i;
912
913 for (i = 2; i < 8; i++)
914 gpio_free(EP93XX_GPIO_LINE_E(i));
915 for (i = 4; i < 8; i++)
916 gpio_free(EP93XX_GPIO_LINE_G(i));
917 for (i = 0; i < 8; i++)
918 gpio_free(EP93XX_GPIO_LINE_H(i));
919 gpio_free(EP93XX_GPIO_LINE_EGPIO15);
920 gpio_free(EP93XX_GPIO_LINE_EGPIO2);
921
922
923 /* GPIO ports E[7:2], G[7:4] and H used by GPIO */
924 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_EONIDE |
925 EP93XX_SYSCON_DEVCFG_GONIDE |
926 EP93XX_SYSCON_DEVCFG_HONIDE);
927 }
928 EXPORT_SYMBOL(ep93xx_ide_release_gpio);
929
930 /*************************************************************************
931 * EP93xx Security peripheral
932 *************************************************************************/
933
934 /*
935 * The Maverick Key is 256 bits of micro fuses blown at the factory during
936 * manufacturing to uniquely identify a part.
937 *
938 * See: http://arm.cirrus.com/forum/viewtopic.php?t=486&highlight=maverick+key
939 */
940 #define EP93XX_SECURITY_REG(x) (EP93XX_SECURITY_BASE + (x))
941 #define EP93XX_SECURITY_SECFLG EP93XX_SECURITY_REG(0x2400)
942 #define EP93XX_SECURITY_FUSEFLG EP93XX_SECURITY_REG(0x2410)
943 #define EP93XX_SECURITY_UNIQID EP93XX_SECURITY_REG(0x2440)
944 #define EP93XX_SECURITY_UNIQCHK EP93XX_SECURITY_REG(0x2450)
945 #define EP93XX_SECURITY_UNIQVAL EP93XX_SECURITY_REG(0x2460)
946 #define EP93XX_SECURITY_SECID1 EP93XX_SECURITY_REG(0x2500)
947 #define EP93XX_SECURITY_SECID2 EP93XX_SECURITY_REG(0x2504)
948 #define EP93XX_SECURITY_SECCHK1 EP93XX_SECURITY_REG(0x2520)
949 #define EP93XX_SECURITY_SECCHK2 EP93XX_SECURITY_REG(0x2524)
950 #define EP93XX_SECURITY_UNIQID2 EP93XX_SECURITY_REG(0x2700)
951 #define EP93XX_SECURITY_UNIQID3 EP93XX_SECURITY_REG(0x2704)
952 #define EP93XX_SECURITY_UNIQID4 EP93XX_SECURITY_REG(0x2708)
953 #define EP93XX_SECURITY_UNIQID5 EP93XX_SECURITY_REG(0x270c)
954
955 static char ep93xx_soc_id[33];
956
957 static const char __init *ep93xx_get_soc_id(void)
958 {
959 unsigned int id, id2, id3, id4, id5;
960
961 if (__raw_readl(EP93XX_SECURITY_UNIQVAL) != 1)
962 return "bad Hamming code";
963
964 id = __raw_readl(EP93XX_SECURITY_UNIQID);
965 id2 = __raw_readl(EP93XX_SECURITY_UNIQID2);
966 id3 = __raw_readl(EP93XX_SECURITY_UNIQID3);
967 id4 = __raw_readl(EP93XX_SECURITY_UNIQID4);
968 id5 = __raw_readl(EP93XX_SECURITY_UNIQID5);
969
970 if (id != id2)
971 return "invalid";
972
973 snprintf(ep93xx_soc_id, sizeof(ep93xx_soc_id),
974 "%08x%08x%08x%08x", id2, id3, id4, id5);
975
976 return ep93xx_soc_id;
977 }
978
979 static const char __init *ep93xx_get_soc_rev(void)
980 {
981 int rev = ep93xx_chip_revision();
982
983 switch (rev) {
984 case EP93XX_CHIP_REV_D0:
985 return "D0";
986 case EP93XX_CHIP_REV_D1:
987 return "D1";
988 case EP93XX_CHIP_REV_E0:
989 return "E0";
990 case EP93XX_CHIP_REV_E1:
991 return "E1";
992 case EP93XX_CHIP_REV_E2:
993 return "E2";
994 default:
995 return "unknown";
996 }
997 }
998
999 static const char __init *ep93xx_get_machine_name(void)
1000 {
1001 return kasprintf(GFP_KERNEL,"%s", machine_desc->name);
1002 }
1003
1004 static struct device __init *ep93xx_init_soc(void)
1005 {
1006 struct soc_device_attribute *soc_dev_attr;
1007 struct soc_device *soc_dev;
1008
1009 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
1010 if (!soc_dev_attr)
1011 return NULL;
1012
1013 soc_dev_attr->machine = ep93xx_get_machine_name();
1014 soc_dev_attr->family = "Cirrus Logic EP93xx";
1015 soc_dev_attr->revision = ep93xx_get_soc_rev();
1016 soc_dev_attr->soc_id = ep93xx_get_soc_id();
1017
1018 soc_dev = soc_device_register(soc_dev_attr);
1019 if (IS_ERR(soc_dev)) {
1020 kfree(soc_dev_attr->machine);
1021 kfree(soc_dev_attr);
1022 return NULL;
1023 }
1024
1025 return soc_device_to_device(soc_dev);
1026 }
1027
1028 struct device __init *ep93xx_init_devices(void)
1029 {
1030 struct device *parent;
1031
1032 /* Disallow access to MaverickCrunch initially */
1033 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
1034
1035 /* Default all ports to GPIO */
1036 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
1037 EP93XX_SYSCON_DEVCFG_GONK |
1038 EP93XX_SYSCON_DEVCFG_EONIDE |
1039 EP93XX_SYSCON_DEVCFG_GONIDE |
1040 EP93XX_SYSCON_DEVCFG_HONIDE);
1041
1042 parent = ep93xx_init_soc();
1043
1044 /* Get the GPIO working early, other devices need it */
1045 platform_device_register(&ep93xx_gpio_device);
1046
1047 amba_device_register(&uart1_device, &iomem_resource);
1048 amba_device_register(&uart2_device, &iomem_resource);
1049 amba_device_register(&uart3_device, &iomem_resource);
1050
1051 platform_device_register(&ep93xx_rtc_device);
1052 platform_device_register(&ep93xx_ohci_device);
1053 platform_device_register(&ep93xx_wdt_device);
1054
1055 gpio_led_register_device(-1, &ep93xx_led_data);
1056
1057 return parent;
1058 }
1059
1060 void ep93xx_restart(enum reboot_mode mode, const char *cmd)
1061 {
1062 /*
1063 * Set then clear the SWRST bit to initiate a software reset
1064 */
1065 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);
1066 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST);
1067
1068 while (1)
1069 ;
1070 }
1071
1072 void __init ep93xx_init_late(void)
1073 {
1074 crunch_init();
1075 }
Linux kernel - Deliverables
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