arch/arm/mach-exynos/cpuidle.c

   1 /* linux/arch/arm/mach-exynos/cpuidle.c
   2  *
   3  * Copyright (c) 2011 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9 */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/init.h>
  13 #include <linux/cpuidle.h>
  14 #include <linux/cpu_pm.h>
  15 #include <linux/io.h>
  16 #include <linux/export.h>
  17 #include <linux/module.h>
  18 #include <linux/time.h>
  19 #include <linux/platform_device.h>
  20
  21 #include <asm/proc-fns.h>
  22 #include <asm/suspend.h>
  23 #include <asm/unified.h>
  24 #include <asm/cpuidle.h>
  25
  26 #include <plat/cpu.h>
  27 #include <plat/pm.h>
  28
  29 #include <mach/map.h>
  30
  31 #include "common.h"
  32 #include "regs-pmu.h"
  33
  34 #define REG_DIRECTGO_ADDR       (samsung_rev() == EXYNOS4210_REV_1_1 ? \
  35                         S5P_INFORM7 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
  36                         (S5P_VA_SYSRAM + 0x24) : S5P_INFORM0))
  37 #define REG_DIRECTGO_FLAG       (samsung_rev() == EXYNOS4210_REV_1_1 ? \
  38                         S5P_INFORM6 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
  39                         (S5P_VA_SYSRAM + 0x20) : S5P_INFORM1))
  40
  41 #define S5P_CHECK_AFTR          0xFCBA0D10
  42
  43 /* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */
  44 static void exynos_set_wakeupmask(long mask)
  45 {
  46         __raw_writel(mask, S5P_WAKEUP_MASK);
  47 }
  48
  49 static void exynos_cpu_set_boot_vector(long flags)
  50 {
  51         __raw_writel(virt_to_phys(exynos_cpu_resume), REG_DIRECTGO_ADDR);
  52         __raw_writel(flags, REG_DIRECTGO_FLAG);
  53 }
  54
  55 static void exynos_enter_aftr(void)
  56 {
  57         exynos_set_wakeupmask(0x0000ff3e);
  58         exynos_cpu_set_boot_vector(S5P_CHECK_AFTR);
  59         /* Set value of power down register for aftr mode */
  60         exynos_sys_powerdown_conf(SYS_AFTR);
  61 }
  62
  63 static int idle_finisher(unsigned long flags)
  64 {
  65         exynos_enter_aftr();
  66         cpu_do_idle();
  67
  68         return 1;
  69 }
  70
  71 static int exynos_enter_core0_aftr(struct cpuidle_device *dev,
  72                                 struct cpuidle_driver *drv,
  73                                 int index)
  74 {
  75         unsigned long tmp;
  76
  77         /* Setting Central Sequence Register for power down mode */
  78         tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
  79         tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
  80         __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
  81
  82         cpu_pm_enter();
  83         cpu_suspend(0, idle_finisher);
  84         cpu_pm_exit();
  85
  86         /*
  87          * If PMU failed while entering sleep mode, WFI will be
  88          * ignored by PMU and then exiting cpu_do_idle().
  89          * S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically
  90          * in this situation.
  91          */
  92         tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
  93         if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) {
  94                 tmp |= S5P_CENTRAL_LOWPWR_CFG;
  95                 __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
  96                 /* Clear wakeup state register */
  97                 __raw_writel(0x0, S5P_WAKEUP_STAT);
  98         }
  99
 100         return index;
 101 }
 102
 103 static int exynos_enter_lowpower(struct cpuidle_device *dev,
 104                                 struct cpuidle_driver *drv,
 105                                 int index)
 106 {
 107         int new_index = index;
 108
 109         /* AFTR can only be entered when cores other than CPU0 are offline */
 110         if (num_online_cpus() > 1 || dev->cpu != 0)
 111                 new_index = drv->safe_state_index;
 112
 113         if (new_index == 0)
 114                 return arm_cpuidle_simple_enter(dev, drv, new_index);
 115         else
 116                 return exynos_enter_core0_aftr(dev, drv, new_index);
 117 }
 118
 119 static struct cpuidle_driver exynos_idle_driver = {
 120         .name                   = "exynos_idle",
 121         .owner                  = THIS_MODULE,
 122         .states = {
 123                 [0] = ARM_CPUIDLE_WFI_STATE,
 124                 [1] = {
 125                         .enter                  = exynos_enter_lowpower,
 126                         .exit_latency           = 300,
 127                         .target_residency       = 100000,
 128                         .flags                  = CPUIDLE_FLAG_TIME_VALID,
 129                         .name                   = "C1",
 130                         .desc                   = "ARM power down",
 131                 },
 132         },
 133         .state_count = 2,
 134         .safe_state_index = 0,
 135 };
 136
 137 static int exynos_cpuidle_probe(struct platform_device *pdev)
 138 {
 139         int ret;
 140
 141         ret = cpuidle_register(&exynos_idle_driver, NULL);
 142         if (ret) {
 143                 dev_err(&pdev->dev, "failed to register cpuidle driver\n");
 144                 return ret;
 145         }
 146
 147         return 0;
 148 }
 149
 150 static struct platform_driver exynos_cpuidle_driver = {
 151         .probe  = exynos_cpuidle_probe,
 152         .driver = {
 153                 .name = "exynos_cpuidle",
 154                 .owner = THIS_MODULE,
 155         },
 156 };
 157
 158 module_platform_driver(exynos_cpuidle_driver);