Merge branch 'next/cleanup-samsung' into next/cleanup-samsung-2
[deliverable/linux.git] / arch / arm / mach-exynos / mach-exynos5-dt.c
1 /*
2 * SAMSUNG EXYNOS5250 Flattened Device Tree enabled machine
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12 #include <linux/of_platform.h>
13 #include <linux/serial_core.h>
14
15 #include <asm/mach/arch.h>
16 #include <asm/hardware/gic.h>
17 #include <mach/map.h>
18
19 #include <plat/cpu.h>
20 #include <plat/regs-serial.h>
21
22 #include "common.h"
23
24 /*
25 * The following lookup table is used to override device names when devices
26 * are registered from device tree. This is temporarily added to enable
27 * device tree support addition for the EXYNOS5 architecture.
28 *
29 * For drivers that require platform data to be provided from the machine
30 * file, a platform data pointer can also be supplied along with the
31 * devices names. Usually, the platform data elements that cannot be parsed
32 * from the device tree by the drivers (example: function pointers) are
33 * supplied. But it should be noted that this is a temporary mechanism and
34 * at some point, the drivers should be capable of parsing all the platform
35 * data from the device tree.
36 */
37 static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
38 OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART0,
39 "exynos4210-uart.0", NULL),
40 OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART1,
41 "exynos4210-uart.1", NULL),
42 OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART2,
43 "exynos4210-uart.2", NULL),
44 OF_DEV_AUXDATA("samsung,exynos4210-uart", EXYNOS5_PA_UART3,
45 "exynos4210-uart.3", NULL),
46 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(0),
47 "s3c2440-i2c.0", NULL),
48 OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(1),
49 "s3c2440-i2c.1", NULL),
50 OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI0,
51 "dw_mmc.0", NULL),
52 OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI1,
53 "dw_mmc.1", NULL),
54 OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI2,
55 "dw_mmc.2", NULL),
56 OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI3,
57 "dw_mmc.3", NULL),
58 OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI0,
59 "exynos4210-spi.0", NULL),
60 OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI1,
61 "exynos4210-spi.1", NULL),
62 OF_DEV_AUXDATA("samsung,exynos4210-spi", EXYNOS5_PA_SPI2,
63 "exynos4210-spi.2", NULL),
64 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL),
65 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL),
66 OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_MDMA1, "dma-pl330.2", NULL),
67 OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC0,
68 "exynos-gsc.0", NULL),
69 OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC1,
70 "exynos-gsc.1", NULL),
71 OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC2,
72 "exynos-gsc.2", NULL),
73 OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC3,
74 "exynos-gsc.3", NULL),
75 {},
76 };
77
78 static void __init exynos5250_dt_map_io(void)
79 {
80 exynos_init_io(NULL, 0);
81 s3c24xx_init_clocks(24000000);
82 }
83
84 static void __init exynos5250_dt_machine_init(void)
85 {
86 of_platform_populate(NULL, of_default_bus_match_table,
87 exynos5250_auxdata_lookup, NULL);
88 }
89
90 static char const *exynos5250_dt_compat[] __initdata = {
91 "samsung,exynos5250",
92 NULL
93 };
94
95 DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
96 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
97 .init_irq = exynos5_init_irq,
98 .smp = smp_ops(exynos_smp_ops),
99 .map_io = exynos5250_dt_map_io,
100 .handle_irq = gic_handle_irq,
101 .init_machine = exynos5250_dt_machine_init,
102 .init_late = exynos_init_late,
103 .timer = &exynos4_timer,
104 .dt_compat = exynos5250_dt_compat,
105 .restart = exynos5_restart,
106 MACHINE_END
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