ARM: EXYNOS: Add HSOTG support to Origen
[deliverable/linux.git] / arch / arm / mach-exynos / mach-origen.c
1 /* linux/arch/arm/mach-exynos4/mach-origen.c
2 *
3 * Copyright (c) 2011 Insignal Co., Ltd.
4 * http://www.insignal.co.kr/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11 #include <linux/serial_core.h>
12 #include <linux/gpio.h>
13 #include <linux/mmc/host.h>
14 #include <linux/platform_device.h>
15 #include <linux/io.h>
16 #include <linux/input.h>
17 #include <linux/pwm_backlight.h>
18 #include <linux/gpio_keys.h>
19 #include <linux/i2c.h>
20 #include <linux/regulator/machine.h>
21 #include <linux/mfd/max8997.h>
22 #include <linux/lcd.h>
23 #include <linux/rfkill-gpio.h>
24 #include <linux/platform_data/s3c-hsotg.h>
25
26 #include <asm/mach/arch.h>
27 #include <asm/hardware/gic.h>
28 #include <asm/mach-types.h>
29
30 #include <video/platform_lcd.h>
31
32 #include <plat/regs-serial.h>
33 #include <plat/regs-fb-v4.h>
34 #include <plat/cpu.h>
35 #include <plat/devs.h>
36 #include <plat/sdhci.h>
37 #include <plat/iic.h>
38 #include <plat/ehci.h>
39 #include <plat/clock.h>
40 #include <plat/gpio-cfg.h>
41 #include <plat/backlight.h>
42 #include <plat/pd.h>
43 #include <plat/fb.h>
44 #include <plat/mfc.h>
45
46 #include <mach/ohci.h>
47 #include <mach/map.h>
48
49 #include <drm/exynos_drm.h>
50 #include "common.h"
51
52 /* Following are default values for UCON, ULCON and UFCON UART registers */
53 #define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
54 S3C2410_UCON_RXILEVEL | \
55 S3C2410_UCON_TXIRQMODE | \
56 S3C2410_UCON_RXIRQMODE | \
57 S3C2410_UCON_RXFIFO_TOI | \
58 S3C2443_UCON_RXERR_IRQEN)
59
60 #define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8
61
62 #define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
63 S5PV210_UFCON_TXTRIG4 | \
64 S5PV210_UFCON_RXTRIG4)
65
66 static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = {
67 [0] = {
68 .hwport = 0,
69 .flags = 0,
70 .ucon = ORIGEN_UCON_DEFAULT,
71 .ulcon = ORIGEN_ULCON_DEFAULT,
72 .ufcon = ORIGEN_UFCON_DEFAULT,
73 },
74 [1] = {
75 .hwport = 1,
76 .flags = 0,
77 .ucon = ORIGEN_UCON_DEFAULT,
78 .ulcon = ORIGEN_ULCON_DEFAULT,
79 .ufcon = ORIGEN_UFCON_DEFAULT,
80 },
81 [2] = {
82 .hwport = 2,
83 .flags = 0,
84 .ucon = ORIGEN_UCON_DEFAULT,
85 .ulcon = ORIGEN_ULCON_DEFAULT,
86 .ufcon = ORIGEN_UFCON_DEFAULT,
87 },
88 [3] = {
89 .hwport = 3,
90 .flags = 0,
91 .ucon = ORIGEN_UCON_DEFAULT,
92 .ulcon = ORIGEN_ULCON_DEFAULT,
93 .ufcon = ORIGEN_UFCON_DEFAULT,
94 },
95 };
96
97 static struct regulator_consumer_supply __initdata ldo3_consumer[] = {
98 REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), /* MIPI */
99 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), /* HDMI */
100 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), /* HDMI */
101 };
102 static struct regulator_consumer_supply __initdata ldo6_consumer[] = {
103 REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"), /* MIPI */
104 };
105 static struct regulator_consumer_supply __initdata ldo7_consumer[] = {
106 REGULATOR_SUPPLY("avdd", "alc5625"), /* Realtek ALC5625 */
107 };
108 static struct regulator_consumer_supply __initdata ldo8_consumer[] = {
109 REGULATOR_SUPPLY("vdd", "s5p-adc"), /* ADC */
110 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"), /* HDMI */
111 };
112 static struct regulator_consumer_supply __initdata ldo9_consumer[] = {
113 REGULATOR_SUPPLY("dvdd", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
114 };
115 static struct regulator_consumer_supply __initdata ldo11_consumer[] = {
116 REGULATOR_SUPPLY("dvdd", "alc5625"), /* Realtek ALC5625 */
117 };
118 static struct regulator_consumer_supply __initdata ldo14_consumer[] = {
119 REGULATOR_SUPPLY("avdd18", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
120 };
121 static struct regulator_consumer_supply __initdata ldo17_consumer[] = {
122 REGULATOR_SUPPLY("vdd33", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
123 };
124 static struct regulator_consumer_supply __initdata buck1_consumer[] = {
125 REGULATOR_SUPPLY("vdd_arm", NULL), /* CPUFREQ */
126 };
127 static struct regulator_consumer_supply __initdata buck2_consumer[] = {
128 REGULATOR_SUPPLY("vdd_int", NULL), /* CPUFREQ */
129 };
130 static struct regulator_consumer_supply __initdata buck3_consumer[] = {
131 REGULATOR_SUPPLY("vdd_g3d", "mali_drm"), /* G3D */
132 };
133 static struct regulator_consumer_supply __initdata buck7_consumer[] = {
134 REGULATOR_SUPPLY("vcc", "platform-lcd"), /* LCD */
135 };
136
137 static struct regulator_init_data __initdata max8997_ldo1_data = {
138 .constraints = {
139 .name = "VDD_ABB_3.3V",
140 .min_uV = 3300000,
141 .max_uV = 3300000,
142 .apply_uV = 1,
143 .state_mem = {
144 .disabled = 1,
145 },
146 },
147 };
148
149 static struct regulator_init_data __initdata max8997_ldo2_data = {
150 .constraints = {
151 .name = "VDD_ALIVE_1.1V",
152 .min_uV = 1100000,
153 .max_uV = 1100000,
154 .apply_uV = 1,
155 .always_on = 1,
156 .state_mem = {
157 .enabled = 1,
158 },
159 },
160 };
161
162 static struct regulator_init_data __initdata max8997_ldo3_data = {
163 .constraints = {
164 .name = "VMIPI_1.1V",
165 .min_uV = 1100000,
166 .max_uV = 1100000,
167 .apply_uV = 1,
168 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
169 .state_mem = {
170 .disabled = 1,
171 },
172 },
173 .num_consumer_supplies = ARRAY_SIZE(ldo3_consumer),
174 .consumer_supplies = ldo3_consumer,
175 };
176
177 static struct regulator_init_data __initdata max8997_ldo4_data = {
178 .constraints = {
179 .name = "VDD_RTC_1.8V",
180 .min_uV = 1800000,
181 .max_uV = 1800000,
182 .apply_uV = 1,
183 .always_on = 1,
184 .state_mem = {
185 .disabled = 1,
186 },
187 },
188 };
189
190 static struct regulator_init_data __initdata max8997_ldo6_data = {
191 .constraints = {
192 .name = "VMIPI_1.8V",
193 .min_uV = 1800000,
194 .max_uV = 1800000,
195 .apply_uV = 1,
196 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
197 .state_mem = {
198 .disabled = 1,
199 },
200 },
201 .num_consumer_supplies = ARRAY_SIZE(ldo6_consumer),
202 .consumer_supplies = ldo6_consumer,
203 };
204
205 static struct regulator_init_data __initdata max8997_ldo7_data = {
206 .constraints = {
207 .name = "VDD_AUD_1.8V",
208 .min_uV = 1800000,
209 .max_uV = 1800000,
210 .apply_uV = 1,
211 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
212 .state_mem = {
213 .disabled = 1,
214 },
215 },
216 .num_consumer_supplies = ARRAY_SIZE(ldo7_consumer),
217 .consumer_supplies = ldo7_consumer,
218 };
219
220 static struct regulator_init_data __initdata max8997_ldo8_data = {
221 .constraints = {
222 .name = "VADC_3.3V",
223 .min_uV = 3300000,
224 .max_uV = 3300000,
225 .apply_uV = 1,
226 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
227 .state_mem = {
228 .disabled = 1,
229 },
230 },
231 .num_consumer_supplies = ARRAY_SIZE(ldo8_consumer),
232 .consumer_supplies = ldo8_consumer,
233 };
234
235 static struct regulator_init_data __initdata max8997_ldo9_data = {
236 .constraints = {
237 .name = "DVDD_SWB_2.8V",
238 .min_uV = 2800000,
239 .max_uV = 2800000,
240 .apply_uV = 1,
241 .always_on = 1,
242 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
243 .state_mem = {
244 .disabled = 1,
245 },
246 },
247 .num_consumer_supplies = ARRAY_SIZE(ldo9_consumer),
248 .consumer_supplies = ldo9_consumer,
249 };
250
251 static struct regulator_init_data __initdata max8997_ldo10_data = {
252 .constraints = {
253 .name = "VDD_PLL_1.1V",
254 .min_uV = 1100000,
255 .max_uV = 1100000,
256 .apply_uV = 1,
257 .always_on = 1,
258 .state_mem = {
259 .disabled = 1,
260 },
261 },
262 };
263
264 static struct regulator_init_data __initdata max8997_ldo11_data = {
265 .constraints = {
266 .name = "VDD_AUD_3V",
267 .min_uV = 3000000,
268 .max_uV = 3000000,
269 .apply_uV = 1,
270 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
271 .state_mem = {
272 .disabled = 1,
273 },
274 },
275 .num_consumer_supplies = ARRAY_SIZE(ldo11_consumer),
276 .consumer_supplies = ldo11_consumer,
277 };
278
279 static struct regulator_init_data __initdata max8997_ldo14_data = {
280 .constraints = {
281 .name = "AVDD18_SWB_1.8V",
282 .min_uV = 1800000,
283 .max_uV = 1800000,
284 .apply_uV = 1,
285 .always_on = 1,
286 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
287 .state_mem = {
288 .disabled = 1,
289 },
290 },
291 .num_consumer_supplies = ARRAY_SIZE(ldo14_consumer),
292 .consumer_supplies = ldo14_consumer,
293 };
294
295 static struct regulator_init_data __initdata max8997_ldo17_data = {
296 .constraints = {
297 .name = "VDD_SWB_3.3V",
298 .min_uV = 3300000,
299 .max_uV = 3300000,
300 .apply_uV = 1,
301 .always_on = 1,
302 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
303 .state_mem = {
304 .disabled = 1,
305 },
306 },
307 .num_consumer_supplies = ARRAY_SIZE(ldo17_consumer),
308 .consumer_supplies = ldo17_consumer,
309 };
310
311 static struct regulator_init_data __initdata max8997_ldo21_data = {
312 .constraints = {
313 .name = "VDD_MIF_1.2V",
314 .min_uV = 1200000,
315 .max_uV = 1200000,
316 .apply_uV = 1,
317 .always_on = 1,
318 .state_mem = {
319 .disabled = 1,
320 },
321 },
322 };
323
324 static struct regulator_init_data __initdata max8997_buck1_data = {
325 .constraints = {
326 .name = "VDD_ARM_1.2V",
327 .min_uV = 950000,
328 .max_uV = 1350000,
329 .always_on = 1,
330 .boot_on = 1,
331 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
332 .state_mem = {
333 .disabled = 1,
334 },
335 },
336 .num_consumer_supplies = ARRAY_SIZE(buck1_consumer),
337 .consumer_supplies = buck1_consumer,
338 };
339
340 static struct regulator_init_data __initdata max8997_buck2_data = {
341 .constraints = {
342 .name = "VDD_INT_1.1V",
343 .min_uV = 900000,
344 .max_uV = 1100000,
345 .always_on = 1,
346 .boot_on = 1,
347 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
348 .state_mem = {
349 .disabled = 1,
350 },
351 },
352 .num_consumer_supplies = ARRAY_SIZE(buck2_consumer),
353 .consumer_supplies = buck2_consumer,
354 };
355
356 static struct regulator_init_data __initdata max8997_buck3_data = {
357 .constraints = {
358 .name = "VDD_G3D_1.1V",
359 .min_uV = 900000,
360 .max_uV = 1100000,
361 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
362 REGULATOR_CHANGE_STATUS,
363 .state_mem = {
364 .disabled = 1,
365 },
366 },
367 .num_consumer_supplies = ARRAY_SIZE(buck3_consumer),
368 .consumer_supplies = buck3_consumer,
369 };
370
371 static struct regulator_init_data __initdata max8997_buck5_data = {
372 .constraints = {
373 .name = "VDDQ_M1M2_1.2V",
374 .min_uV = 1200000,
375 .max_uV = 1200000,
376 .apply_uV = 1,
377 .always_on = 1,
378 .state_mem = {
379 .disabled = 1,
380 },
381 },
382 };
383
384 static struct regulator_init_data __initdata max8997_buck7_data = {
385 .constraints = {
386 .name = "VDD_LCD_3.3V",
387 .min_uV = 3300000,
388 .max_uV = 3300000,
389 .boot_on = 1,
390 .apply_uV = 1,
391 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
392 .state_mem = {
393 .disabled = 1
394 },
395 },
396 .num_consumer_supplies = ARRAY_SIZE(buck7_consumer),
397 .consumer_supplies = buck7_consumer,
398 };
399
400 static struct max8997_regulator_data __initdata origen_max8997_regulators[] = {
401 { MAX8997_LDO1, &max8997_ldo1_data },
402 { MAX8997_LDO2, &max8997_ldo2_data },
403 { MAX8997_LDO3, &max8997_ldo3_data },
404 { MAX8997_LDO4, &max8997_ldo4_data },
405 { MAX8997_LDO6, &max8997_ldo6_data },
406 { MAX8997_LDO7, &max8997_ldo7_data },
407 { MAX8997_LDO8, &max8997_ldo8_data },
408 { MAX8997_LDO9, &max8997_ldo9_data },
409 { MAX8997_LDO10, &max8997_ldo10_data },
410 { MAX8997_LDO11, &max8997_ldo11_data },
411 { MAX8997_LDO14, &max8997_ldo14_data },
412 { MAX8997_LDO17, &max8997_ldo17_data },
413 { MAX8997_LDO21, &max8997_ldo21_data },
414 { MAX8997_BUCK1, &max8997_buck1_data },
415 { MAX8997_BUCK2, &max8997_buck2_data },
416 { MAX8997_BUCK3, &max8997_buck3_data },
417 { MAX8997_BUCK5, &max8997_buck5_data },
418 { MAX8997_BUCK7, &max8997_buck7_data },
419 };
420
421 static struct max8997_platform_data __initdata origen_max8997_pdata = {
422 .num_regulators = ARRAY_SIZE(origen_max8997_regulators),
423 .regulators = origen_max8997_regulators,
424
425 .wakeup = true,
426 .buck1_gpiodvs = false,
427 .buck2_gpiodvs = false,
428 .buck5_gpiodvs = false,
429 .irq_base = IRQ_GPIO_END + 1,
430
431 .ignore_gpiodvs_side_effect = true,
432 .buck125_default_idx = 0x0,
433
434 .buck125_gpios[0] = EXYNOS4_GPX0(0),
435 .buck125_gpios[1] = EXYNOS4_GPX0(1),
436 .buck125_gpios[2] = EXYNOS4_GPX0(2),
437
438 .buck1_voltage[0] = 1350000,
439 .buck1_voltage[1] = 1300000,
440 .buck1_voltage[2] = 1250000,
441 .buck1_voltage[3] = 1200000,
442 .buck1_voltage[4] = 1150000,
443 .buck1_voltage[5] = 1100000,
444 .buck1_voltage[6] = 1000000,
445 .buck1_voltage[7] = 950000,
446
447 .buck2_voltage[0] = 1100000,
448 .buck2_voltage[1] = 1100000,
449 .buck2_voltage[2] = 1100000,
450 .buck2_voltage[3] = 1100000,
451 .buck2_voltage[4] = 1000000,
452 .buck2_voltage[5] = 1000000,
453 .buck2_voltage[6] = 1000000,
454 .buck2_voltage[7] = 1000000,
455
456 .buck5_voltage[0] = 1200000,
457 .buck5_voltage[1] = 1200000,
458 .buck5_voltage[2] = 1200000,
459 .buck5_voltage[3] = 1200000,
460 .buck5_voltage[4] = 1200000,
461 .buck5_voltage[5] = 1200000,
462 .buck5_voltage[6] = 1200000,
463 .buck5_voltage[7] = 1200000,
464 };
465
466 /* I2C0 */
467 static struct i2c_board_info i2c0_devs[] __initdata = {
468 {
469 I2C_BOARD_INFO("max8997", (0xCC >> 1)),
470 .platform_data = &origen_max8997_pdata,
471 .irq = IRQ_EINT(4),
472 },
473 };
474
475 static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata = {
476 .cd_type = S3C_SDHCI_CD_INTERNAL,
477 };
478
479 static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = {
480 .cd_type = S3C_SDHCI_CD_INTERNAL,
481 };
482
483 /* USB EHCI */
484 static struct s5p_ehci_platdata origen_ehci_pdata;
485
486 static void __init origen_ehci_init(void)
487 {
488 struct s5p_ehci_platdata *pdata = &origen_ehci_pdata;
489
490 s5p_ehci_set_platdata(pdata);
491 }
492
493 /* USB OHCI */
494 static struct exynos4_ohci_platdata origen_ohci_pdata;
495
496 static void __init origen_ohci_init(void)
497 {
498 struct exynos4_ohci_platdata *pdata = &origen_ohci_pdata;
499
500 exynos4_ohci_set_platdata(pdata);
501 }
502
503 /* USB OTG */
504 static struct s3c_hsotg_plat origen_hsotg_pdata;
505
506 static struct gpio_keys_button origen_gpio_keys_table[] = {
507 {
508 .code = KEY_MENU,
509 .gpio = EXYNOS4_GPX1(5),
510 .desc = "gpio-keys: KEY_MENU",
511 .type = EV_KEY,
512 .active_low = 1,
513 .wakeup = 1,
514 .debounce_interval = 1,
515 }, {
516 .code = KEY_HOME,
517 .gpio = EXYNOS4_GPX1(6),
518 .desc = "gpio-keys: KEY_HOME",
519 .type = EV_KEY,
520 .active_low = 1,
521 .wakeup = 1,
522 .debounce_interval = 1,
523 }, {
524 .code = KEY_BACK,
525 .gpio = EXYNOS4_GPX1(7),
526 .desc = "gpio-keys: KEY_BACK",
527 .type = EV_KEY,
528 .active_low = 1,
529 .wakeup = 1,
530 .debounce_interval = 1,
531 }, {
532 .code = KEY_UP,
533 .gpio = EXYNOS4_GPX2(0),
534 .desc = "gpio-keys: KEY_UP",
535 .type = EV_KEY,
536 .active_low = 1,
537 .wakeup = 1,
538 .debounce_interval = 1,
539 }, {
540 .code = KEY_DOWN,
541 .gpio = EXYNOS4_GPX2(1),
542 .desc = "gpio-keys: KEY_DOWN",
543 .type = EV_KEY,
544 .active_low = 1,
545 .wakeup = 1,
546 .debounce_interval = 1,
547 },
548 };
549
550 static struct gpio_keys_platform_data origen_gpio_keys_data = {
551 .buttons = origen_gpio_keys_table,
552 .nbuttons = ARRAY_SIZE(origen_gpio_keys_table),
553 };
554
555 static struct platform_device origen_device_gpiokeys = {
556 .name = "gpio-keys",
557 .dev = {
558 .platform_data = &origen_gpio_keys_data,
559 },
560 };
561
562 static void lcd_hv070wsa_set_power(struct plat_lcd_data *pd, unsigned int power)
563 {
564 int ret;
565
566 if (power)
567 ret = gpio_request_one(EXYNOS4_GPE3(4),
568 GPIOF_OUT_INIT_HIGH, "GPE3_4");
569 else
570 ret = gpio_request_one(EXYNOS4_GPE3(4),
571 GPIOF_OUT_INIT_LOW, "GPE3_4");
572
573 gpio_free(EXYNOS4_GPE3(4));
574
575 if (ret)
576 pr_err("failed to request gpio for LCD power: %d\n", ret);
577 }
578
579 static struct plat_lcd_data origen_lcd_hv070wsa_data = {
580 .set_power = lcd_hv070wsa_set_power,
581 };
582
583 static struct platform_device origen_lcd_hv070wsa = {
584 .name = "platform-lcd",
585 .dev.parent = &s5p_device_fimd0.dev,
586 .dev.platform_data = &origen_lcd_hv070wsa_data,
587 };
588
589 #ifdef CONFIG_DRM_EXYNOS
590 static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
591 .panel = {
592 .timing = {
593 .left_margin = 64,
594 .right_margin = 16,
595 .upper_margin = 64,
596 .lower_margin = 16,
597 .hsync_len = 48,
598 .vsync_len = 3,
599 .xres = 1024,
600 .yres = 600,
601 },
602 },
603 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
604 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
605 VIDCON1_INV_VCLK,
606 .default_win = 0,
607 .bpp = 32,
608 };
609 #else
610 static struct s3c_fb_pd_win origen_fb_win0 = {
611 .xres = 1024,
612 .yres = 600,
613 .max_bpp = 32,
614 .default_bpp = 24,
615 .virtual_x = 1024,
616 .virtual_y = 2 * 600,
617 };
618
619 static struct fb_videomode origen_lcd_timing = {
620 .left_margin = 64,
621 .right_margin = 16,
622 .upper_margin = 64,
623 .lower_margin = 16,
624 .hsync_len = 48,
625 .vsync_len = 3,
626 .xres = 1024,
627 .yres = 600,
628 };
629
630 static struct s3c_fb_platdata origen_lcd_pdata __initdata = {
631 .win[0] = &origen_fb_win0,
632 .vtiming = &origen_lcd_timing,
633 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
634 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
635 VIDCON1_INV_VCLK,
636 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
637 };
638 #endif
639
640 /* Bluetooth rfkill gpio platform data */
641 static struct rfkill_gpio_platform_data origen_bt_pdata = {
642 .reset_gpio = EXYNOS4_GPX2(2),
643 .shutdown_gpio = -1,
644 .type = RFKILL_TYPE_BLUETOOTH,
645 .name = "origen-bt",
646 };
647
648 /* Bluetooth Platform device */
649 static struct platform_device origen_device_bluetooth = {
650 .name = "rfkill_gpio",
651 .id = -1,
652 .dev = {
653 .platform_data = &origen_bt_pdata,
654 },
655 };
656
657 static struct platform_device *origen_devices[] __initdata = {
658 &s3c_device_hsmmc2,
659 &s3c_device_hsmmc0,
660 &s3c_device_i2c0,
661 &s3c_device_rtc,
662 &s3c_device_usb_hsotg,
663 &s3c_device_wdt,
664 &s5p_device_ehci,
665 &s5p_device_fimc0,
666 &s5p_device_fimc1,
667 &s5p_device_fimc2,
668 &s5p_device_fimc3,
669 &s5p_device_fimc_md,
670 &s5p_device_fimd0,
671 &s5p_device_g2d,
672 &s5p_device_hdmi,
673 &s5p_device_i2c_hdmiphy,
674 &s5p_device_jpeg,
675 &s5p_device_mfc,
676 &s5p_device_mfc_l,
677 &s5p_device_mfc_r,
678 &s5p_device_mixer,
679 #ifdef CONFIG_DRM_EXYNOS
680 &exynos_device_drm,
681 #endif
682 &exynos4_device_ohci,
683 &origen_device_gpiokeys,
684 &origen_lcd_hv070wsa,
685 &origen_device_bluetooth,
686 };
687
688 /* LCD Backlight data */
689 static struct samsung_bl_gpio_info origen_bl_gpio_info = {
690 .no = EXYNOS4_GPD0(0),
691 .func = S3C_GPIO_SFN(2),
692 };
693
694 static struct platform_pwm_backlight_data origen_bl_data = {
695 .pwm_id = 0,
696 .pwm_period_ns = 1000,
697 };
698
699 static void __init origen_bt_setup(void)
700 {
701 gpio_request(EXYNOS4_GPA0(0), "GPIO BT_UART");
702 /* 4 UART Pins configuration */
703 s3c_gpio_cfgrange_nopull(EXYNOS4_GPA0(0), 4, S3C_GPIO_SFN(2));
704 /* Setup BT Reset, this gpio will be requesed by rfkill-gpio */
705 s3c_gpio_cfgpin(EXYNOS4_GPX2(2), S3C_GPIO_OUTPUT);
706 s3c_gpio_setpull(EXYNOS4_GPX2(2), S3C_GPIO_PULL_NONE);
707 }
708
709 static void s5p_tv_setup(void)
710 {
711 /* Direct HPD to HDMI chip */
712 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
713 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
714 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
715 }
716
717 static void __init origen_map_io(void)
718 {
719 exynos_init_io(NULL, 0);
720 s3c24xx_init_clocks(24000000);
721 s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs));
722 }
723
724 static void __init origen_power_init(void)
725 {
726 gpio_request(EXYNOS4_GPX0(4), "PMIC_IRQ");
727 s3c_gpio_cfgpin(EXYNOS4_GPX0(4), S3C_GPIO_SFN(0xf));
728 s3c_gpio_setpull(EXYNOS4_GPX0(4), S3C_GPIO_PULL_NONE);
729 }
730
731 static void __init origen_reserve(void)
732 {
733 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
734 }
735
736 static void __init origen_machine_init(void)
737 {
738 origen_power_init();
739
740 s3c_i2c0_set_platdata(NULL);
741 i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs));
742
743 /*
744 * Since sdhci instance 2 can contain a bootable media,
745 * sdhci instance 0 is registered after instance 2.
746 */
747 s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata);
748 s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata);
749
750 origen_ehci_init();
751 origen_ohci_init();
752 s3c_hsotg_set_platdata(&origen_hsotg_pdata);
753 clk_xusbxti.rate = 24000000;
754
755 s5p_tv_setup();
756 s5p_i2c_hdmiphy_set_platdata(NULL);
757
758 #ifdef CONFIG_DRM_EXYNOS
759 s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
760 exynos4_fimd0_gpio_setup_24bpp();
761 #else
762 s5p_fimd0_set_platdata(&origen_lcd_pdata);
763 #endif
764
765 platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices));
766
767 samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data);
768
769 origen_bt_setup();
770 }
771
772 MACHINE_START(ORIGEN, "ORIGEN")
773 /* Maintainer: JeongHyeon Kim <jhkim@insignal.co.kr> */
774 .atag_offset = 0x100,
775 .init_irq = exynos4_init_irq,
776 .map_io = origen_map_io,
777 .handle_irq = gic_handle_irq,
778 .init_machine = origen_machine_init,
779 .init_late = exynos_init_late,
780 .timer = &exynos4_timer,
781 .reserve = &origen_reserve,
782 .restart = exynos4_restart,
783 MACHINE_END
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