1 /* linux/arch/arm/mach-exynos4/mach-origen.c
3 * Copyright (c) 2011 Insignal Co., Ltd.
4 * http://www.insignal.co.kr/
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/serial_core.h>
12 #include <linux/gpio.h>
13 #include <linux/mmc/host.h>
14 #include <linux/platform_device.h>
16 #include <linux/input.h>
17 #include <linux/pwm_backlight.h>
18 #include <linux/gpio_keys.h>
19 #include <linux/i2c.h>
20 #include <linux/regulator/machine.h>
21 #include <linux/mfd/max8997.h>
22 #include <linux/lcd.h>
23 #include <linux/rfkill-gpio.h>
24 #include <linux/platform_data/s3c-hsotg.h>
26 #include <asm/mach/arch.h>
27 #include <asm/hardware/gic.h>
28 #include <asm/mach-types.h>
30 #include <video/platform_lcd.h>
32 #include <plat/regs-serial.h>
33 #include <plat/regs-fb-v4.h>
35 #include <plat/devs.h>
36 #include <plat/sdhci.h>
38 #include <plat/ehci.h>
39 #include <plat/clock.h>
40 #include <plat/gpio-cfg.h>
41 #include <plat/backlight.h>
46 #include <mach/ohci.h>
49 #include <drm/exynos_drm.h>
52 /* Following are default values for UCON, ULCON and UFCON UART registers */
53 #define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
54 S3C2410_UCON_RXILEVEL | \
55 S3C2410_UCON_TXIRQMODE | \
56 S3C2410_UCON_RXIRQMODE | \
57 S3C2410_UCON_RXFIFO_TOI | \
58 S3C2443_UCON_RXERR_IRQEN)
60 #define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8
62 #define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
63 S5PV210_UFCON_TXTRIG4 | \
64 S5PV210_UFCON_RXTRIG4)
66 static struct s3c2410_uartcfg origen_uartcfgs
[] __initdata
= {
70 .ucon
= ORIGEN_UCON_DEFAULT
,
71 .ulcon
= ORIGEN_ULCON_DEFAULT
,
72 .ufcon
= ORIGEN_UFCON_DEFAULT
,
77 .ucon
= ORIGEN_UCON_DEFAULT
,
78 .ulcon
= ORIGEN_ULCON_DEFAULT
,
79 .ufcon
= ORIGEN_UFCON_DEFAULT
,
84 .ucon
= ORIGEN_UCON_DEFAULT
,
85 .ulcon
= ORIGEN_ULCON_DEFAULT
,
86 .ufcon
= ORIGEN_UFCON_DEFAULT
,
91 .ucon
= ORIGEN_UCON_DEFAULT
,
92 .ulcon
= ORIGEN_ULCON_DEFAULT
,
93 .ufcon
= ORIGEN_UFCON_DEFAULT
,
97 static struct regulator_consumer_supply __initdata ldo3_consumer
[] = {
98 REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), /* MIPI */
99 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), /* HDMI */
100 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), /* HDMI */
102 static struct regulator_consumer_supply __initdata ldo6_consumer
[] = {
103 REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"), /* MIPI */
105 static struct regulator_consumer_supply __initdata ldo7_consumer
[] = {
106 REGULATOR_SUPPLY("avdd", "alc5625"), /* Realtek ALC5625 */
108 static struct regulator_consumer_supply __initdata ldo8_consumer
[] = {
109 REGULATOR_SUPPLY("vdd", "s5p-adc"), /* ADC */
110 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"), /* HDMI */
112 static struct regulator_consumer_supply __initdata ldo9_consumer
[] = {
113 REGULATOR_SUPPLY("dvdd", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
115 static struct regulator_consumer_supply __initdata ldo11_consumer
[] = {
116 REGULATOR_SUPPLY("dvdd", "alc5625"), /* Realtek ALC5625 */
118 static struct regulator_consumer_supply __initdata ldo14_consumer
[] = {
119 REGULATOR_SUPPLY("avdd18", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
121 static struct regulator_consumer_supply __initdata ldo17_consumer
[] = {
122 REGULATOR_SUPPLY("vdd33", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
124 static struct regulator_consumer_supply __initdata buck1_consumer
[] = {
125 REGULATOR_SUPPLY("vdd_arm", NULL
), /* CPUFREQ */
127 static struct regulator_consumer_supply __initdata buck2_consumer
[] = {
128 REGULATOR_SUPPLY("vdd_int", NULL
), /* CPUFREQ */
130 static struct regulator_consumer_supply __initdata buck3_consumer
[] = {
131 REGULATOR_SUPPLY("vdd_g3d", "mali_drm"), /* G3D */
133 static struct regulator_consumer_supply __initdata buck7_consumer
[] = {
134 REGULATOR_SUPPLY("vcc", "platform-lcd"), /* LCD */
137 static struct regulator_init_data __initdata max8997_ldo1_data
= {
139 .name
= "VDD_ABB_3.3V",
149 static struct regulator_init_data __initdata max8997_ldo2_data
= {
151 .name
= "VDD_ALIVE_1.1V",
162 static struct regulator_init_data __initdata max8997_ldo3_data
= {
164 .name
= "VMIPI_1.1V",
168 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
173 .num_consumer_supplies
= ARRAY_SIZE(ldo3_consumer
),
174 .consumer_supplies
= ldo3_consumer
,
177 static struct regulator_init_data __initdata max8997_ldo4_data
= {
179 .name
= "VDD_RTC_1.8V",
190 static struct regulator_init_data __initdata max8997_ldo6_data
= {
192 .name
= "VMIPI_1.8V",
196 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
201 .num_consumer_supplies
= ARRAY_SIZE(ldo6_consumer
),
202 .consumer_supplies
= ldo6_consumer
,
205 static struct regulator_init_data __initdata max8997_ldo7_data
= {
207 .name
= "VDD_AUD_1.8V",
211 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
216 .num_consumer_supplies
= ARRAY_SIZE(ldo7_consumer
),
217 .consumer_supplies
= ldo7_consumer
,
220 static struct regulator_init_data __initdata max8997_ldo8_data
= {
226 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
231 .num_consumer_supplies
= ARRAY_SIZE(ldo8_consumer
),
232 .consumer_supplies
= ldo8_consumer
,
235 static struct regulator_init_data __initdata max8997_ldo9_data
= {
237 .name
= "DVDD_SWB_2.8V",
242 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
247 .num_consumer_supplies
= ARRAY_SIZE(ldo9_consumer
),
248 .consumer_supplies
= ldo9_consumer
,
251 static struct regulator_init_data __initdata max8997_ldo10_data
= {
253 .name
= "VDD_PLL_1.1V",
264 static struct regulator_init_data __initdata max8997_ldo11_data
= {
266 .name
= "VDD_AUD_3V",
270 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
275 .num_consumer_supplies
= ARRAY_SIZE(ldo11_consumer
),
276 .consumer_supplies
= ldo11_consumer
,
279 static struct regulator_init_data __initdata max8997_ldo14_data
= {
281 .name
= "AVDD18_SWB_1.8V",
286 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
291 .num_consumer_supplies
= ARRAY_SIZE(ldo14_consumer
),
292 .consumer_supplies
= ldo14_consumer
,
295 static struct regulator_init_data __initdata max8997_ldo17_data
= {
297 .name
= "VDD_SWB_3.3V",
302 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
307 .num_consumer_supplies
= ARRAY_SIZE(ldo17_consumer
),
308 .consumer_supplies
= ldo17_consumer
,
311 static struct regulator_init_data __initdata max8997_ldo21_data
= {
313 .name
= "VDD_MIF_1.2V",
324 static struct regulator_init_data __initdata max8997_buck1_data
= {
326 .name
= "VDD_ARM_1.2V",
331 .valid_ops_mask
= REGULATOR_CHANGE_VOLTAGE
,
336 .num_consumer_supplies
= ARRAY_SIZE(buck1_consumer
),
337 .consumer_supplies
= buck1_consumer
,
340 static struct regulator_init_data __initdata max8997_buck2_data
= {
342 .name
= "VDD_INT_1.1V",
347 .valid_ops_mask
= REGULATOR_CHANGE_VOLTAGE
,
352 .num_consumer_supplies
= ARRAY_SIZE(buck2_consumer
),
353 .consumer_supplies
= buck2_consumer
,
356 static struct regulator_init_data __initdata max8997_buck3_data
= {
358 .name
= "VDD_G3D_1.1V",
361 .valid_ops_mask
= REGULATOR_CHANGE_VOLTAGE
|
362 REGULATOR_CHANGE_STATUS
,
367 .num_consumer_supplies
= ARRAY_SIZE(buck3_consumer
),
368 .consumer_supplies
= buck3_consumer
,
371 static struct regulator_init_data __initdata max8997_buck5_data
= {
373 .name
= "VDDQ_M1M2_1.2V",
384 static struct regulator_init_data __initdata max8997_buck7_data
= {
386 .name
= "VDD_LCD_3.3V",
391 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
396 .num_consumer_supplies
= ARRAY_SIZE(buck7_consumer
),
397 .consumer_supplies
= buck7_consumer
,
400 static struct max8997_regulator_data __initdata origen_max8997_regulators
[] = {
401 { MAX8997_LDO1
, &max8997_ldo1_data
},
402 { MAX8997_LDO2
, &max8997_ldo2_data
},
403 { MAX8997_LDO3
, &max8997_ldo3_data
},
404 { MAX8997_LDO4
, &max8997_ldo4_data
},
405 { MAX8997_LDO6
, &max8997_ldo6_data
},
406 { MAX8997_LDO7
, &max8997_ldo7_data
},
407 { MAX8997_LDO8
, &max8997_ldo8_data
},
408 { MAX8997_LDO9
, &max8997_ldo9_data
},
409 { MAX8997_LDO10
, &max8997_ldo10_data
},
410 { MAX8997_LDO11
, &max8997_ldo11_data
},
411 { MAX8997_LDO14
, &max8997_ldo14_data
},
412 { MAX8997_LDO17
, &max8997_ldo17_data
},
413 { MAX8997_LDO21
, &max8997_ldo21_data
},
414 { MAX8997_BUCK1
, &max8997_buck1_data
},
415 { MAX8997_BUCK2
, &max8997_buck2_data
},
416 { MAX8997_BUCK3
, &max8997_buck3_data
},
417 { MAX8997_BUCK5
, &max8997_buck5_data
},
418 { MAX8997_BUCK7
, &max8997_buck7_data
},
421 static struct max8997_platform_data __initdata origen_max8997_pdata
= {
422 .num_regulators
= ARRAY_SIZE(origen_max8997_regulators
),
423 .regulators
= origen_max8997_regulators
,
426 .buck1_gpiodvs
= false,
427 .buck2_gpiodvs
= false,
428 .buck5_gpiodvs
= false,
429 .irq_base
= IRQ_GPIO_END
+ 1,
431 .ignore_gpiodvs_side_effect
= true,
432 .buck125_default_idx
= 0x0,
434 .buck125_gpios
[0] = EXYNOS4_GPX0(0),
435 .buck125_gpios
[1] = EXYNOS4_GPX0(1),
436 .buck125_gpios
[2] = EXYNOS4_GPX0(2),
438 .buck1_voltage
[0] = 1350000,
439 .buck1_voltage
[1] = 1300000,
440 .buck1_voltage
[2] = 1250000,
441 .buck1_voltage
[3] = 1200000,
442 .buck1_voltage
[4] = 1150000,
443 .buck1_voltage
[5] = 1100000,
444 .buck1_voltage
[6] = 1000000,
445 .buck1_voltage
[7] = 950000,
447 .buck2_voltage
[0] = 1100000,
448 .buck2_voltage
[1] = 1100000,
449 .buck2_voltage
[2] = 1100000,
450 .buck2_voltage
[3] = 1100000,
451 .buck2_voltage
[4] = 1000000,
452 .buck2_voltage
[5] = 1000000,
453 .buck2_voltage
[6] = 1000000,
454 .buck2_voltage
[7] = 1000000,
456 .buck5_voltage
[0] = 1200000,
457 .buck5_voltage
[1] = 1200000,
458 .buck5_voltage
[2] = 1200000,
459 .buck5_voltage
[3] = 1200000,
460 .buck5_voltage
[4] = 1200000,
461 .buck5_voltage
[5] = 1200000,
462 .buck5_voltage
[6] = 1200000,
463 .buck5_voltage
[7] = 1200000,
467 static struct i2c_board_info i2c0_devs
[] __initdata
= {
469 I2C_BOARD_INFO("max8997", (0xCC >> 1)),
470 .platform_data
= &origen_max8997_pdata
,
475 static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata
= {
476 .cd_type
= S3C_SDHCI_CD_INTERNAL
,
479 static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata
= {
480 .cd_type
= S3C_SDHCI_CD_INTERNAL
,
484 static struct s5p_ehci_platdata origen_ehci_pdata
;
486 static void __init
origen_ehci_init(void)
488 struct s5p_ehci_platdata
*pdata
= &origen_ehci_pdata
;
490 s5p_ehci_set_platdata(pdata
);
494 static struct exynos4_ohci_platdata origen_ohci_pdata
;
496 static void __init
origen_ohci_init(void)
498 struct exynos4_ohci_platdata
*pdata
= &origen_ohci_pdata
;
500 exynos4_ohci_set_platdata(pdata
);
504 static struct s3c_hsotg_plat origen_hsotg_pdata
;
506 static struct gpio_keys_button origen_gpio_keys_table
[] = {
509 .gpio
= EXYNOS4_GPX1(5),
510 .desc
= "gpio-keys: KEY_MENU",
514 .debounce_interval
= 1,
517 .gpio
= EXYNOS4_GPX1(6),
518 .desc
= "gpio-keys: KEY_HOME",
522 .debounce_interval
= 1,
525 .gpio
= EXYNOS4_GPX1(7),
526 .desc
= "gpio-keys: KEY_BACK",
530 .debounce_interval
= 1,
533 .gpio
= EXYNOS4_GPX2(0),
534 .desc
= "gpio-keys: KEY_UP",
538 .debounce_interval
= 1,
541 .gpio
= EXYNOS4_GPX2(1),
542 .desc
= "gpio-keys: KEY_DOWN",
546 .debounce_interval
= 1,
550 static struct gpio_keys_platform_data origen_gpio_keys_data
= {
551 .buttons
= origen_gpio_keys_table
,
552 .nbuttons
= ARRAY_SIZE(origen_gpio_keys_table
),
555 static struct platform_device origen_device_gpiokeys
= {
558 .platform_data
= &origen_gpio_keys_data
,
562 static void lcd_hv070wsa_set_power(struct plat_lcd_data
*pd
, unsigned int power
)
567 ret
= gpio_request_one(EXYNOS4_GPE3(4),
568 GPIOF_OUT_INIT_HIGH
, "GPE3_4");
570 ret
= gpio_request_one(EXYNOS4_GPE3(4),
571 GPIOF_OUT_INIT_LOW
, "GPE3_4");
573 gpio_free(EXYNOS4_GPE3(4));
576 pr_err("failed to request gpio for LCD power: %d\n", ret
);
579 static struct plat_lcd_data origen_lcd_hv070wsa_data
= {
580 .set_power
= lcd_hv070wsa_set_power
,
583 static struct platform_device origen_lcd_hv070wsa
= {
584 .name
= "platform-lcd",
585 .dev
.parent
= &s5p_device_fimd0
.dev
,
586 .dev
.platform_data
= &origen_lcd_hv070wsa_data
,
589 #ifdef CONFIG_DRM_EXYNOS
590 static struct exynos_drm_fimd_pdata drm_fimd_pdata
= {
603 .vidcon0
= VIDCON0_VIDOUT_RGB
| VIDCON0_PNRMODE_RGB
,
604 .vidcon1
= VIDCON1_INV_HSYNC
| VIDCON1_INV_VSYNC
|
610 static struct s3c_fb_pd_win origen_fb_win0
= {
616 .virtual_y
= 2 * 600,
619 static struct fb_videomode origen_lcd_timing
= {
630 static struct s3c_fb_platdata origen_lcd_pdata __initdata
= {
631 .win
[0] = &origen_fb_win0
,
632 .vtiming
= &origen_lcd_timing
,
633 .vidcon0
= VIDCON0_VIDOUT_RGB
| VIDCON0_PNRMODE_RGB
,
634 .vidcon1
= VIDCON1_INV_HSYNC
| VIDCON1_INV_VSYNC
|
636 .setup_gpio
= exynos4_fimd0_gpio_setup_24bpp
,
640 /* Bluetooth rfkill gpio platform data */
641 static struct rfkill_gpio_platform_data origen_bt_pdata
= {
642 .reset_gpio
= EXYNOS4_GPX2(2),
644 .type
= RFKILL_TYPE_BLUETOOTH
,
648 /* Bluetooth Platform device */
649 static struct platform_device origen_device_bluetooth
= {
650 .name
= "rfkill_gpio",
653 .platform_data
= &origen_bt_pdata
,
657 static struct platform_device
*origen_devices
[] __initdata
= {
662 &s3c_device_usb_hsotg
,
673 &s5p_device_i2c_hdmiphy
,
679 #ifdef CONFIG_DRM_EXYNOS
682 &exynos4_device_ohci
,
683 &origen_device_gpiokeys
,
684 &origen_lcd_hv070wsa
,
685 &origen_device_bluetooth
,
688 /* LCD Backlight data */
689 static struct samsung_bl_gpio_info origen_bl_gpio_info
= {
690 .no
= EXYNOS4_GPD0(0),
691 .func
= S3C_GPIO_SFN(2),
694 static struct platform_pwm_backlight_data origen_bl_data
= {
696 .pwm_period_ns
= 1000,
699 static void __init
origen_bt_setup(void)
701 gpio_request(EXYNOS4_GPA0(0), "GPIO BT_UART");
702 /* 4 UART Pins configuration */
703 s3c_gpio_cfgrange_nopull(EXYNOS4_GPA0(0), 4, S3C_GPIO_SFN(2));
704 /* Setup BT Reset, this gpio will be requesed by rfkill-gpio */
705 s3c_gpio_cfgpin(EXYNOS4_GPX2(2), S3C_GPIO_OUTPUT
);
706 s3c_gpio_setpull(EXYNOS4_GPX2(2), S3C_GPIO_PULL_NONE
);
709 static void s5p_tv_setup(void)
711 /* Direct HPD to HDMI chip */
712 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN
, "hpd-plug");
713 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
714 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE
);
717 static void __init
origen_map_io(void)
719 exynos_init_io(NULL
, 0);
720 s3c24xx_init_clocks(24000000);
721 s3c24xx_init_uarts(origen_uartcfgs
, ARRAY_SIZE(origen_uartcfgs
));
724 static void __init
origen_power_init(void)
726 gpio_request(EXYNOS4_GPX0(4), "PMIC_IRQ");
727 s3c_gpio_cfgpin(EXYNOS4_GPX0(4), S3C_GPIO_SFN(0xf));
728 s3c_gpio_setpull(EXYNOS4_GPX0(4), S3C_GPIO_PULL_NONE
);
731 static void __init
origen_reserve(void)
733 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
736 static void __init
origen_machine_init(void)
740 s3c_i2c0_set_platdata(NULL
);
741 i2c_register_board_info(0, i2c0_devs
, ARRAY_SIZE(i2c0_devs
));
744 * Since sdhci instance 2 can contain a bootable media,
745 * sdhci instance 0 is registered after instance 2.
747 s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata
);
748 s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata
);
752 s3c_hsotg_set_platdata(&origen_hsotg_pdata
);
753 clk_xusbxti
.rate
= 24000000;
756 s5p_i2c_hdmiphy_set_platdata(NULL
);
758 #ifdef CONFIG_DRM_EXYNOS
759 s5p_device_fimd0
.dev
.platform_data
= &drm_fimd_pdata
;
760 exynos4_fimd0_gpio_setup_24bpp();
762 s5p_fimd0_set_platdata(&origen_lcd_pdata
);
765 platform_add_devices(origen_devices
, ARRAY_SIZE(origen_devices
));
767 samsung_bl_set(&origen_bl_gpio_info
, &origen_bl_data
);
772 MACHINE_START(ORIGEN
, "ORIGEN")
773 /* Maintainer: JeongHyeon Kim <jhkim@insignal.co.kr> */
774 .atag_offset
= 0x100,
775 .init_irq
= exynos4_init_irq
,
776 .map_io
= origen_map_io
,
777 .handle_irq
= gic_handle_irq
,
778 .init_machine
= origen_machine_init
,
779 .init_late
= exynos_init_late
,
780 .timer
= &exynos4_timer
,
781 .reserve
= &origen_reserve
,
782 .restart
= exynos4_restart
,