Merge branch 'picoxcell/timer' into next/timer
[deliverable/linux.git] / arch / arm / mach-exynos / mach-origen.c
1 /* linux/arch/arm/mach-exynos4/mach-origen.c
2 *
3 * Copyright (c) 2011 Insignal Co., Ltd.
4 * http://www.insignal.co.kr/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11 #include <linux/serial_core.h>
12 #include <linux/gpio.h>
13 #include <linux/mmc/host.h>
14 #include <linux/platform_device.h>
15 #include <linux/io.h>
16 #include <linux/input.h>
17 #include <linux/pwm_backlight.h>
18 #include <linux/gpio_keys.h>
19 #include <linux/i2c.h>
20 #include <linux/regulator/machine.h>
21 #include <linux/mfd/max8997.h>
22 #include <linux/lcd.h>
23 #include <linux/rfkill-gpio.h>
24
25 #include <asm/mach/arch.h>
26 #include <asm/hardware/gic.h>
27 #include <asm/mach-types.h>
28
29 #include <video/platform_lcd.h>
30
31 #include <plat/regs-serial.h>
32 #include <plat/regs-fb-v4.h>
33 #include <plat/cpu.h>
34 #include <plat/devs.h>
35 #include <plat/sdhci.h>
36 #include <plat/iic.h>
37 #include <plat/ehci.h>
38 #include <plat/clock.h>
39 #include <plat/gpio-cfg.h>
40 #include <plat/backlight.h>
41 #include <plat/pd.h>
42 #include <plat/fb.h>
43 #include <plat/mfc.h>
44
45 #include <mach/ohci.h>
46 #include <mach/map.h>
47
48 #include <drm/exynos_drm.h>
49 #include "common.h"
50
51 /* Following are default values for UCON, ULCON and UFCON UART registers */
52 #define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
53 S3C2410_UCON_RXILEVEL | \
54 S3C2410_UCON_TXIRQMODE | \
55 S3C2410_UCON_RXIRQMODE | \
56 S3C2410_UCON_RXFIFO_TOI | \
57 S3C2443_UCON_RXERR_IRQEN)
58
59 #define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8
60
61 #define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
62 S5PV210_UFCON_TXTRIG4 | \
63 S5PV210_UFCON_RXTRIG4)
64
65 static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = {
66 [0] = {
67 .hwport = 0,
68 .flags = 0,
69 .ucon = ORIGEN_UCON_DEFAULT,
70 .ulcon = ORIGEN_ULCON_DEFAULT,
71 .ufcon = ORIGEN_UFCON_DEFAULT,
72 },
73 [1] = {
74 .hwport = 1,
75 .flags = 0,
76 .ucon = ORIGEN_UCON_DEFAULT,
77 .ulcon = ORIGEN_ULCON_DEFAULT,
78 .ufcon = ORIGEN_UFCON_DEFAULT,
79 },
80 [2] = {
81 .hwport = 2,
82 .flags = 0,
83 .ucon = ORIGEN_UCON_DEFAULT,
84 .ulcon = ORIGEN_ULCON_DEFAULT,
85 .ufcon = ORIGEN_UFCON_DEFAULT,
86 },
87 [3] = {
88 .hwport = 3,
89 .flags = 0,
90 .ucon = ORIGEN_UCON_DEFAULT,
91 .ulcon = ORIGEN_ULCON_DEFAULT,
92 .ufcon = ORIGEN_UFCON_DEFAULT,
93 },
94 };
95
96 static struct regulator_consumer_supply __initdata ldo3_consumer[] = {
97 REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), /* MIPI */
98 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), /* HDMI */
99 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), /* HDMI */
100 };
101 static struct regulator_consumer_supply __initdata ldo6_consumer[] = {
102 REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"), /* MIPI */
103 };
104 static struct regulator_consumer_supply __initdata ldo7_consumer[] = {
105 REGULATOR_SUPPLY("avdd", "alc5625"), /* Realtek ALC5625 */
106 };
107 static struct regulator_consumer_supply __initdata ldo8_consumer[] = {
108 REGULATOR_SUPPLY("vdd", "s5p-adc"), /* ADC */
109 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"), /* HDMI */
110 };
111 static struct regulator_consumer_supply __initdata ldo9_consumer[] = {
112 REGULATOR_SUPPLY("dvdd", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
113 };
114 static struct regulator_consumer_supply __initdata ldo11_consumer[] = {
115 REGULATOR_SUPPLY("dvdd", "alc5625"), /* Realtek ALC5625 */
116 };
117 static struct regulator_consumer_supply __initdata ldo14_consumer[] = {
118 REGULATOR_SUPPLY("avdd18", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
119 };
120 static struct regulator_consumer_supply __initdata ldo17_consumer[] = {
121 REGULATOR_SUPPLY("vdd33", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
122 };
123 static struct regulator_consumer_supply __initdata buck1_consumer[] = {
124 REGULATOR_SUPPLY("vdd_arm", NULL), /* CPUFREQ */
125 };
126 static struct regulator_consumer_supply __initdata buck2_consumer[] = {
127 REGULATOR_SUPPLY("vdd_int", NULL), /* CPUFREQ */
128 };
129 static struct regulator_consumer_supply __initdata buck3_consumer[] = {
130 REGULATOR_SUPPLY("vdd_g3d", "mali_drm"), /* G3D */
131 };
132 static struct regulator_consumer_supply __initdata buck7_consumer[] = {
133 REGULATOR_SUPPLY("vcc", "platform-lcd"), /* LCD */
134 };
135
136 static struct regulator_init_data __initdata max8997_ldo1_data = {
137 .constraints = {
138 .name = "VDD_ABB_3.3V",
139 .min_uV = 3300000,
140 .max_uV = 3300000,
141 .apply_uV = 1,
142 .state_mem = {
143 .disabled = 1,
144 },
145 },
146 };
147
148 static struct regulator_init_data __initdata max8997_ldo2_data = {
149 .constraints = {
150 .name = "VDD_ALIVE_1.1V",
151 .min_uV = 1100000,
152 .max_uV = 1100000,
153 .apply_uV = 1,
154 .always_on = 1,
155 .state_mem = {
156 .enabled = 1,
157 },
158 },
159 };
160
161 static struct regulator_init_data __initdata max8997_ldo3_data = {
162 .constraints = {
163 .name = "VMIPI_1.1V",
164 .min_uV = 1100000,
165 .max_uV = 1100000,
166 .apply_uV = 1,
167 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
168 .state_mem = {
169 .disabled = 1,
170 },
171 },
172 .num_consumer_supplies = ARRAY_SIZE(ldo3_consumer),
173 .consumer_supplies = ldo3_consumer,
174 };
175
176 static struct regulator_init_data __initdata max8997_ldo4_data = {
177 .constraints = {
178 .name = "VDD_RTC_1.8V",
179 .min_uV = 1800000,
180 .max_uV = 1800000,
181 .apply_uV = 1,
182 .always_on = 1,
183 .state_mem = {
184 .disabled = 1,
185 },
186 },
187 };
188
189 static struct regulator_init_data __initdata max8997_ldo6_data = {
190 .constraints = {
191 .name = "VMIPI_1.8V",
192 .min_uV = 1800000,
193 .max_uV = 1800000,
194 .apply_uV = 1,
195 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
196 .state_mem = {
197 .disabled = 1,
198 },
199 },
200 .num_consumer_supplies = ARRAY_SIZE(ldo6_consumer),
201 .consumer_supplies = ldo6_consumer,
202 };
203
204 static struct regulator_init_data __initdata max8997_ldo7_data = {
205 .constraints = {
206 .name = "VDD_AUD_1.8V",
207 .min_uV = 1800000,
208 .max_uV = 1800000,
209 .apply_uV = 1,
210 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
211 .state_mem = {
212 .disabled = 1,
213 },
214 },
215 .num_consumer_supplies = ARRAY_SIZE(ldo7_consumer),
216 .consumer_supplies = ldo7_consumer,
217 };
218
219 static struct regulator_init_data __initdata max8997_ldo8_data = {
220 .constraints = {
221 .name = "VADC_3.3V",
222 .min_uV = 3300000,
223 .max_uV = 3300000,
224 .apply_uV = 1,
225 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
226 .state_mem = {
227 .disabled = 1,
228 },
229 },
230 .num_consumer_supplies = ARRAY_SIZE(ldo8_consumer),
231 .consumer_supplies = ldo8_consumer,
232 };
233
234 static struct regulator_init_data __initdata max8997_ldo9_data = {
235 .constraints = {
236 .name = "DVDD_SWB_2.8V",
237 .min_uV = 2800000,
238 .max_uV = 2800000,
239 .apply_uV = 1,
240 .always_on = 1,
241 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
242 .state_mem = {
243 .disabled = 1,
244 },
245 },
246 .num_consumer_supplies = ARRAY_SIZE(ldo9_consumer),
247 .consumer_supplies = ldo9_consumer,
248 };
249
250 static struct regulator_init_data __initdata max8997_ldo10_data = {
251 .constraints = {
252 .name = "VDD_PLL_1.1V",
253 .min_uV = 1100000,
254 .max_uV = 1100000,
255 .apply_uV = 1,
256 .always_on = 1,
257 .state_mem = {
258 .disabled = 1,
259 },
260 },
261 };
262
263 static struct regulator_init_data __initdata max8997_ldo11_data = {
264 .constraints = {
265 .name = "VDD_AUD_3V",
266 .min_uV = 3000000,
267 .max_uV = 3000000,
268 .apply_uV = 1,
269 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
270 .state_mem = {
271 .disabled = 1,
272 },
273 },
274 .num_consumer_supplies = ARRAY_SIZE(ldo11_consumer),
275 .consumer_supplies = ldo11_consumer,
276 };
277
278 static struct regulator_init_data __initdata max8997_ldo14_data = {
279 .constraints = {
280 .name = "AVDD18_SWB_1.8V",
281 .min_uV = 1800000,
282 .max_uV = 1800000,
283 .apply_uV = 1,
284 .always_on = 1,
285 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
286 .state_mem = {
287 .disabled = 1,
288 },
289 },
290 .num_consumer_supplies = ARRAY_SIZE(ldo14_consumer),
291 .consumer_supplies = ldo14_consumer,
292 };
293
294 static struct regulator_init_data __initdata max8997_ldo17_data = {
295 .constraints = {
296 .name = "VDD_SWB_3.3V",
297 .min_uV = 3300000,
298 .max_uV = 3300000,
299 .apply_uV = 1,
300 .always_on = 1,
301 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
302 .state_mem = {
303 .disabled = 1,
304 },
305 },
306 .num_consumer_supplies = ARRAY_SIZE(ldo17_consumer),
307 .consumer_supplies = ldo17_consumer,
308 };
309
310 static struct regulator_init_data __initdata max8997_ldo21_data = {
311 .constraints = {
312 .name = "VDD_MIF_1.2V",
313 .min_uV = 1200000,
314 .max_uV = 1200000,
315 .apply_uV = 1,
316 .always_on = 1,
317 .state_mem = {
318 .disabled = 1,
319 },
320 },
321 };
322
323 static struct regulator_init_data __initdata max8997_buck1_data = {
324 .constraints = {
325 .name = "VDD_ARM_1.2V",
326 .min_uV = 950000,
327 .max_uV = 1350000,
328 .always_on = 1,
329 .boot_on = 1,
330 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
331 .state_mem = {
332 .disabled = 1,
333 },
334 },
335 .num_consumer_supplies = ARRAY_SIZE(buck1_consumer),
336 .consumer_supplies = buck1_consumer,
337 };
338
339 static struct regulator_init_data __initdata max8997_buck2_data = {
340 .constraints = {
341 .name = "VDD_INT_1.1V",
342 .min_uV = 900000,
343 .max_uV = 1100000,
344 .always_on = 1,
345 .boot_on = 1,
346 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
347 .state_mem = {
348 .disabled = 1,
349 },
350 },
351 .num_consumer_supplies = ARRAY_SIZE(buck2_consumer),
352 .consumer_supplies = buck2_consumer,
353 };
354
355 static struct regulator_init_data __initdata max8997_buck3_data = {
356 .constraints = {
357 .name = "VDD_G3D_1.1V",
358 .min_uV = 900000,
359 .max_uV = 1100000,
360 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
361 REGULATOR_CHANGE_STATUS,
362 .state_mem = {
363 .disabled = 1,
364 },
365 },
366 .num_consumer_supplies = ARRAY_SIZE(buck3_consumer),
367 .consumer_supplies = buck3_consumer,
368 };
369
370 static struct regulator_init_data __initdata max8997_buck5_data = {
371 .constraints = {
372 .name = "VDDQ_M1M2_1.2V",
373 .min_uV = 1200000,
374 .max_uV = 1200000,
375 .apply_uV = 1,
376 .always_on = 1,
377 .state_mem = {
378 .disabled = 1,
379 },
380 },
381 };
382
383 static struct regulator_init_data __initdata max8997_buck7_data = {
384 .constraints = {
385 .name = "VDD_LCD_3.3V",
386 .min_uV = 3300000,
387 .max_uV = 3300000,
388 .boot_on = 1,
389 .apply_uV = 1,
390 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
391 .state_mem = {
392 .disabled = 1
393 },
394 },
395 .num_consumer_supplies = ARRAY_SIZE(buck7_consumer),
396 .consumer_supplies = buck7_consumer,
397 };
398
399 static struct max8997_regulator_data __initdata origen_max8997_regulators[] = {
400 { MAX8997_LDO1, &max8997_ldo1_data },
401 { MAX8997_LDO2, &max8997_ldo2_data },
402 { MAX8997_LDO3, &max8997_ldo3_data },
403 { MAX8997_LDO4, &max8997_ldo4_data },
404 { MAX8997_LDO6, &max8997_ldo6_data },
405 { MAX8997_LDO7, &max8997_ldo7_data },
406 { MAX8997_LDO8, &max8997_ldo8_data },
407 { MAX8997_LDO9, &max8997_ldo9_data },
408 { MAX8997_LDO10, &max8997_ldo10_data },
409 { MAX8997_LDO11, &max8997_ldo11_data },
410 { MAX8997_LDO14, &max8997_ldo14_data },
411 { MAX8997_LDO17, &max8997_ldo17_data },
412 { MAX8997_LDO21, &max8997_ldo21_data },
413 { MAX8997_BUCK1, &max8997_buck1_data },
414 { MAX8997_BUCK2, &max8997_buck2_data },
415 { MAX8997_BUCK3, &max8997_buck3_data },
416 { MAX8997_BUCK5, &max8997_buck5_data },
417 { MAX8997_BUCK7, &max8997_buck7_data },
418 };
419
420 static struct max8997_platform_data __initdata origen_max8997_pdata = {
421 .num_regulators = ARRAY_SIZE(origen_max8997_regulators),
422 .regulators = origen_max8997_regulators,
423
424 .wakeup = true,
425 .buck1_gpiodvs = false,
426 .buck2_gpiodvs = false,
427 .buck5_gpiodvs = false,
428 .irq_base = IRQ_GPIO_END + 1,
429
430 .ignore_gpiodvs_side_effect = true,
431 .buck125_default_idx = 0x0,
432
433 .buck125_gpios[0] = EXYNOS4_GPX0(0),
434 .buck125_gpios[1] = EXYNOS4_GPX0(1),
435 .buck125_gpios[2] = EXYNOS4_GPX0(2),
436
437 .buck1_voltage[0] = 1350000,
438 .buck1_voltage[1] = 1300000,
439 .buck1_voltage[2] = 1250000,
440 .buck1_voltage[3] = 1200000,
441 .buck1_voltage[4] = 1150000,
442 .buck1_voltage[5] = 1100000,
443 .buck1_voltage[6] = 1000000,
444 .buck1_voltage[7] = 950000,
445
446 .buck2_voltage[0] = 1100000,
447 .buck2_voltage[1] = 1100000,
448 .buck2_voltage[2] = 1100000,
449 .buck2_voltage[3] = 1100000,
450 .buck2_voltage[4] = 1000000,
451 .buck2_voltage[5] = 1000000,
452 .buck2_voltage[6] = 1000000,
453 .buck2_voltage[7] = 1000000,
454
455 .buck5_voltage[0] = 1200000,
456 .buck5_voltage[1] = 1200000,
457 .buck5_voltage[2] = 1200000,
458 .buck5_voltage[3] = 1200000,
459 .buck5_voltage[4] = 1200000,
460 .buck5_voltage[5] = 1200000,
461 .buck5_voltage[6] = 1200000,
462 .buck5_voltage[7] = 1200000,
463 };
464
465 /* I2C0 */
466 static struct i2c_board_info i2c0_devs[] __initdata = {
467 {
468 I2C_BOARD_INFO("max8997", (0xCC >> 1)),
469 .platform_data = &origen_max8997_pdata,
470 .irq = IRQ_EINT(4),
471 },
472 };
473
474 static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata = {
475 .cd_type = S3C_SDHCI_CD_INTERNAL,
476 };
477
478 static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = {
479 .cd_type = S3C_SDHCI_CD_INTERNAL,
480 };
481
482 /* USB EHCI */
483 static struct s5p_ehci_platdata origen_ehci_pdata;
484
485 static void __init origen_ehci_init(void)
486 {
487 struct s5p_ehci_platdata *pdata = &origen_ehci_pdata;
488
489 s5p_ehci_set_platdata(pdata);
490 }
491
492 /* USB OHCI */
493 static struct exynos4_ohci_platdata origen_ohci_pdata;
494
495 static void __init origen_ohci_init(void)
496 {
497 struct exynos4_ohci_platdata *pdata = &origen_ohci_pdata;
498
499 exynos4_ohci_set_platdata(pdata);
500 }
501
502 static struct gpio_keys_button origen_gpio_keys_table[] = {
503 {
504 .code = KEY_MENU,
505 .gpio = EXYNOS4_GPX1(5),
506 .desc = "gpio-keys: KEY_MENU",
507 .type = EV_KEY,
508 .active_low = 1,
509 .wakeup = 1,
510 .debounce_interval = 1,
511 }, {
512 .code = KEY_HOME,
513 .gpio = EXYNOS4_GPX1(6),
514 .desc = "gpio-keys: KEY_HOME",
515 .type = EV_KEY,
516 .active_low = 1,
517 .wakeup = 1,
518 .debounce_interval = 1,
519 }, {
520 .code = KEY_BACK,
521 .gpio = EXYNOS4_GPX1(7),
522 .desc = "gpio-keys: KEY_BACK",
523 .type = EV_KEY,
524 .active_low = 1,
525 .wakeup = 1,
526 .debounce_interval = 1,
527 }, {
528 .code = KEY_UP,
529 .gpio = EXYNOS4_GPX2(0),
530 .desc = "gpio-keys: KEY_UP",
531 .type = EV_KEY,
532 .active_low = 1,
533 .wakeup = 1,
534 .debounce_interval = 1,
535 }, {
536 .code = KEY_DOWN,
537 .gpio = EXYNOS4_GPX2(1),
538 .desc = "gpio-keys: KEY_DOWN",
539 .type = EV_KEY,
540 .active_low = 1,
541 .wakeup = 1,
542 .debounce_interval = 1,
543 },
544 };
545
546 static struct gpio_keys_platform_data origen_gpio_keys_data = {
547 .buttons = origen_gpio_keys_table,
548 .nbuttons = ARRAY_SIZE(origen_gpio_keys_table),
549 };
550
551 static struct platform_device origen_device_gpiokeys = {
552 .name = "gpio-keys",
553 .dev = {
554 .platform_data = &origen_gpio_keys_data,
555 },
556 };
557
558 static void lcd_hv070wsa_set_power(struct plat_lcd_data *pd, unsigned int power)
559 {
560 int ret;
561
562 if (power)
563 ret = gpio_request_one(EXYNOS4_GPE3(4),
564 GPIOF_OUT_INIT_HIGH, "GPE3_4");
565 else
566 ret = gpio_request_one(EXYNOS4_GPE3(4),
567 GPIOF_OUT_INIT_LOW, "GPE3_4");
568
569 gpio_free(EXYNOS4_GPE3(4));
570
571 if (ret)
572 pr_err("failed to request gpio for LCD power: %d\n", ret);
573 }
574
575 static struct plat_lcd_data origen_lcd_hv070wsa_data = {
576 .set_power = lcd_hv070wsa_set_power,
577 };
578
579 static struct platform_device origen_lcd_hv070wsa = {
580 .name = "platform-lcd",
581 .dev.parent = &s5p_device_fimd0.dev,
582 .dev.platform_data = &origen_lcd_hv070wsa_data,
583 };
584
585 #ifdef CONFIG_DRM_EXYNOS
586 static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
587 .panel = {
588 .timing = {
589 .left_margin = 64,
590 .right_margin = 16,
591 .upper_margin = 64,
592 .lower_margin = 16,
593 .hsync_len = 48,
594 .vsync_len = 3,
595 .xres = 1024,
596 .yres = 600,
597 },
598 },
599 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
600 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
601 VIDCON1_INV_VCLK,
602 .default_win = 0,
603 .bpp = 32,
604 };
605 #else
606 static struct s3c_fb_pd_win origen_fb_win0 = {
607 .xres = 1024,
608 .yres = 600,
609 .max_bpp = 32,
610 .default_bpp = 24,
611 .virtual_x = 1024,
612 .virtual_y = 2 * 600,
613 };
614
615 static struct fb_videomode origen_lcd_timing = {
616 .left_margin = 64,
617 .right_margin = 16,
618 .upper_margin = 64,
619 .lower_margin = 16,
620 .hsync_len = 48,
621 .vsync_len = 3,
622 .xres = 1024,
623 .yres = 600,
624 };
625
626 static struct s3c_fb_platdata origen_lcd_pdata __initdata = {
627 .win[0] = &origen_fb_win0,
628 .vtiming = &origen_lcd_timing,
629 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
630 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC |
631 VIDCON1_INV_VCLK,
632 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
633 };
634 #endif
635
636 /* Bluetooth rfkill gpio platform data */
637 static struct rfkill_gpio_platform_data origen_bt_pdata = {
638 .reset_gpio = EXYNOS4_GPX2(2),
639 .shutdown_gpio = -1,
640 .type = RFKILL_TYPE_BLUETOOTH,
641 .name = "origen-bt",
642 };
643
644 /* Bluetooth Platform device */
645 static struct platform_device origen_device_bluetooth = {
646 .name = "rfkill_gpio",
647 .id = -1,
648 .dev = {
649 .platform_data = &origen_bt_pdata,
650 },
651 };
652
653 static struct platform_device *origen_devices[] __initdata = {
654 &s3c_device_hsmmc2,
655 &s3c_device_hsmmc0,
656 &s3c_device_i2c0,
657 &s3c_device_rtc,
658 &s3c_device_wdt,
659 &s5p_device_ehci,
660 &s5p_device_fimc0,
661 &s5p_device_fimc1,
662 &s5p_device_fimc2,
663 &s5p_device_fimc3,
664 &s5p_device_fimc_md,
665 &s5p_device_fimd0,
666 &s5p_device_g2d,
667 &s5p_device_hdmi,
668 &s5p_device_i2c_hdmiphy,
669 &s5p_device_jpeg,
670 &s5p_device_mfc,
671 &s5p_device_mfc_l,
672 &s5p_device_mfc_r,
673 &s5p_device_mixer,
674 #ifdef CONFIG_DRM_EXYNOS
675 &exynos_device_drm,
676 #endif
677 &exynos4_device_ohci,
678 &origen_device_gpiokeys,
679 &origen_lcd_hv070wsa,
680 &origen_device_bluetooth,
681 };
682
683 /* LCD Backlight data */
684 static struct samsung_bl_gpio_info origen_bl_gpio_info = {
685 .no = EXYNOS4_GPD0(0),
686 .func = S3C_GPIO_SFN(2),
687 };
688
689 static struct platform_pwm_backlight_data origen_bl_data = {
690 .pwm_id = 0,
691 .pwm_period_ns = 1000,
692 };
693
694 static void __init origen_bt_setup(void)
695 {
696 gpio_request(EXYNOS4_GPA0(0), "GPIO BT_UART");
697 /* 4 UART Pins configuration */
698 s3c_gpio_cfgrange_nopull(EXYNOS4_GPA0(0), 4, S3C_GPIO_SFN(2));
699 /* Setup BT Reset, this gpio will be requesed by rfkill-gpio */
700 s3c_gpio_cfgpin(EXYNOS4_GPX2(2), S3C_GPIO_OUTPUT);
701 s3c_gpio_setpull(EXYNOS4_GPX2(2), S3C_GPIO_PULL_NONE);
702 }
703
704 static void s5p_tv_setup(void)
705 {
706 /* Direct HPD to HDMI chip */
707 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
708 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
709 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
710 }
711
712 static void __init origen_map_io(void)
713 {
714 exynos_init_io(NULL, 0);
715 s3c24xx_init_clocks(24000000);
716 s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs));
717 }
718
719 static void __init origen_power_init(void)
720 {
721 gpio_request(EXYNOS4_GPX0(4), "PMIC_IRQ");
722 s3c_gpio_cfgpin(EXYNOS4_GPX0(4), S3C_GPIO_SFN(0xf));
723 s3c_gpio_setpull(EXYNOS4_GPX0(4), S3C_GPIO_PULL_NONE);
724 }
725
726 static void __init origen_reserve(void)
727 {
728 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
729 }
730
731 static void __init origen_machine_init(void)
732 {
733 origen_power_init();
734
735 s3c_i2c0_set_platdata(NULL);
736 i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs));
737
738 /*
739 * Since sdhci instance 2 can contain a bootable media,
740 * sdhci instance 0 is registered after instance 2.
741 */
742 s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata);
743 s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata);
744
745 origen_ehci_init();
746 origen_ohci_init();
747 clk_xusbxti.rate = 24000000;
748
749 s5p_tv_setup();
750 s5p_i2c_hdmiphy_set_platdata(NULL);
751
752 #ifdef CONFIG_DRM_EXYNOS
753 s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
754 exynos4_fimd0_gpio_setup_24bpp();
755 #else
756 s5p_fimd0_set_platdata(&origen_lcd_pdata);
757 #endif
758
759 platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices));
760
761 samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data);
762
763 origen_bt_setup();
764 }
765
766 MACHINE_START(ORIGEN, "ORIGEN")
767 /* Maintainer: JeongHyeon Kim <jhkim@insignal.co.kr> */
768 .atag_offset = 0x100,
769 .init_irq = exynos4_init_irq,
770 .map_io = origen_map_io,
771 .handle_irq = gic_handle_irq,
772 .init_machine = origen_machine_init,
773 .init_late = exynos_init_late,
774 .timer = &exynos4_timer,
775 .reserve = &origen_reserve,
776 .restart = exynos4_restart,
777 MACHINE_END
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