Merge branch 'board-specific' of git://github.com/hzhuang1/linux into next/boards
[deliverable/linux.git] / arch / arm / mach-exynos / mach-universal_c210.c
1 /* linux/arch/arm/mach-exynos4/mach-universal_c210.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10 #include <linux/platform_device.h>
11 #include <linux/serial_core.h>
12 #include <linux/input.h>
13 #include <linux/i2c.h>
14 #include <linux/gpio_keys.h>
15 #include <linux/gpio.h>
16 #include <linux/interrupt.h>
17 #include <linux/fb.h>
18 #include <linux/mfd/max8998.h>
19 #include <linux/regulator/machine.h>
20 #include <linux/regulator/fixed.h>
21 #include <linux/regulator/max8952.h>
22 #include <linux/mmc/host.h>
23 #include <linux/i2c-gpio.h>
24 #include <linux/i2c/mcs.h>
25 #include <linux/i2c/atmel_mxt_ts.h>
26
27 #include <asm/mach/arch.h>
28 #include <asm/hardware/gic.h>
29 #include <asm/mach-types.h>
30
31 #include <plat/regs-serial.h>
32 #include <plat/cpu.h>
33 #include <plat/devs.h>
34 #include <plat/iic.h>
35 #include <plat/gpio-cfg.h>
36 #include <plat/fb.h>
37 #include <plat/mfc.h>
38 #include <plat/sdhci.h>
39 #include <plat/pd.h>
40 #include <plat/regs-fb-v4.h>
41 #include <plat/fimc-core.h>
42 #include <plat/camport.h>
43 #include <plat/mipi_csis.h>
44
45 #include <mach/map.h>
46
47 #include <media/v4l2-mediabus.h>
48 #include <media/s5p_fimc.h>
49 #include <media/m5mols.h>
50 #include <media/s5k6aa.h>
51
52 #include "common.h"
53
54 /* Following are default values for UCON, ULCON and UFCON UART registers */
55 #define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
56 S3C2410_UCON_RXILEVEL | \
57 S3C2410_UCON_TXIRQMODE | \
58 S3C2410_UCON_RXIRQMODE | \
59 S3C2410_UCON_RXFIFO_TOI | \
60 S3C2443_UCON_RXERR_IRQEN)
61
62 #define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8
63
64 #define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
65 S5PV210_UFCON_TXTRIG256 | \
66 S5PV210_UFCON_RXTRIG256)
67
68 static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
69 [0] = {
70 .hwport = 0,
71 .ucon = UNIVERSAL_UCON_DEFAULT,
72 .ulcon = UNIVERSAL_ULCON_DEFAULT,
73 .ufcon = UNIVERSAL_UFCON_DEFAULT,
74 },
75 [1] = {
76 .hwport = 1,
77 .ucon = UNIVERSAL_UCON_DEFAULT,
78 .ulcon = UNIVERSAL_ULCON_DEFAULT,
79 .ufcon = UNIVERSAL_UFCON_DEFAULT,
80 },
81 [2] = {
82 .hwport = 2,
83 .ucon = UNIVERSAL_UCON_DEFAULT,
84 .ulcon = UNIVERSAL_ULCON_DEFAULT,
85 .ufcon = UNIVERSAL_UFCON_DEFAULT,
86 },
87 [3] = {
88 .hwport = 3,
89 .ucon = UNIVERSAL_UCON_DEFAULT,
90 .ulcon = UNIVERSAL_ULCON_DEFAULT,
91 .ufcon = UNIVERSAL_UFCON_DEFAULT,
92 },
93 };
94
95 static struct regulator_consumer_supply max8952_consumer =
96 REGULATOR_SUPPLY("vdd_arm", NULL);
97
98 static struct max8952_platform_data universal_max8952_pdata __initdata = {
99 .gpio_vid0 = EXYNOS4_GPX0(3),
100 .gpio_vid1 = EXYNOS4_GPX0(4),
101 .gpio_en = -1, /* Not controllable, set "Always High" */
102 .default_mode = 0, /* vid0 = 0, vid1 = 0 */
103 .dvs_mode = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */
104 .sync_freq = 0, /* default: fastest */
105 .ramp_speed = 0, /* default: fastest */
106
107 .reg_data = {
108 .constraints = {
109 .name = "VARM_1.2V",
110 .min_uV = 770000,
111 .max_uV = 1400000,
112 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
113 .always_on = 1,
114 .boot_on = 1,
115 },
116 .num_consumer_supplies = 1,
117 .consumer_supplies = &max8952_consumer,
118 },
119 };
120
121 static struct regulator_consumer_supply lp3974_buck1_consumer =
122 REGULATOR_SUPPLY("vdd_int", NULL);
123
124 static struct regulator_consumer_supply lp3974_buck2_consumer =
125 REGULATOR_SUPPLY("vddg3d", NULL);
126
127 static struct regulator_consumer_supply lp3974_buck3_consumer[] = {
128 REGULATOR_SUPPLY("vdet", "s5p-sdo"),
129 REGULATOR_SUPPLY("vdd_reg", "0-003c"),
130 };
131
132 static struct regulator_init_data lp3974_buck1_data = {
133 .constraints = {
134 .name = "VINT_1.1V",
135 .min_uV = 750000,
136 .max_uV = 1500000,
137 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
138 REGULATOR_CHANGE_STATUS,
139 .boot_on = 1,
140 .state_mem = {
141 .disabled = 1,
142 },
143 },
144 .num_consumer_supplies = 1,
145 .consumer_supplies = &lp3974_buck1_consumer,
146 };
147
148 static struct regulator_init_data lp3974_buck2_data = {
149 .constraints = {
150 .name = "VG3D_1.1V",
151 .min_uV = 750000,
152 .max_uV = 1500000,
153 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
154 REGULATOR_CHANGE_STATUS,
155 .boot_on = 1,
156 .state_mem = {
157 .disabled = 1,
158 },
159 },
160 .num_consumer_supplies = 1,
161 .consumer_supplies = &lp3974_buck2_consumer,
162 };
163
164 static struct regulator_init_data lp3974_buck3_data = {
165 .constraints = {
166 .name = "VCC_1.8V",
167 .min_uV = 1800000,
168 .max_uV = 1800000,
169 .apply_uV = 1,
170 .always_on = 1,
171 .state_mem = {
172 .enabled = 1,
173 },
174 },
175 .num_consumer_supplies = ARRAY_SIZE(lp3974_buck3_consumer),
176 .consumer_supplies = lp3974_buck3_consumer,
177 };
178
179 static struct regulator_init_data lp3974_buck4_data = {
180 .constraints = {
181 .name = "VMEM_1.2V",
182 .min_uV = 1200000,
183 .max_uV = 1200000,
184 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
185 .apply_uV = 1,
186 .state_mem = {
187 .disabled = 1,
188 },
189 },
190 };
191
192 static struct regulator_init_data lp3974_ldo2_data = {
193 .constraints = {
194 .name = "VALIVE_1.2V",
195 .min_uV = 1200000,
196 .max_uV = 1200000,
197 .apply_uV = 1,
198 .always_on = 1,
199 .state_mem = {
200 .enabled = 1,
201 },
202 },
203 };
204
205 static struct regulator_consumer_supply lp3974_ldo3_consumer[] = {
206 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"),
207 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"),
208 REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"),
209 };
210
211 static struct regulator_init_data lp3974_ldo3_data = {
212 .constraints = {
213 .name = "VUSB+MIPI_1.1V",
214 .min_uV = 1100000,
215 .max_uV = 1100000,
216 .apply_uV = 1,
217 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
218 .state_mem = {
219 .disabled = 1,
220 },
221 },
222 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo3_consumer),
223 .consumer_supplies = lp3974_ldo3_consumer,
224 };
225
226 static struct regulator_consumer_supply lp3974_ldo4_consumer[] = {
227 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"),
228 };
229
230 static struct regulator_init_data lp3974_ldo4_data = {
231 .constraints = {
232 .name = "VADC_3.3V",
233 .min_uV = 3300000,
234 .max_uV = 3300000,
235 .apply_uV = 1,
236 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
237 .state_mem = {
238 .disabled = 1,
239 },
240 },
241 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo4_consumer),
242 .consumer_supplies = lp3974_ldo4_consumer,
243 };
244
245 static struct regulator_init_data lp3974_ldo5_data = {
246 .constraints = {
247 .name = "VTF_2.8V",
248 .min_uV = 2800000,
249 .max_uV = 2800000,
250 .apply_uV = 1,
251 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
252 .state_mem = {
253 .disabled = 1,
254 },
255 },
256 };
257
258 static struct regulator_init_data lp3974_ldo6_data = {
259 .constraints = {
260 .name = "LDO6",
261 .min_uV = 2000000,
262 .max_uV = 2000000,
263 .apply_uV = 1,
264 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
265 .state_mem = {
266 .disabled = 1,
267 },
268 },
269 };
270
271 static struct regulator_consumer_supply lp3974_ldo7_consumer[] = {
272 REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"),
273 };
274
275 static struct regulator_init_data lp3974_ldo7_data = {
276 .constraints = {
277 .name = "VLCD+VMIPI_1.8V",
278 .min_uV = 1800000,
279 .max_uV = 1800000,
280 .apply_uV = 1,
281 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
282 .state_mem = {
283 .disabled = 1,
284 },
285 },
286 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo7_consumer),
287 .consumer_supplies = lp3974_ldo7_consumer,
288 };
289
290 static struct regulator_consumer_supply lp3974_ldo8_consumer[] = {
291 REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"),
292 };
293
294 static struct regulator_init_data lp3974_ldo8_data = {
295 .constraints = {
296 .name = "VUSB+VDAC_3.3V",
297 .min_uV = 3300000,
298 .max_uV = 3300000,
299 .apply_uV = 1,
300 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
301 .state_mem = {
302 .disabled = 1,
303 },
304 },
305 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo8_consumer),
306 .consumer_supplies = lp3974_ldo8_consumer,
307 };
308
309 static struct regulator_consumer_supply lp3974_ldo9_consumer =
310 REGULATOR_SUPPLY("vddio", "0-003c");
311
312 static struct regulator_init_data lp3974_ldo9_data = {
313 .constraints = {
314 .name = "VCC_2.8V",
315 .min_uV = 2800000,
316 .max_uV = 2800000,
317 .apply_uV = 1,
318 .always_on = 1,
319 .state_mem = {
320 .enabled = 1,
321 },
322 },
323 .num_consumer_supplies = 1,
324 .consumer_supplies = &lp3974_ldo9_consumer,
325 };
326
327 static struct regulator_init_data lp3974_ldo10_data = {
328 .constraints = {
329 .name = "VPLL_1.1V",
330 .min_uV = 1100000,
331 .max_uV = 1100000,
332 .boot_on = 1,
333 .apply_uV = 1,
334 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
335 .state_mem = {
336 .disabled = 1,
337 },
338 },
339 };
340
341 static struct regulator_consumer_supply lp3974_ldo11_consumer =
342 REGULATOR_SUPPLY("dig_28", "0-001f");
343
344 static struct regulator_init_data lp3974_ldo11_data = {
345 .constraints = {
346 .name = "CAM_AF_3.3V",
347 .min_uV = 3300000,
348 .max_uV = 3300000,
349 .apply_uV = 1,
350 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
351 .state_mem = {
352 .disabled = 1,
353 },
354 },
355 .num_consumer_supplies = 1,
356 .consumer_supplies = &lp3974_ldo11_consumer,
357 };
358
359 static struct regulator_init_data lp3974_ldo12_data = {
360 .constraints = {
361 .name = "PS_2.8V",
362 .min_uV = 2800000,
363 .max_uV = 2800000,
364 .apply_uV = 1,
365 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
366 .state_mem = {
367 .disabled = 1,
368 },
369 },
370 };
371
372 static struct regulator_init_data lp3974_ldo13_data = {
373 .constraints = {
374 .name = "VHIC_1.2V",
375 .min_uV = 1200000,
376 .max_uV = 1200000,
377 .apply_uV = 1,
378 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
379 .state_mem = {
380 .disabled = 1,
381 },
382 },
383 };
384
385 static struct regulator_consumer_supply lp3974_ldo14_consumer =
386 REGULATOR_SUPPLY("dig_18", "0-001f");
387
388 static struct regulator_init_data lp3974_ldo14_data = {
389 .constraints = {
390 .name = "CAM_I_HOST_1.8V",
391 .min_uV = 1800000,
392 .max_uV = 1800000,
393 .apply_uV = 1,
394 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
395 .state_mem = {
396 .disabled = 1,
397 },
398 },
399 .num_consumer_supplies = 1,
400 .consumer_supplies = &lp3974_ldo14_consumer,
401 };
402
403
404 static struct regulator_consumer_supply lp3974_ldo15_consumer =
405 REGULATOR_SUPPLY("dig_12", "0-001f");
406
407 static struct regulator_init_data lp3974_ldo15_data = {
408 .constraints = {
409 .name = "CAM_S_DIG+FM33_CORE_1.2V",
410 .min_uV = 1200000,
411 .max_uV = 1200000,
412 .apply_uV = 1,
413 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
414 .state_mem = {
415 .disabled = 1,
416 },
417 },
418 .num_consumer_supplies = 1,
419 .consumer_supplies = &lp3974_ldo15_consumer,
420 };
421
422 static struct regulator_consumer_supply lp3974_ldo16_consumer[] = {
423 REGULATOR_SUPPLY("vdda", "0-003c"),
424 REGULATOR_SUPPLY("a_sensor", "0-001f"),
425 };
426
427 static struct regulator_init_data lp3974_ldo16_data = {
428 .constraints = {
429 .name = "CAM_S_ANA_2.8V",
430 .min_uV = 2800000,
431 .max_uV = 2800000,
432 .apply_uV = 1,
433 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
434 .state_mem = {
435 .disabled = 1,
436 },
437 },
438 .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo16_consumer),
439 .consumer_supplies = lp3974_ldo16_consumer,
440 };
441
442 static struct regulator_init_data lp3974_ldo17_data = {
443 .constraints = {
444 .name = "VCC_3.0V_LCD",
445 .min_uV = 3000000,
446 .max_uV = 3000000,
447 .apply_uV = 1,
448 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
449 .boot_on = 1,
450 .state_mem = {
451 .disabled = 1,
452 },
453 },
454 };
455
456 static struct regulator_init_data lp3974_32khz_ap_data = {
457 .constraints = {
458 .name = "32KHz AP",
459 .always_on = 1,
460 .state_mem = {
461 .enabled = 1,
462 },
463 },
464 };
465
466 static struct regulator_init_data lp3974_32khz_cp_data = {
467 .constraints = {
468 .name = "32KHz CP",
469 .state_mem = {
470 .disabled = 1,
471 },
472 },
473 };
474
475 static struct regulator_init_data lp3974_vichg_data = {
476 .constraints = {
477 .name = "VICHG",
478 .state_mem = {
479 .disabled = 1,
480 },
481 },
482 };
483
484 static struct regulator_init_data lp3974_esafeout1_data = {
485 .constraints = {
486 .name = "SAFEOUT1",
487 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
488 .state_mem = {
489 .enabled = 1,
490 },
491 },
492 };
493
494 static struct regulator_init_data lp3974_esafeout2_data = {
495 .constraints = {
496 .name = "SAFEOUT2",
497 .boot_on = 1,
498 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
499 .state_mem = {
500 .enabled = 1,
501 },
502 },
503 };
504
505 static struct max8998_regulator_data lp3974_regulators[] = {
506 { MAX8998_LDO2, &lp3974_ldo2_data },
507 { MAX8998_LDO3, &lp3974_ldo3_data },
508 { MAX8998_LDO4, &lp3974_ldo4_data },
509 { MAX8998_LDO5, &lp3974_ldo5_data },
510 { MAX8998_LDO6, &lp3974_ldo6_data },
511 { MAX8998_LDO7, &lp3974_ldo7_data },
512 { MAX8998_LDO8, &lp3974_ldo8_data },
513 { MAX8998_LDO9, &lp3974_ldo9_data },
514 { MAX8998_LDO10, &lp3974_ldo10_data },
515 { MAX8998_LDO11, &lp3974_ldo11_data },
516 { MAX8998_LDO12, &lp3974_ldo12_data },
517 { MAX8998_LDO13, &lp3974_ldo13_data },
518 { MAX8998_LDO14, &lp3974_ldo14_data },
519 { MAX8998_LDO15, &lp3974_ldo15_data },
520 { MAX8998_LDO16, &lp3974_ldo16_data },
521 { MAX8998_LDO17, &lp3974_ldo17_data },
522 { MAX8998_BUCK1, &lp3974_buck1_data },
523 { MAX8998_BUCK2, &lp3974_buck2_data },
524 { MAX8998_BUCK3, &lp3974_buck3_data },
525 { MAX8998_BUCK4, &lp3974_buck4_data },
526 { MAX8998_EN32KHZ_AP, &lp3974_32khz_ap_data },
527 { MAX8998_EN32KHZ_CP, &lp3974_32khz_cp_data },
528 { MAX8998_ENVICHG, &lp3974_vichg_data },
529 { MAX8998_ESAFEOUT1, &lp3974_esafeout1_data },
530 { MAX8998_ESAFEOUT2, &lp3974_esafeout2_data },
531 };
532
533 static struct max8998_platform_data universal_lp3974_pdata = {
534 .num_regulators = ARRAY_SIZE(lp3974_regulators),
535 .regulators = lp3974_regulators,
536 .buck1_voltage1 = 1100000, /* INT */
537 .buck1_voltage2 = 1000000,
538 .buck1_voltage3 = 1100000,
539 .buck1_voltage4 = 1000000,
540 .buck1_set1 = EXYNOS4_GPX0(5),
541 .buck1_set2 = EXYNOS4_GPX0(6),
542 .buck2_voltage1 = 1200000, /* G3D */
543 .buck2_voltage2 = 1100000,
544 .buck1_default_idx = 0,
545 .buck2_set3 = EXYNOS4_GPE2(0),
546 .buck2_default_idx = 0,
547 .wakeup = true,
548 };
549
550
551 enum fixed_regulator_id {
552 FIXED_REG_ID_MMC0,
553 FIXED_REG_ID_HDMI_5V,
554 FIXED_REG_ID_CAM_S_IF,
555 FIXED_REG_ID_CAM_I_CORE,
556 FIXED_REG_ID_CAM_VT_DIO,
557 };
558
559 static struct regulator_consumer_supply hdmi_fixed_consumer =
560 REGULATOR_SUPPLY("hdmi-en", "exynos4-hdmi");
561
562 static struct regulator_init_data hdmi_fixed_voltage_init_data = {
563 .constraints = {
564 .name = "HDMI_5V",
565 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
566 },
567 .num_consumer_supplies = 1,
568 .consumer_supplies = &hdmi_fixed_consumer,
569 };
570
571 static struct fixed_voltage_config hdmi_fixed_voltage_config = {
572 .supply_name = "HDMI_EN1",
573 .microvolts = 5000000,
574 .gpio = EXYNOS4_GPE0(1),
575 .enable_high = true,
576 .init_data = &hdmi_fixed_voltage_init_data,
577 };
578
579 static struct platform_device hdmi_fixed_voltage = {
580 .name = "reg-fixed-voltage",
581 .id = FIXED_REG_ID_HDMI_5V,
582 .dev = {
583 .platform_data = &hdmi_fixed_voltage_config,
584 },
585 };
586
587 /* GPIO I2C 5 (PMIC) */
588 static struct i2c_board_info i2c5_devs[] __initdata = {
589 {
590 I2C_BOARD_INFO("max8952", 0xC0 >> 1),
591 .platform_data = &universal_max8952_pdata,
592 }, {
593 I2C_BOARD_INFO("lp3974", 0xCC >> 1),
594 .platform_data = &universal_lp3974_pdata,
595 },
596 };
597
598 /* I2C3 (TSP) */
599 static struct mxt_platform_data qt602240_platform_data = {
600 .x_line = 19,
601 .y_line = 11,
602 .x_size = 800,
603 .y_size = 480,
604 .blen = 0x11,
605 .threshold = 0x28,
606 .voltage = 2800000, /* 2.8V */
607 .orient = MXT_DIAGONAL,
608 .irqflags = IRQF_TRIGGER_FALLING,
609 };
610
611 static struct i2c_board_info i2c3_devs[] __initdata = {
612 {
613 I2C_BOARD_INFO("qt602240_ts", 0x4a),
614 .platform_data = &qt602240_platform_data,
615 },
616 };
617
618 static void __init universal_tsp_init(void)
619 {
620 int gpio;
621
622 /* TSP_LDO_ON: XMDMADDR_11 */
623 gpio = EXYNOS4_GPE2(3);
624 gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON");
625 gpio_export(gpio, 0);
626
627 /* TSP_INT: XMDMADDR_7 */
628 gpio = EXYNOS4_GPE1(7);
629 gpio_request(gpio, "TSP_INT");
630
631 s5p_register_gpio_interrupt(gpio);
632 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
633 s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
634 i2c3_devs[0].irq = gpio_to_irq(gpio);
635 }
636
637
638 /* GPIO I2C 12 (3 Touchkey) */
639 static uint32_t touchkey_keymap[] = {
640 /* MCS_KEY_MAP(value, keycode) */
641 MCS_KEY_MAP(0, KEY_MENU), /* KEY_SEND */
642 MCS_KEY_MAP(1, KEY_BACK), /* KEY_END */
643 };
644
645 static struct mcs_platform_data touchkey_data = {
646 .keymap = touchkey_keymap,
647 .keymap_size = ARRAY_SIZE(touchkey_keymap),
648 .key_maxval = 2,
649 };
650
651 /* GPIO I2C 3_TOUCH 2.8V */
652 #define I2C_GPIO_BUS_12 12
653 static struct i2c_gpio_platform_data i2c_gpio12_data = {
654 .sda_pin = EXYNOS4_GPE4(0), /* XMDMDATA_8 */
655 .scl_pin = EXYNOS4_GPE4(1), /* XMDMDATA_9 */
656 };
657
658 static struct platform_device i2c_gpio12 = {
659 .name = "i2c-gpio",
660 .id = I2C_GPIO_BUS_12,
661 .dev = {
662 .platform_data = &i2c_gpio12_data,
663 },
664 };
665
666 static struct i2c_board_info i2c_gpio12_devs[] __initdata = {
667 {
668 I2C_BOARD_INFO("mcs5080_touchkey", 0x20),
669 .platform_data = &touchkey_data,
670 },
671 };
672
673 static void __init universal_touchkey_init(void)
674 {
675 int gpio;
676
677 gpio = EXYNOS4_GPE3(7); /* XMDMDATA_7 */
678 gpio_request(gpio, "3_TOUCH_INT");
679 s5p_register_gpio_interrupt(gpio);
680 s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
681 i2c_gpio12_devs[0].irq = gpio_to_irq(gpio);
682
683 gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */
684 gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "3_TOUCH_EN");
685 }
686
687 static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = {
688 .frequency = 300 * 1000,
689 .sda_delay = 200,
690 };
691
692 /* GPIO KEYS */
693 static struct gpio_keys_button universal_gpio_keys_tables[] = {
694 {
695 .code = KEY_VOLUMEUP,
696 .gpio = EXYNOS4_GPX2(0), /* XEINT16 */
697 .desc = "gpio-keys: KEY_VOLUMEUP",
698 .type = EV_KEY,
699 .active_low = 1,
700 .debounce_interval = 1,
701 }, {
702 .code = KEY_VOLUMEDOWN,
703 .gpio = EXYNOS4_GPX2(1), /* XEINT17 */
704 .desc = "gpio-keys: KEY_VOLUMEDOWN",
705 .type = EV_KEY,
706 .active_low = 1,
707 .debounce_interval = 1,
708 }, {
709 .code = KEY_CONFIG,
710 .gpio = EXYNOS4_GPX2(2), /* XEINT18 */
711 .desc = "gpio-keys: KEY_CONFIG",
712 .type = EV_KEY,
713 .active_low = 1,
714 .debounce_interval = 1,
715 }, {
716 .code = KEY_CAMERA,
717 .gpio = EXYNOS4_GPX2(3), /* XEINT19 */
718 .desc = "gpio-keys: KEY_CAMERA",
719 .type = EV_KEY,
720 .active_low = 1,
721 .debounce_interval = 1,
722 }, {
723 .code = KEY_OK,
724 .gpio = EXYNOS4_GPX3(5), /* XEINT29 */
725 .desc = "gpio-keys: KEY_OK",
726 .type = EV_KEY,
727 .active_low = 1,
728 .debounce_interval = 1,
729 },
730 };
731
732 static struct gpio_keys_platform_data universal_gpio_keys_data = {
733 .buttons = universal_gpio_keys_tables,
734 .nbuttons = ARRAY_SIZE(universal_gpio_keys_tables),
735 };
736
737 static struct platform_device universal_gpio_keys = {
738 .name = "gpio-keys",
739 .dev = {
740 .platform_data = &universal_gpio_keys_data,
741 },
742 };
743
744 /* eMMC */
745 static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
746 .max_width = 8,
747 .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
748 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
749 MMC_CAP_DISABLE),
750 .cd_type = S3C_SDHCI_CD_PERMANENT,
751 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
752 };
753
754 static struct regulator_consumer_supply mmc0_supplies[] = {
755 REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
756 };
757
758 static struct regulator_init_data mmc0_fixed_voltage_init_data = {
759 .constraints = {
760 .name = "VMEM_VDD_2.8V",
761 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
762 },
763 .num_consumer_supplies = ARRAY_SIZE(mmc0_supplies),
764 .consumer_supplies = mmc0_supplies,
765 };
766
767 static struct fixed_voltage_config mmc0_fixed_voltage_config = {
768 .supply_name = "MASSMEMORY_EN",
769 .microvolts = 2800000,
770 .gpio = EXYNOS4_GPE1(3),
771 .enable_high = true,
772 .init_data = &mmc0_fixed_voltage_init_data,
773 };
774
775 static struct platform_device mmc0_fixed_voltage = {
776 .name = "reg-fixed-voltage",
777 .id = FIXED_REG_ID_MMC0,
778 .dev = {
779 .platform_data = &mmc0_fixed_voltage_config,
780 },
781 };
782
783 /* SD */
784 static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
785 .max_width = 4,
786 .host_caps = MMC_CAP_4_BIT_DATA |
787 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
788 MMC_CAP_DISABLE,
789 .ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */
790 .ext_cd_gpio_invert = 1,
791 .cd_type = S3C_SDHCI_CD_GPIO,
792 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
793 };
794
795 /* WiFi */
796 static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = {
797 .max_width = 4,
798 .host_caps = MMC_CAP_4_BIT_DATA |
799 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
800 MMC_CAP_DISABLE,
801 .cd_type = S3C_SDHCI_CD_EXTERNAL,
802 };
803
804 static void __init universal_sdhci_init(void)
805 {
806 s3c_sdhci0_set_platdata(&universal_hsmmc0_data);
807 s3c_sdhci2_set_platdata(&universal_hsmmc2_data);
808 s3c_sdhci3_set_platdata(&universal_hsmmc3_data);
809 }
810
811 /* I2C1 */
812 static struct i2c_board_info i2c1_devs[] __initdata = {
813 /* Gyro, To be updated */
814 };
815
816 /* Frame Buffer */
817 static struct s3c_fb_pd_win universal_fb_win0 = {
818 .win_mode = {
819 .left_margin = 16,
820 .right_margin = 16,
821 .upper_margin = 2,
822 .lower_margin = 28,
823 .hsync_len = 2,
824 .vsync_len = 1,
825 .xres = 480,
826 .yres = 800,
827 .refresh = 55,
828 },
829 .max_bpp = 32,
830 .default_bpp = 16,
831 .virtual_x = 480,
832 .virtual_y = 2 * 800,
833 };
834
835 static struct s3c_fb_platdata universal_lcd_pdata __initdata = {
836 .win[0] = &universal_fb_win0,
837 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
838 VIDCON0_CLKSEL_LCD,
839 .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
840 | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
841 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
842 };
843
844 static struct regulator_consumer_supply cam_vt_dio_supply =
845 REGULATOR_SUPPLY("vdd_core", "0-003c");
846
847 static struct regulator_init_data cam_vt_dio_reg_init_data = {
848 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
849 .num_consumer_supplies = 1,
850 .consumer_supplies = &cam_vt_dio_supply,
851 };
852
853 static struct fixed_voltage_config cam_vt_dio_fixed_voltage_cfg = {
854 .supply_name = "CAM_VT_D_IO",
855 .microvolts = 2800000,
856 .gpio = EXYNOS4_GPE2(1), /* CAM_PWR_EN2 */
857 .enable_high = 1,
858 .init_data = &cam_vt_dio_reg_init_data,
859 };
860
861 static struct platform_device cam_vt_dio_fixed_reg_dev = {
862 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_VT_DIO,
863 .dev = { .platform_data = &cam_vt_dio_fixed_voltage_cfg },
864 };
865
866 static struct regulator_consumer_supply cam_i_core_supply =
867 REGULATOR_SUPPLY("core", "0-001f");
868
869 static struct regulator_init_data cam_i_core_reg_init_data = {
870 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
871 .num_consumer_supplies = 1,
872 .consumer_supplies = &cam_i_core_supply,
873 };
874
875 static struct fixed_voltage_config cam_i_core_fixed_voltage_cfg = {
876 .supply_name = "CAM_I_CORE_1.2V",
877 .microvolts = 1200000,
878 .gpio = EXYNOS4_GPE2(2), /* CAM_8M_CORE_EN */
879 .enable_high = 1,
880 .init_data = &cam_i_core_reg_init_data,
881 };
882
883 static struct platform_device cam_i_core_fixed_reg_dev = {
884 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_I_CORE,
885 .dev = { .platform_data = &cam_i_core_fixed_voltage_cfg },
886 };
887
888 static struct regulator_consumer_supply cam_s_if_supply =
889 REGULATOR_SUPPLY("d_sensor", "0-001f");
890
891 static struct regulator_init_data cam_s_if_reg_init_data = {
892 .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
893 .num_consumer_supplies = 1,
894 .consumer_supplies = &cam_s_if_supply,
895 };
896
897 static struct fixed_voltage_config cam_s_if_fixed_voltage_cfg = {
898 .supply_name = "CAM_S_IF_1.8V",
899 .microvolts = 1800000,
900 .gpio = EXYNOS4_GPE3(0), /* CAM_PWR_EN1 */
901 .enable_high = 1,
902 .init_data = &cam_s_if_reg_init_data,
903 };
904
905 static struct platform_device cam_s_if_fixed_reg_dev = {
906 .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_S_IF,
907 .dev = { .platform_data = &cam_s_if_fixed_voltage_cfg },
908 };
909
910 static struct s5p_platform_mipi_csis mipi_csis_platdata = {
911 .clk_rate = 166000000UL,
912 .lanes = 2,
913 .alignment = 32,
914 .hs_settle = 12,
915 .phy_enable = s5p_csis_phy_enable,
916 };
917
918 #define GPIO_CAM_LEVEL_EN(n) EXYNOS4_GPE4(n + 3)
919 #define GPIO_CAM_8M_ISP_INT EXYNOS4_GPX1(5) /* XEINT_13 */
920 #define GPIO_CAM_MEGA_nRST EXYNOS4_GPE2(5)
921 #define GPIO_CAM_VGA_NRST EXYNOS4_GPE4(7)
922 #define GPIO_CAM_VGA_NSTBY EXYNOS4_GPE4(6)
923
924 static int s5k6aa_set_power(int on)
925 {
926 gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
927 return 0;
928 }
929
930 static struct s5k6aa_platform_data s5k6aa_platdata = {
931 .mclk_frequency = 21600000UL,
932 .gpio_reset = { GPIO_CAM_VGA_NRST, 0 },
933 .gpio_stby = { GPIO_CAM_VGA_NSTBY, 0 },
934 .bus_type = V4L2_MBUS_PARALLEL,
935 .horiz_flip = 1,
936 .set_power = s5k6aa_set_power,
937 };
938
939 static struct i2c_board_info s5k6aa_board_info = {
940 I2C_BOARD_INFO("S5K6AA", 0x3C),
941 .platform_data = &s5k6aa_platdata,
942 };
943
944 static int m5mols_set_power(struct device *dev, int on)
945 {
946 gpio_set_value(GPIO_CAM_LEVEL_EN(1), !on);
947 gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
948 return 0;
949 }
950
951 static struct m5mols_platform_data m5mols_platdata = {
952 .gpio_reset = GPIO_CAM_MEGA_nRST,
953 .reset_polarity = 0,
954 .set_power = m5mols_set_power,
955 };
956
957 static struct i2c_board_info m5mols_board_info = {
958 I2C_BOARD_INFO("M5MOLS", 0x1F),
959 .platform_data = &m5mols_platdata,
960 };
961
962 static struct s5p_fimc_isp_info universal_camera_sensors[] = {
963 {
964 .mux_id = 0,
965 .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
966 V4L2_MBUS_VSYNC_ACTIVE_LOW,
967 .bus_type = FIMC_ITU_601,
968 .board_info = &s5k6aa_board_info,
969 .i2c_bus_num = 0,
970 .clk_frequency = 24000000UL,
971 }, {
972 .mux_id = 0,
973 .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
974 V4L2_MBUS_VSYNC_ACTIVE_LOW,
975 .bus_type = FIMC_MIPI_CSI2,
976 .board_info = &m5mols_board_info,
977 .i2c_bus_num = 0,
978 .clk_frequency = 24000000UL,
979 .csi_data_align = 32,
980 },
981 };
982
983 static struct s5p_platform_fimc fimc_md_platdata = {
984 .isp_info = universal_camera_sensors,
985 .num_clients = ARRAY_SIZE(universal_camera_sensors),
986 };
987
988 static struct gpio universal_camera_gpios[] = {
989 { GPIO_CAM_LEVEL_EN(1), GPIOF_OUT_INIT_HIGH, "CAM_LVL_EN1" },
990 { GPIO_CAM_LEVEL_EN(2), GPIOF_OUT_INIT_LOW, "CAM_LVL_EN2" },
991 { GPIO_CAM_8M_ISP_INT, GPIOF_IN, "8M_ISP_INT" },
992 { GPIO_CAM_MEGA_nRST, GPIOF_OUT_INIT_LOW, "CAM_8M_NRST" },
993 { GPIO_CAM_VGA_NRST, GPIOF_OUT_INIT_LOW, "CAM_VGA_NRST" },
994 { GPIO_CAM_VGA_NSTBY, GPIOF_OUT_INIT_LOW, "CAM_VGA_NSTBY" },
995 };
996
997 static void __init universal_camera_init(void)
998 {
999 s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata),
1000 &s5p_device_mipi_csis0);
1001 s3c_set_platdata(&fimc_md_platdata, sizeof(fimc_md_platdata),
1002 &s5p_device_fimc_md);
1003
1004 if (gpio_request_array(universal_camera_gpios,
1005 ARRAY_SIZE(universal_camera_gpios))) {
1006 pr_err("%s: GPIO request failed\n", __func__);
1007 return;
1008 }
1009
1010 if (!s3c_gpio_cfgpin(GPIO_CAM_8M_ISP_INT, S3C_GPIO_SFN(0xf)))
1011 m5mols_board_info.irq = gpio_to_irq(GPIO_CAM_8M_ISP_INT);
1012 else
1013 pr_err("Failed to configure 8M_ISP_INT GPIO\n");
1014
1015 /* Free GPIOs controlled directly by the sensor drivers. */
1016 gpio_free(GPIO_CAM_MEGA_nRST);
1017 gpio_free(GPIO_CAM_8M_ISP_INT);
1018 gpio_free(GPIO_CAM_VGA_NRST);
1019 gpio_free(GPIO_CAM_VGA_NSTBY);
1020
1021 if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A))
1022 pr_err("Camera port A setup failed\n");
1023 }
1024
1025 static struct platform_device *universal_devices[] __initdata = {
1026 /* Samsung Platform Devices */
1027 &s5p_device_mipi_csis0,
1028 &s5p_device_fimc0,
1029 &s5p_device_fimc1,
1030 &s5p_device_fimc2,
1031 &s5p_device_fimc3,
1032 &s5p_device_g2d,
1033 &mmc0_fixed_voltage,
1034 &s3c_device_hsmmc0,
1035 &s3c_device_hsmmc2,
1036 &s3c_device_hsmmc3,
1037 &s3c_device_i2c0,
1038 &s3c_device_i2c3,
1039 &s3c_device_i2c5,
1040 &s5p_device_i2c_hdmiphy,
1041 &hdmi_fixed_voltage,
1042 &exynos4_device_pd[PD_TV],
1043 &s5p_device_hdmi,
1044 &s5p_device_sdo,
1045 &s5p_device_mixer,
1046
1047 /* Universal Devices */
1048 &i2c_gpio12,
1049 &universal_gpio_keys,
1050 &s5p_device_onenand,
1051 &s5p_device_fimd0,
1052 &s5p_device_jpeg,
1053 &s5p_device_mfc,
1054 &s5p_device_mfc_l,
1055 &s5p_device_mfc_r,
1056 &exynos4_device_pd[PD_MFC],
1057 &exynos4_device_pd[PD_LCD0],
1058 &exynos4_device_pd[PD_CAM],
1059 &cam_vt_dio_fixed_reg_dev,
1060 &cam_i_core_fixed_reg_dev,
1061 &cam_s_if_fixed_reg_dev,
1062 &s5p_device_fimc_md,
1063 };
1064
1065 static void __init universal_map_io(void)
1066 {
1067 exynos_init_io(NULL, 0);
1068 s3c24xx_init_clocks(24000000);
1069 s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
1070 }
1071
1072 void s5p_tv_setup(void)
1073 {
1074 /* direct HPD to HDMI chip */
1075 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
1076 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
1077 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
1078
1079 /* setup dependencies between TV devices */
1080 s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev;
1081 s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev;
1082 }
1083
1084 static void __init universal_reserve(void)
1085 {
1086 s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
1087 }
1088
1089 static void __init universal_machine_init(void)
1090 {
1091 universal_sdhci_init();
1092 s5p_tv_setup();
1093
1094 s3c_i2c0_set_platdata(&universal_i2c0_platdata);
1095 i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
1096
1097 universal_tsp_init();
1098 s3c_i2c3_set_platdata(NULL);
1099 i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs));
1100
1101 s3c_i2c5_set_platdata(NULL);
1102 s5p_i2c_hdmiphy_set_platdata(NULL);
1103 i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
1104
1105 s5p_fimd0_set_platdata(&universal_lcd_pdata);
1106
1107 universal_touchkey_init();
1108 i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs,
1109 ARRAY_SIZE(i2c_gpio12_devs));
1110
1111 universal_camera_init();
1112
1113 /* Last */
1114 platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices));
1115
1116 s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
1117 s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev;
1118
1119 s5p_device_fimc0.dev.parent = &exynos4_device_pd[PD_CAM].dev;
1120 s5p_device_fimc1.dev.parent = &exynos4_device_pd[PD_CAM].dev;
1121 s5p_device_fimc2.dev.parent = &exynos4_device_pd[PD_CAM].dev;
1122 s5p_device_fimc3.dev.parent = &exynos4_device_pd[PD_CAM].dev;
1123 s5p_device_mipi_csis0.dev.parent = &exynos4_device_pd[PD_CAM].dev;
1124 }
1125
1126 MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
1127 /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
1128 .atag_offset = 0x100,
1129 .init_irq = exynos4_init_irq,
1130 .map_io = universal_map_io,
1131 .handle_irq = gic_handle_irq,
1132 .init_machine = universal_machine_init,
1133 .timer = &exynos4_timer,
1134 .reserve = &universal_reserve,
1135 .restart = exynos4_restart,
1136 MACHINE_END
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