1 /* linux/arch/arm/mach-exynos4/mach-origen.c
3 * Copyright (c) 2011 Insignal Co., Ltd.
4 * http://www.insignal.co.kr/
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/serial_core.h>
12 #include <linux/gpio.h>
13 #include <linux/mmc/host.h>
14 #include <linux/platform_device.h>
16 #include <linux/input.h>
17 #include <linux/pwm_backlight.h>
18 #include <linux/gpio_keys.h>
19 #include <linux/i2c.h>
20 #include <linux/regulator/machine.h>
21 #include <linux/mfd/max8997.h>
22 #include <linux/lcd.h>
24 #include <asm/mach/arch.h>
25 #include <asm/mach-types.h>
27 #include <video/platform_lcd.h>
29 #include <plat/regs-serial.h>
30 #include <plat/regs-fb-v4.h>
31 #include <plat/exynos4.h>
33 #include <plat/devs.h>
34 #include <plat/sdhci.h>
36 #include <plat/ehci.h>
37 #include <plat/clock.h>
38 #include <plat/gpio-cfg.h>
39 #include <plat/backlight.h>
45 /* Following are default values for UCON, ULCON and UFCON UART registers */
46 #define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
47 S3C2410_UCON_RXILEVEL | \
48 S3C2410_UCON_TXIRQMODE | \
49 S3C2410_UCON_RXIRQMODE | \
50 S3C2410_UCON_RXFIFO_TOI | \
51 S3C2443_UCON_RXERR_IRQEN)
53 #define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8
55 #define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
56 S5PV210_UFCON_TXTRIG4 | \
57 S5PV210_UFCON_RXTRIG4)
59 static struct s3c2410_uartcfg origen_uartcfgs
[] __initdata
= {
63 .ucon
= ORIGEN_UCON_DEFAULT
,
64 .ulcon
= ORIGEN_ULCON_DEFAULT
,
65 .ufcon
= ORIGEN_UFCON_DEFAULT
,
70 .ucon
= ORIGEN_UCON_DEFAULT
,
71 .ulcon
= ORIGEN_ULCON_DEFAULT
,
72 .ufcon
= ORIGEN_UFCON_DEFAULT
,
77 .ucon
= ORIGEN_UCON_DEFAULT
,
78 .ulcon
= ORIGEN_ULCON_DEFAULT
,
79 .ufcon
= ORIGEN_UFCON_DEFAULT
,
84 .ucon
= ORIGEN_UCON_DEFAULT
,
85 .ulcon
= ORIGEN_ULCON_DEFAULT
,
86 .ufcon
= ORIGEN_UFCON_DEFAULT
,
90 static struct regulator_consumer_supply __initdata ldo3_consumer
[] = {
91 REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), /* MIPI */
93 static struct regulator_consumer_supply __initdata ldo6_consumer
[] = {
94 REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"), /* MIPI */
96 static struct regulator_consumer_supply __initdata ldo7_consumer
[] = {
97 REGULATOR_SUPPLY("avdd", "alc5625"), /* Realtek ALC5625 */
99 static struct regulator_consumer_supply __initdata ldo8_consumer
[] = {
100 REGULATOR_SUPPLY("vdd", "s5p-adc"), /* ADC */
102 static struct regulator_consumer_supply __initdata ldo9_consumer
[] = {
103 REGULATOR_SUPPLY("dvdd", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
105 static struct regulator_consumer_supply __initdata ldo11_consumer
[] = {
106 REGULATOR_SUPPLY("dvdd", "alc5625"), /* Realtek ALC5625 */
108 static struct regulator_consumer_supply __initdata ldo14_consumer
[] = {
109 REGULATOR_SUPPLY("avdd18", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
111 static struct regulator_consumer_supply __initdata ldo17_consumer
[] = {
112 REGULATOR_SUPPLY("vdd33", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
114 static struct regulator_consumer_supply __initdata buck1_consumer
[] = {
115 REGULATOR_SUPPLY("vdd_arm", NULL
), /* CPUFREQ */
117 static struct regulator_consumer_supply __initdata buck2_consumer
[] = {
118 REGULATOR_SUPPLY("vdd_int", NULL
), /* CPUFREQ */
120 static struct regulator_consumer_supply __initdata buck3_consumer
[] = {
121 REGULATOR_SUPPLY("vdd_g3d", "mali_drm"), /* G3D */
123 static struct regulator_consumer_supply __initdata buck7_consumer
[] = {
124 REGULATOR_SUPPLY("vcc", "platform-lcd"), /* LCD */
127 static struct regulator_init_data __initdata max8997_ldo1_data
= {
129 .name
= "VDD_ABB_3.3V",
139 static struct regulator_init_data __initdata max8997_ldo2_data
= {
141 .name
= "VDD_ALIVE_1.1V",
152 static struct regulator_init_data __initdata max8997_ldo3_data
= {
154 .name
= "VMIPI_1.1V",
158 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
163 .num_consumer_supplies
= ARRAY_SIZE(ldo3_consumer
),
164 .consumer_supplies
= ldo3_consumer
,
167 static struct regulator_init_data __initdata max8997_ldo4_data
= {
169 .name
= "VDD_RTC_1.8V",
180 static struct regulator_init_data __initdata max8997_ldo6_data
= {
182 .name
= "VMIPI_1.8V",
186 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
191 .num_consumer_supplies
= ARRAY_SIZE(ldo6_consumer
),
192 .consumer_supplies
= ldo6_consumer
,
195 static struct regulator_init_data __initdata max8997_ldo7_data
= {
197 .name
= "VDD_AUD_1.8V",
201 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
206 .num_consumer_supplies
= ARRAY_SIZE(ldo7_consumer
),
207 .consumer_supplies
= ldo7_consumer
,
210 static struct regulator_init_data __initdata max8997_ldo8_data
= {
216 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
221 .num_consumer_supplies
= ARRAY_SIZE(ldo8_consumer
),
222 .consumer_supplies
= ldo8_consumer
,
225 static struct regulator_init_data __initdata max8997_ldo9_data
= {
227 .name
= "DVDD_SWB_2.8V",
231 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
236 .num_consumer_supplies
= ARRAY_SIZE(ldo9_consumer
),
237 .consumer_supplies
= ldo9_consumer
,
240 static struct regulator_init_data __initdata max8997_ldo10_data
= {
242 .name
= "VDD_PLL_1.1V",
253 static struct regulator_init_data __initdata max8997_ldo11_data
= {
255 .name
= "VDD_AUD_3V",
259 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
264 .num_consumer_supplies
= ARRAY_SIZE(ldo11_consumer
),
265 .consumer_supplies
= ldo11_consumer
,
268 static struct regulator_init_data __initdata max8997_ldo14_data
= {
270 .name
= "AVDD18_SWB_1.8V",
274 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
279 .num_consumer_supplies
= ARRAY_SIZE(ldo14_consumer
),
280 .consumer_supplies
= ldo14_consumer
,
283 static struct regulator_init_data __initdata max8997_ldo17_data
= {
285 .name
= "VDD_SWB_3.3V",
289 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
294 .num_consumer_supplies
= ARRAY_SIZE(ldo17_consumer
),
295 .consumer_supplies
= ldo17_consumer
,
298 static struct regulator_init_data __initdata max8997_ldo21_data
= {
300 .name
= "VDD_MIF_1.2V",
311 static struct regulator_init_data __initdata max8997_buck1_data
= {
313 .name
= "VDD_ARM_1.2V",
318 .valid_ops_mask
= REGULATOR_CHANGE_VOLTAGE
,
323 .num_consumer_supplies
= ARRAY_SIZE(buck1_consumer
),
324 .consumer_supplies
= buck1_consumer
,
327 static struct regulator_init_data __initdata max8997_buck2_data
= {
329 .name
= "VDD_INT_1.1V",
334 .valid_ops_mask
= REGULATOR_CHANGE_VOLTAGE
,
339 .num_consumer_supplies
= ARRAY_SIZE(buck2_consumer
),
340 .consumer_supplies
= buck2_consumer
,
343 static struct regulator_init_data __initdata max8997_buck3_data
= {
345 .name
= "VDD_G3D_1.1V",
348 .valid_ops_mask
= REGULATOR_CHANGE_VOLTAGE
|
349 REGULATOR_CHANGE_STATUS
,
354 .num_consumer_supplies
= ARRAY_SIZE(buck3_consumer
),
355 .consumer_supplies
= buck3_consumer
,
358 static struct regulator_init_data __initdata max8997_buck5_data
= {
360 .name
= "VDDQ_M1M2_1.2V",
371 static struct regulator_init_data __initdata max8997_buck7_data
= {
373 .name
= "VDD_LCD_3.3V",
378 .valid_ops_mask
= REGULATOR_CHANGE_STATUS
,
383 .num_consumer_supplies
= ARRAY_SIZE(buck7_consumer
),
384 .consumer_supplies
= buck7_consumer
,
387 static struct max8997_regulator_data __initdata origen_max8997_regulators
[] = {
388 { MAX8997_LDO1
, &max8997_ldo1_data
},
389 { MAX8997_LDO2
, &max8997_ldo2_data
},
390 { MAX8997_LDO3
, &max8997_ldo3_data
},
391 { MAX8997_LDO4
, &max8997_ldo4_data
},
392 { MAX8997_LDO6
, &max8997_ldo6_data
},
393 { MAX8997_LDO7
, &max8997_ldo7_data
},
394 { MAX8997_LDO8
, &max8997_ldo8_data
},
395 { MAX8997_LDO9
, &max8997_ldo9_data
},
396 { MAX8997_LDO10
, &max8997_ldo10_data
},
397 { MAX8997_LDO11
, &max8997_ldo11_data
},
398 { MAX8997_LDO14
, &max8997_ldo14_data
},
399 { MAX8997_LDO17
, &max8997_ldo17_data
},
400 { MAX8997_LDO21
, &max8997_ldo21_data
},
401 { MAX8997_BUCK1
, &max8997_buck1_data
},
402 { MAX8997_BUCK2
, &max8997_buck2_data
},
403 { MAX8997_BUCK3
, &max8997_buck3_data
},
404 { MAX8997_BUCK5
, &max8997_buck5_data
},
405 { MAX8997_BUCK7
, &max8997_buck7_data
},
408 struct max8997_platform_data __initdata origen_max8997_pdata
= {
409 .num_regulators
= ARRAY_SIZE(origen_max8997_regulators
),
410 .regulators
= origen_max8997_regulators
,
413 .buck1_gpiodvs
= false,
414 .buck2_gpiodvs
= false,
415 .buck5_gpiodvs
= false,
416 .irq_base
= IRQ_GPIO_END
+ 1,
418 .ignore_gpiodvs_side_effect
= true,
419 .buck125_default_idx
= 0x0,
421 .buck125_gpios
[0] = EXYNOS4_GPX0(0),
422 .buck125_gpios
[1] = EXYNOS4_GPX0(1),
423 .buck125_gpios
[2] = EXYNOS4_GPX0(2),
425 .buck1_voltage
[0] = 1350000,
426 .buck1_voltage
[1] = 1300000,
427 .buck1_voltage
[2] = 1250000,
428 .buck1_voltage
[3] = 1200000,
429 .buck1_voltage
[4] = 1150000,
430 .buck1_voltage
[5] = 1100000,
431 .buck1_voltage
[6] = 1000000,
432 .buck1_voltage
[7] = 950000,
434 .buck2_voltage
[0] = 1100000,
435 .buck2_voltage
[1] = 1100000,
436 .buck2_voltage
[2] = 1100000,
437 .buck2_voltage
[3] = 1100000,
438 .buck2_voltage
[4] = 1000000,
439 .buck2_voltage
[5] = 1000000,
440 .buck2_voltage
[6] = 1000000,
441 .buck2_voltage
[7] = 1000000,
443 .buck5_voltage
[0] = 1200000,
444 .buck5_voltage
[1] = 1200000,
445 .buck5_voltage
[2] = 1200000,
446 .buck5_voltage
[3] = 1200000,
447 .buck5_voltage
[4] = 1200000,
448 .buck5_voltage
[5] = 1200000,
449 .buck5_voltage
[6] = 1200000,
450 .buck5_voltage
[7] = 1200000,
454 static struct i2c_board_info i2c0_devs
[] __initdata
= {
456 I2C_BOARD_INFO("max8997", (0xCC >> 1)),
457 .platform_data
= &origen_max8997_pdata
,
462 static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata
= {
463 .cd_type
= S3C_SDHCI_CD_INTERNAL
,
464 .clk_type
= S3C_SDHCI_CLK_DIV_EXTERNAL
,
467 static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata
= {
468 .cd_type
= S3C_SDHCI_CD_INTERNAL
,
469 .clk_type
= S3C_SDHCI_CLK_DIV_EXTERNAL
,
473 static struct s5p_ehci_platdata origen_ehci_pdata
;
475 static void __init
origen_ehci_init(void)
477 struct s5p_ehci_platdata
*pdata
= &origen_ehci_pdata
;
479 s5p_ehci_set_platdata(pdata
);
482 static struct gpio_keys_button origen_gpio_keys_table
[] = {
485 .gpio
= EXYNOS4_GPX1(5),
486 .desc
= "gpio-keys: KEY_MENU",
490 .debounce_interval
= 1,
493 .gpio
= EXYNOS4_GPX1(6),
494 .desc
= "gpio-keys: KEY_HOME",
498 .debounce_interval
= 1,
501 .gpio
= EXYNOS4_GPX1(7),
502 .desc
= "gpio-keys: KEY_BACK",
506 .debounce_interval
= 1,
509 .gpio
= EXYNOS4_GPX2(0),
510 .desc
= "gpio-keys: KEY_UP",
514 .debounce_interval
= 1,
517 .gpio
= EXYNOS4_GPX2(1),
518 .desc
= "gpio-keys: KEY_DOWN",
522 .debounce_interval
= 1,
526 static struct gpio_keys_platform_data origen_gpio_keys_data
= {
527 .buttons
= origen_gpio_keys_table
,
528 .nbuttons
= ARRAY_SIZE(origen_gpio_keys_table
),
531 static struct platform_device origen_device_gpiokeys
= {
534 .platform_data
= &origen_gpio_keys_data
,
538 static void lcd_hv070wsa_set_power(struct plat_lcd_data
*pd
, unsigned int power
)
543 ret
= gpio_request_one(EXYNOS4_GPE3(4),
544 GPIOF_OUT_INIT_HIGH
, "GPE3_4");
546 ret
= gpio_request_one(EXYNOS4_GPE3(4),
547 GPIOF_OUT_INIT_LOW
, "GPE3_4");
549 gpio_free(EXYNOS4_GPE3(4));
552 pr_err("failed to request gpio for LCD power: %d\n", ret
);
555 static struct plat_lcd_data origen_lcd_hv070wsa_data
= {
556 .set_power
= lcd_hv070wsa_set_power
,
559 static struct platform_device origen_lcd_hv070wsa
= {
560 .name
= "platform-lcd",
561 .dev
.parent
= &s5p_device_fimd0
.dev
,
562 .dev
.platform_data
= &origen_lcd_hv070wsa_data
,
565 static struct s3c_fb_pd_win origen_fb_win0
= {
580 static struct s3c_fb_platdata origen_lcd_pdata __initdata
= {
581 .win
[0] = &origen_fb_win0
,
582 .vidcon0
= VIDCON0_VIDOUT_RGB
| VIDCON0_PNRMODE_RGB
,
583 .vidcon1
= VIDCON1_INV_HSYNC
| VIDCON1_INV_VSYNC
,
584 .setup_gpio
= exynos4_fimd0_gpio_setup_24bpp
,
587 static struct platform_device
*origen_devices
[] __initdata
= {
600 &s5p_device_i2c_hdmiphy
,
602 &exynos4_device_pd
[PD_LCD0
],
603 &exynos4_device_pd
[PD_TV
],
604 &origen_device_gpiokeys
,
605 &origen_lcd_hv070wsa
,
608 /* LCD Backlight data */
609 static struct samsung_bl_gpio_info origen_bl_gpio_info
= {
610 .no
= EXYNOS4_GPD0(0),
611 .func
= S3C_GPIO_SFN(2),
614 static struct platform_pwm_backlight_data origen_bl_data
= {
616 .pwm_period_ns
= 1000,
619 static void s5p_tv_setup(void)
621 /* Direct HPD to HDMI chip */
622 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN
, "hpd-plug");
623 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
624 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE
);
627 static void __init
origen_map_io(void)
629 s5p_init_io(NULL
, 0, S5P_VA_CHIPID
);
630 s3c24xx_init_clocks(24000000);
631 s3c24xx_init_uarts(origen_uartcfgs
, ARRAY_SIZE(origen_uartcfgs
));
634 static void __init
origen_power_init(void)
636 gpio_request(EXYNOS4_GPX0(4), "PMIC_IRQ");
637 s3c_gpio_cfgpin(EXYNOS4_GPX0(4), S3C_GPIO_SFN(0xf));
638 s3c_gpio_setpull(EXYNOS4_GPX0(4), S3C_GPIO_PULL_NONE
);
641 static void __init
origen_machine_init(void)
645 s3c_i2c0_set_platdata(NULL
);
646 i2c_register_board_info(0, i2c0_devs
, ARRAY_SIZE(i2c0_devs
));
649 * Since sdhci instance 2 can contain a bootable media,
650 * sdhci instance 0 is registered after instance 2.
652 s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata
);
653 s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata
);
656 clk_xusbxti
.rate
= 24000000;
659 s5p_i2c_hdmiphy_set_platdata(NULL
);
661 s5p_fimd0_set_platdata(&origen_lcd_pdata
);
663 platform_add_devices(origen_devices
, ARRAY_SIZE(origen_devices
));
664 s5p_device_fimd0
.dev
.parent
= &exynos4_device_pd
[PD_LCD0
].dev
;
666 s5p_device_hdmi
.dev
.parent
= &exynos4_device_pd
[PD_TV
].dev
;
667 s5p_device_mixer
.dev
.parent
= &exynos4_device_pd
[PD_TV
].dev
;
669 samsung_bl_set(&origen_bl_gpio_info
, &origen_bl_data
);
672 MACHINE_START(ORIGEN
, "ORIGEN")
673 /* Maintainer: JeongHyeon Kim <jhkim@insignal.co.kr> */
674 .boot_params
= S5P_PA_SDRAM
+ 0x100,
675 .init_irq
= exynos4_init_irq
,
676 .map_io
= origen_map_io
,
677 .init_machine
= origen_machine_init
,
678 .timer
= &exynos4_timer
,