Merge branch 'imx/pinctrl' into imx/dt
[deliverable/linux.git] / arch / arm / mach-imx / imx53-dt.c
1 /*
2 * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13 #include <linux/clk.h>
14 #include <linux/clkdev.h>
15 #include <linux/err.h>
16 #include <linux/io.h>
17 #include <linux/irq.h>
18 #include <linux/irqdomain.h>
19 #include <linux/of_irq.h>
20 #include <linux/of_platform.h>
21 #include <linux/pinctrl/machine.h>
22 #include <asm/mach/arch.h>
23 #include <asm/mach/time.h>
24 #include <mach/common.h>
25 #include <mach/mx53.h>
26
27 /*
28 * Lookup table for attaching a specific name and platform_data pointer to
29 * devices as they get created by of_platform_populate(). Ideally this table
30 * would not exist, but the current clock implementation depends on some devices
31 * having a specific name.
32 */
33 static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = {
34 OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART1_BASE_ADDR, "imx21-uart.0", NULL),
35 OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART2_BASE_ADDR, "imx21-uart.1", NULL),
36 OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART3_BASE_ADDR, "imx21-uart.2", NULL),
37 OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART4_BASE_ADDR, "imx21-uart.3", NULL),
38 OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART5_BASE_ADDR, "imx21-uart.4", NULL),
39 OF_DEV_AUXDATA("fsl,imx53-fec", MX53_FEC_BASE_ADDR, "imx25-fec.0", NULL),
40 OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC1_BASE_ADDR, "sdhci-esdhc-imx53.0", NULL),
41 OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC2_BASE_ADDR, "sdhci-esdhc-imx53.1", NULL),
42 OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC3_BASE_ADDR, "sdhci-esdhc-imx53.2", NULL),
43 OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC4_BASE_ADDR, "sdhci-esdhc-imx53.3", NULL),
44 OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL),
45 OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL),
46 OF_DEV_AUXDATA("fsl,imx53-cspi", MX53_CSPI_BASE_ADDR, "imx35-cspi.0", NULL),
47 OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C1_BASE_ADDR, "imx-i2c.0", NULL),
48 OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C2_BASE_ADDR, "imx-i2c.1", NULL),
49 OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C3_BASE_ADDR, "imx-i2c.2", NULL),
50 OF_DEV_AUXDATA("fsl,imx53-sdma", MX53_SDMA_BASE_ADDR, "imx35-sdma", NULL),
51 OF_DEV_AUXDATA("fsl,imx53-wdt", MX53_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL),
52 { /* sentinel */ }
53 };
54
55 static int __init imx53_tzic_add_irq_domain(struct device_node *np,
56 struct device_node *interrupt_parent)
57 {
58 irq_domain_add_legacy(np, 128, 0, 0, &irq_domain_simple_ops, NULL);
59 return 0;
60 }
61
62 static int __init imx53_gpio_add_irq_domain(struct device_node *np,
63 struct device_node *interrupt_parent)
64 {
65 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
66
67 gpio_irq_base -= 32;
68 irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops, NULL);
69
70 return 0;
71 }
72
73 static const struct of_device_id imx53_irq_match[] __initconst = {
74 { .compatible = "fsl,imx53-tzic", .data = imx53_tzic_add_irq_domain, },
75 { .compatible = "fsl,imx53-gpio", .data = imx53_gpio_add_irq_domain, },
76 { /* sentinel */ }
77 };
78
79 static const struct of_device_id imx53_iomuxc_of_match[] __initconst = {
80 { .compatible = "fsl,imx53-iomuxc-ard", .data = imx53_ard_common_init, },
81 { .compatible = "fsl,imx53-iomuxc-evk", .data = imx53_evk_common_init, },
82 { .compatible = "fsl,imx53-iomuxc-qsb", .data = imx53_qsb_common_init, },
83 { .compatible = "fsl,imx53-iomuxc-smd", .data = imx53_smd_common_init, },
84 { /* sentinel */ }
85 };
86
87 static void __init imx53_qsb_init(void)
88 {
89 struct clk *clk;
90
91 clk = clk_get_sys(NULL, "ssi_ext1");
92 if (IS_ERR(clk)) {
93 pr_err("failed to get clk ssi_ext1\n");
94 return;
95 }
96
97 clk_register_clkdev(clk, NULL, "0-000a");
98 }
99
100 static void __init imx53_dt_init(void)
101 {
102 struct device_node *node;
103 const struct of_device_id *of_id;
104 void (*func)(void);
105
106 of_irq_init(imx53_irq_match);
107
108 pinctrl_provide_dummies();
109
110 node = of_find_matching_node(NULL, imx53_iomuxc_of_match);
111 if (node) {
112 of_id = of_match_node(imx53_iomuxc_of_match, node);
113 func = of_id->data;
114 func();
115 of_node_put(node);
116 }
117
118 if (of_machine_is_compatible("fsl,imx53-qsb"))
119 imx53_qsb_init();
120
121 of_platform_populate(NULL, of_default_bus_match_table,
122 imx53_auxdata_lookup, NULL);
123 }
124
125 static void __init imx53_timer_init(void)
126 {
127 mx53_clocks_init_dt();
128 }
129
130 static struct sys_timer imx53_timer = {
131 .init = imx53_timer_init,
132 };
133
134 static const char *imx53_dt_board_compat[] __initdata = {
135 "fsl,imx53-ard",
136 "fsl,imx53-evk",
137 "fsl,imx53-qsb",
138 "fsl,imx53-smd",
139 "fsl,imx53",
140 NULL
141 };
142
143 DT_MACHINE_START(IMX53_DT, "Freescale i.MX53 (Device Tree Support)")
144 .map_io = mx53_map_io,
145 .init_early = imx53_init_early,
146 .init_irq = mx53_init_irq,
147 .handle_irq = imx53_handle_irq,
148 .timer = &imx53_timer,
149 .init_machine = imx53_dt_init,
150 .dt_compat = imx53_dt_board_compat,
151 .restart = mxc_restart,
152 MACHINE_END
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