9ae5bed90ed86e617b996da99872ab03b35b2687
[deliverable/linux.git] / arch / arm / mach-imx / mach-cpuimx27.c
1 /*
2 * Copyright (C) 2009 Eric Benard - eric@eukrea.com
3 *
4 * Based on pcm038.c which is :
5 * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
6 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version 2
11 * of the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
20 * MA 02110-1301, USA.
21 */
22
23 #include <linux/i2c.h>
24 #include <linux/io.h>
25 #include <linux/mtd/plat-ram.h>
26 #include <linux/mtd/physmap.h>
27 #include <linux/platform_device.h>
28 #include <linux/serial_8250.h>
29 #include <linux/usb/otg.h>
30 #include <linux/usb/ulpi.h>
31
32 #include <asm/mach-types.h>
33 #include <asm/mach/arch.h>
34 #include <asm/mach/time.h>
35 #include <asm/mach/map.h>
36
37 #include <mach/eukrea-baseboards.h>
38 #include <mach/common.h>
39 #include <mach/hardware.h>
40 #include <mach/iomux-mx27.h>
41 #include <mach/mxc_nand.h>
42 #include <mach/ulpi.h>
43
44 #include "devices-imx27.h"
45 #include "devices.h"
46
47 static const int eukrea_cpuimx27_pins[] __initconst = {
48 /* UART1 */
49 PE12_PF_UART1_TXD,
50 PE13_PF_UART1_RXD,
51 PE14_PF_UART1_CTS,
52 PE15_PF_UART1_RTS,
53 /* UART4 */
54 #if defined(MACH_EUKREA_CPUIMX27_USEUART4)
55 PB26_AF_UART4_RTS,
56 PB28_AF_UART4_TXD,
57 PB29_AF_UART4_CTS,
58 PB31_AF_UART4_RXD,
59 #endif
60 /* FEC */
61 PD0_AIN_FEC_TXD0,
62 PD1_AIN_FEC_TXD1,
63 PD2_AIN_FEC_TXD2,
64 PD3_AIN_FEC_TXD3,
65 PD4_AOUT_FEC_RX_ER,
66 PD5_AOUT_FEC_RXD1,
67 PD6_AOUT_FEC_RXD2,
68 PD7_AOUT_FEC_RXD3,
69 PD8_AF_FEC_MDIO,
70 PD9_AIN_FEC_MDC,
71 PD10_AOUT_FEC_CRS,
72 PD11_AOUT_FEC_TX_CLK,
73 PD12_AOUT_FEC_RXD0,
74 PD13_AOUT_FEC_RX_DV,
75 PD14_AOUT_FEC_RX_CLK,
76 PD15_AOUT_FEC_COL,
77 PD16_AIN_FEC_TX_ER,
78 PF23_AIN_FEC_TX_EN,
79 /* I2C1 */
80 PD17_PF_I2C_DATA,
81 PD18_PF_I2C_CLK,
82 /* SDHC2 */
83 #if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
84 PB4_PF_SD2_D0,
85 PB5_PF_SD2_D1,
86 PB6_PF_SD2_D2,
87 PB7_PF_SD2_D3,
88 PB8_PF_SD2_CMD,
89 PB9_PF_SD2_CLK,
90 #endif
91 #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
92 /* Quad UART's IRQ */
93 GPIO_PORTB | 22 | GPIO_GPIO | GPIO_IN,
94 GPIO_PORTB | 23 | GPIO_GPIO | GPIO_IN,
95 GPIO_PORTB | 27 | GPIO_GPIO | GPIO_IN,
96 GPIO_PORTB | 30 | GPIO_GPIO | GPIO_IN,
97 #endif
98 /* OTG */
99 PC7_PF_USBOTG_DATA5,
100 PC8_PF_USBOTG_DATA6,
101 PC9_PF_USBOTG_DATA0,
102 PC10_PF_USBOTG_DATA2,
103 PC11_PF_USBOTG_DATA1,
104 PC12_PF_USBOTG_DATA4,
105 PC13_PF_USBOTG_DATA3,
106 PE0_PF_USBOTG_NXT,
107 PE1_PF_USBOTG_STP,
108 PE2_PF_USBOTG_DIR,
109 PE24_PF_USBOTG_CLK,
110 PE25_PF_USBOTG_DATA7,
111 /* USBH2 */
112 PA0_PF_USBH2_CLK,
113 PA1_PF_USBH2_DIR,
114 PA2_PF_USBH2_DATA7,
115 PA3_PF_USBH2_NXT,
116 PA4_PF_USBH2_STP,
117 PD19_AF_USBH2_DATA4,
118 PD20_AF_USBH2_DATA3,
119 PD21_AF_USBH2_DATA6,
120 PD22_AF_USBH2_DATA0,
121 PD23_AF_USBH2_DATA2,
122 PD24_AF_USBH2_DATA1,
123 PD26_AF_USBH2_DATA5,
124 };
125
126 static struct physmap_flash_data eukrea_cpuimx27_flash_data = {
127 .width = 2,
128 };
129
130 static struct resource eukrea_cpuimx27_flash_resource = {
131 .start = 0xc0000000,
132 .end = 0xc3ffffff,
133 .flags = IORESOURCE_MEM,
134 };
135
136 static struct platform_device eukrea_cpuimx27_nor_mtd_device = {
137 .name = "physmap-flash",
138 .id = 0,
139 .dev = {
140 .platform_data = &eukrea_cpuimx27_flash_data,
141 },
142 .num_resources = 1,
143 .resource = &eukrea_cpuimx27_flash_resource,
144 };
145
146 static const struct imxuart_platform_data uart_pdata __initconst = {
147 .flags = IMXUART_HAVE_RTSCTS,
148 };
149
150 static const struct mxc_nand_platform_data
151 cpuimx27_nand_board_info __initconst = {
152 .width = 1,
153 .hw_ecc = 1,
154 };
155
156 static struct platform_device *platform_devices[] __initdata = {
157 &eukrea_cpuimx27_nor_mtd_device,
158 };
159
160 static const struct imxi2c_platform_data cpuimx27_i2c1_data __initconst = {
161 .bitrate = 100000,
162 };
163
164 static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = {
165 {
166 I2C_BOARD_INFO("pcf8563", 0x51),
167 },
168 };
169
170 #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
171 static struct plat_serial8250_port serial_platform_data[] = {
172 {
173 .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x200000),
174 .irq = IRQ_GPIOB(23),
175 .uartclk = 14745600,
176 .regshift = 1,
177 .iotype = UPIO_MEM,
178 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
179 }, {
180 .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x400000),
181 .irq = IRQ_GPIOB(22),
182 .uartclk = 14745600,
183 .regshift = 1,
184 .iotype = UPIO_MEM,
185 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
186 }, {
187 .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x800000),
188 .irq = IRQ_GPIOB(27),
189 .uartclk = 14745600,
190 .regshift = 1,
191 .iotype = UPIO_MEM,
192 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
193 }, {
194 .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x1000000),
195 .irq = IRQ_GPIOB(30),
196 .uartclk = 14745600,
197 .regshift = 1,
198 .iotype = UPIO_MEM,
199 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
200 }, {
201 }
202 };
203
204 static struct platform_device serial_device = {
205 .name = "serial8250",
206 .id = 0,
207 .dev = {
208 .platform_data = serial_platform_data,
209 },
210 };
211 #endif
212
213 #if defined(CONFIG_USB_ULPI)
214 static struct mxc_usbh_platform_data otg_pdata __initdata = {
215 .portsc = MXC_EHCI_MODE_ULPI,
216 .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
217 };
218
219 static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
220 .portsc = MXC_EHCI_MODE_ULPI,
221 .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
222 };
223 #endif
224
225 static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
226 .operating_mode = FSL_USB2_DR_DEVICE,
227 .phy_mode = FSL_USB2_PHY_ULPI,
228 };
229
230 static int otg_mode_host;
231
232 static int __init eukrea_cpuimx27_otg_mode(char *options)
233 {
234 if (!strcmp(options, "host"))
235 otg_mode_host = 1;
236 else if (!strcmp(options, "device"))
237 otg_mode_host = 0;
238 else
239 pr_info("otg_mode neither \"host\" nor \"device\". "
240 "Defaulting to device\n");
241 return 0;
242 }
243 __setup("otg_mode=", eukrea_cpuimx27_otg_mode);
244
245 static void __init eukrea_cpuimx27_init(void)
246 {
247 mxc_gpio_setup_multiple_pins(eukrea_cpuimx27_pins,
248 ARRAY_SIZE(eukrea_cpuimx27_pins), "CPUIMX27");
249
250 imx27_add_imx_uart0(&uart_pdata);
251
252 imx27_add_mxc_nand(&cpuimx27_nand_board_info);
253
254 i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices,
255 ARRAY_SIZE(eukrea_cpuimx27_i2c_devices));
256
257 imx27_add_imx_i2c(0, &cpuimx27_i2c1_data);
258
259 imx27_add_fec(NULL);
260 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
261 imx27_add_imx2_wdt(NULL);
262 imx27_add_mxc_w1(NULL);
263
264 #if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
265 /* SDHC2 can be used for Wifi */
266 imx27_add_mxc_mmc(1, NULL);
267 #endif
268 #if defined(MACH_EUKREA_CPUIMX27_USEUART4)
269 /* in which case UART4 is also used for Bluetooth */
270 imx27_add_imx_uart3(&uart_pdata);
271 #endif
272
273 #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
274 platform_device_register(&serial_device);
275 #endif
276
277 #if defined(CONFIG_USB_ULPI)
278 if (otg_mode_host) {
279 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
280 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
281
282 imx27_add_mxc_ehci_otg(&otg_pdata);
283 }
284
285 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
286 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
287
288 imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
289 #endif
290 if (!otg_mode_host)
291 imx27_add_fsl_usb2_udc(&otg_device_pdata);
292
293 #ifdef CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD
294 eukrea_mbimx27_baseboard_init();
295 #endif
296 }
297
298 static void __init eukrea_cpuimx27_timer_init(void)
299 {
300 mx27_clocks_init(26000000);
301 }
302
303 static struct sys_timer eukrea_cpuimx27_timer = {
304 .init = eukrea_cpuimx27_timer_init,
305 };
306
307 MACHINE_START(CPUIMX27, "EUKREA CPUIMX27")
308 .boot_params = MX27_PHYS_OFFSET + 0x100,
309 .map_io = mx27_map_io,
310 .init_irq = mx27_init_irq,
311 .init_machine = eukrea_cpuimx27_init,
312 .timer = &eukrea_cpuimx27_timer,
313 MACHINE_END
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