arch/arm/mach-imx/mach-imx6q.c

   1 /*
   2  * Copyright 2011 Freescale Semiconductor, Inc.
   3  * Copyright 2011 Linaro Ltd.
   4  *
   5  * The code contained herein is licensed under the GNU General Public
   6  * License. You may obtain a copy of the GNU General Public License
   7  * Version 2 or later at the following locations:
   8  *
   9  * http://www.opensource.org/licenses/gpl-license.html
  10  * http://www.gnu.org/copyleft/gpl.html
  11  */
  12
  13 #include <linux/clk.h>
  14 #include <linux/clkdev.h>
  15 #include <linux/delay.h>
  16 #include <linux/init.h>
  17 #include <linux/io.h>
  18 #include <linux/irq.h>
  19 #include <linux/irqdomain.h>
  20 #include <linux/of.h>
  21 #include <linux/of_address.h>
  22 #include <linux/of_irq.h>
  23 #include <linux/of_platform.h>
  24 #include <linux/pinctrl/machine.h>
  25 #include <linux/phy.h>
  26 #include <linux/micrel_phy.h>
  27 #include <linux/mfd/anatop.h>
  28 #include <asm/smp_twd.h>
  29 #include <asm/hardware/cache-l2x0.h>
  30 #include <asm/hardware/gic.h>
  31 #include <asm/mach/arch.h>
  32 #include <asm/mach/time.h>
  33 #include <asm/system_misc.h>
  34 #include <mach/common.h>
  35 #include <mach/hardware.h>
  36
  37 void imx6q_restart(char mode, const char *cmd)
  38 {
  39         struct device_node *np;
  40         void __iomem *wdog_base;
  41
  42         np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-wdt");
  43         wdog_base = of_iomap(np, 0);
  44         if (!wdog_base)
  45                 goto soft;
  46
  47         imx_src_prepare_restart();
  48
  49         /* enable wdog */
  50         writew_relaxed(1 << 2, wdog_base);
  51         /* write twice to ensure the request will not get ignored */
  52         writew_relaxed(1 << 2, wdog_base);
  53
  54         /* wait for reset to assert ... */
  55         mdelay(500);
  56
  57         pr_err("Watchdog reset failed to assert reset\n");
  58
  59         /* delay to allow the serial port to show the message */
  60         mdelay(50);
  61
  62 soft:
  63         /* we'll take a jump through zero as a poor second */
  64         soft_restart(0);
  65 }
  66
  67 /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
  68 static int ksz9021rn_phy_fixup(struct phy_device *phydev)
  69 {
  70         if (IS_ENABLED(CONFIG_PHYLIB)) {
  71                 /* min rx data delay */
  72                 phy_write(phydev, 0x0b, 0x8105);
  73                 phy_write(phydev, 0x0c, 0x0000);
  74
  75                 /* max rx/tx clock delay, min rx/tx control delay */
  76                 phy_write(phydev, 0x0b, 0x8104);
  77                 phy_write(phydev, 0x0c, 0xf0f0);
  78                 phy_write(phydev, 0x0b, 0x104);
  79         }
  80
  81         return 0;
  82 }
  83
  84 static void __init imx6q_sabrelite_cko1_setup(void)
  85 {
  86         struct clk *cko1_sel, *ahb, *cko1;
  87         unsigned long rate;
  88
  89         cko1_sel = clk_get_sys(NULL, "cko1_sel");
  90         ahb = clk_get_sys(NULL, "ahb");
  91         cko1 = clk_get_sys(NULL, "cko1");
  92         if (IS_ERR(cko1_sel) || IS_ERR(ahb) || IS_ERR(cko1)) {
  93                 pr_err("cko1 setup failed!\n");
  94                 goto put_clk;
  95         }
  96         clk_set_parent(cko1_sel, ahb);
  97         rate = clk_round_rate(cko1, 16000000);
  98         clk_set_rate(cko1, rate);
  99         clk_register_clkdev(cko1, NULL, "0-000a");
 100 put_clk:
 101         if (!IS_ERR(cko1_sel))
 102                 clk_put(cko1_sel);
 103         if (!IS_ERR(ahb))
 104                 clk_put(ahb);
 105         if (!IS_ERR(cko1))
 106                 clk_put(cko1);
 107 }
 108
 109 static void __init imx6q_sabrelite_init(void)
 110 {
 111         if (IS_ENABLED(CONFIG_PHYLIB))
 112                 phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
 113                                 ksz9021rn_phy_fixup);
 114         imx6q_sabrelite_cko1_setup();
 115 }
 116
 117 static void __init imx6q_usb_init(void)
 118 {
 119         struct device_node *np;
 120         struct platform_device *pdev = NULL;
 121         struct anatop *adata = NULL;
 122
 123         np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop");
 124         if (np)
 125                 pdev = of_find_device_by_node(np);
 126         if (pdev)
 127                 adata = platform_get_drvdata(pdev);
 128         if (!adata) {
 129                 if (np)
 130                         of_node_put(np);
 131                 return;
 132         }
 133
 134 #define HW_ANADIG_USB1_CHRG_DETECT              0x000001b0
 135 #define HW_ANADIG_USB2_CHRG_DETECT              0x00000210
 136
 137 #define BM_ANADIG_USB_CHRG_DETECT_EN_B          0x00100000
 138 #define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B    0x00080000
 139
 140         /*
 141          * The external charger detector needs to be disabled,
 142          * or the signal at DP will be poor
 143          */
 144         anatop_write_reg(adata, HW_ANADIG_USB1_CHRG_DETECT,
 145                         BM_ANADIG_USB_CHRG_DETECT_EN_B
 146                         | BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B,
 147                         ~0);
 148         anatop_write_reg(adata, HW_ANADIG_USB2_CHRG_DETECT,
 149                         BM_ANADIG_USB_CHRG_DETECT_EN_B |
 150                         BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B,
 151                         ~0);
 152
 153         of_node_put(np);
 154 }
 155
 156 static void __init imx6q_init_machine(void)
 157 {
 158         /*
 159          * This should be removed when all imx6q boards have pinctrl
 160          * states for devices defined in device tree.
 161          */
 162         pinctrl_provide_dummies();
 163
 164         if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
 165                 imx6q_sabrelite_init();
 166
 167         of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 168
 169         imx6q_pm_init();
 170         imx6q_usb_init();
 171 }
 172
 173 static void __init imx6q_map_io(void)
 174 {
 175         imx_lluart_map_io();
 176         imx_scu_map_io();
 177         imx6q_clock_map_io();
 178 }
 179
 180 static int __init imx6q_gpio_add_irq_domain(struct device_node *np,
 181                                 struct device_node *interrupt_parent)
 182 {
 183         static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
 184
 185         gpio_irq_base -= 32;
 186         irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops,
 187                               NULL);
 188
 189         return 0;
 190 }
 191
 192 static const struct of_device_id imx6q_irq_match[] __initconst = {
 193         { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
 194         { .compatible = "fsl,imx6q-gpio", .data = imx6q_gpio_add_irq_domain, },
 195         { /* sentinel */ }
 196 };
 197
 198 static void __init imx6q_init_irq(void)
 199 {
 200         l2x0_of_init(0, ~0UL);
 201         imx_src_init();
 202         imx_gpc_init();
 203         of_irq_init(imx6q_irq_match);
 204 }
 205
 206 static void __init imx6q_timer_init(void)
 207 {
 208         mx6q_clocks_init();
 209         twd_local_timer_of_register();
 210 }
 211
 212 static struct sys_timer imx6q_timer = {
 213         .init = imx6q_timer_init,
 214 };
 215
 216 static const char *imx6q_dt_compat[] __initdata = {
 217         "fsl,imx6q-arm2",
 218         "fsl,imx6q-sabrelite",
 219         "fsl,imx6q-sabresd",
 220         "fsl,imx6q",
 221         NULL,
 222 };
 223
 224 DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
 225         .map_io         = imx6q_map_io,
 226         .init_irq       = imx6q_init_irq,
 227         .handle_irq     = imx6q_handle_irq,
 228         .timer          = &imx6q_timer,
 229         .init_machine   = imx6q_init_machine,
 230         .dt_compat      = imx6q_dt_compat,
 231         .restart        = imx6q_restart,
 232 MACHINE_END