Merge branch 'picoxcell/timer' into next/timer
[deliverable/linux.git] / arch / arm / mach-imx / mach-imx6q.c
1 /*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13 #include <linux/clk.h>
14 #include <linux/clkdev.h>
15 #include <linux/delay.h>
16 #include <linux/init.h>
17 #include <linux/io.h>
18 #include <linux/irq.h>
19 #include <linux/irqdomain.h>
20 #include <linux/of.h>
21 #include <linux/of_address.h>
22 #include <linux/of_irq.h>
23 #include <linux/of_platform.h>
24 #include <linux/pinctrl/machine.h>
25 #include <linux/phy.h>
26 #include <linux/micrel_phy.h>
27 #include <asm/smp_twd.h>
28 #include <asm/hardware/cache-l2x0.h>
29 #include <asm/hardware/gic.h>
30 #include <asm/mach/arch.h>
31 #include <asm/mach/time.h>
32 #include <asm/system_misc.h>
33 #include <mach/common.h>
34 #include <mach/hardware.h>
35
36 void imx6q_restart(char mode, const char *cmd)
37 {
38 struct device_node *np;
39 void __iomem *wdog_base;
40
41 np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-wdt");
42 wdog_base = of_iomap(np, 0);
43 if (!wdog_base)
44 goto soft;
45
46 imx_src_prepare_restart();
47
48 /* enable wdog */
49 writew_relaxed(1 << 2, wdog_base);
50 /* write twice to ensure the request will not get ignored */
51 writew_relaxed(1 << 2, wdog_base);
52
53 /* wait for reset to assert ... */
54 mdelay(500);
55
56 pr_err("Watchdog reset failed to assert reset\n");
57
58 /* delay to allow the serial port to show the message */
59 mdelay(50);
60
61 soft:
62 /* we'll take a jump through zero as a poor second */
63 soft_restart(0);
64 }
65
66 /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
67 static int ksz9021rn_phy_fixup(struct phy_device *phydev)
68 {
69 if (IS_ENABLED(CONFIG_PHYLIB)) {
70 /* min rx data delay */
71 phy_write(phydev, 0x0b, 0x8105);
72 phy_write(phydev, 0x0c, 0x0000);
73
74 /* max rx/tx clock delay, min rx/tx control delay */
75 phy_write(phydev, 0x0b, 0x8104);
76 phy_write(phydev, 0x0c, 0xf0f0);
77 phy_write(phydev, 0x0b, 0x104);
78 }
79
80 return 0;
81 }
82
83 static void __init imx6q_sabrelite_cko1_setup(void)
84 {
85 struct clk *cko1_sel, *ahb, *cko1;
86 unsigned long rate;
87
88 cko1_sel = clk_get_sys(NULL, "cko1_sel");
89 ahb = clk_get_sys(NULL, "ahb");
90 cko1 = clk_get_sys(NULL, "cko1");
91 if (IS_ERR(cko1_sel) || IS_ERR(ahb) || IS_ERR(cko1)) {
92 pr_err("cko1 setup failed!\n");
93 goto put_clk;
94 }
95 clk_set_parent(cko1_sel, ahb);
96 rate = clk_round_rate(cko1, 16000000);
97 clk_set_rate(cko1, rate);
98 clk_register_clkdev(cko1, NULL, "0-000a");
99 put_clk:
100 if (!IS_ERR(cko1_sel))
101 clk_put(cko1_sel);
102 if (!IS_ERR(ahb))
103 clk_put(ahb);
104 if (!IS_ERR(cko1))
105 clk_put(cko1);
106 }
107
108 static void __init imx6q_sabrelite_init(void)
109 {
110 if (IS_ENABLED(CONFIG_PHYLIB))
111 phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
112 ksz9021rn_phy_fixup);
113 imx6q_sabrelite_cko1_setup();
114 }
115
116 static void __init imx6q_init_machine(void)
117 {
118 /*
119 * This should be removed when all imx6q boards have pinctrl
120 * states for devices defined in device tree.
121 */
122 pinctrl_provide_dummies();
123
124 if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
125 imx6q_sabrelite_init();
126
127 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
128
129 imx6q_pm_init();
130 }
131
132 static void __init imx6q_map_io(void)
133 {
134 imx_lluart_map_io();
135 imx_scu_map_io();
136 imx6q_clock_map_io();
137 }
138
139 static int __init imx6q_gpio_add_irq_domain(struct device_node *np,
140 struct device_node *interrupt_parent)
141 {
142 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
143
144 gpio_irq_base -= 32;
145 irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops,
146 NULL);
147
148 return 0;
149 }
150
151 static const struct of_device_id imx6q_irq_match[] __initconst = {
152 { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
153 { .compatible = "fsl,imx6q-gpio", .data = imx6q_gpio_add_irq_domain, },
154 { /* sentinel */ }
155 };
156
157 static void __init imx6q_init_irq(void)
158 {
159 l2x0_of_init(0, ~0UL);
160 imx_src_init();
161 imx_gpc_init();
162 of_irq_init(imx6q_irq_match);
163 }
164
165 static void __init imx6q_timer_init(void)
166 {
167 mx6q_clocks_init();
168 twd_local_timer_of_register();
169 }
170
171 static struct sys_timer imx6q_timer = {
172 .init = imx6q_timer_init,
173 };
174
175 static const char *imx6q_dt_compat[] __initdata = {
176 "fsl,imx6q-arm2",
177 "fsl,imx6q-sabrelite",
178 "fsl,imx6q-sabresd",
179 "fsl,imx6q",
180 NULL,
181 };
182
183 DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
184 .map_io = imx6q_map_io,
185 .init_irq = imx6q_init_irq,
186 .handle_irq = imx6q_handle_irq,
187 .timer = &imx6q_timer,
188 .init_machine = imx6q_init_machine,
189 .dt_compat = imx6q_dt_compat,
190 .restart = imx6q_restart,
191 MACHINE_END
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