ARM: imx: eliminate macro IOMUX_TO_IRQ()
[deliverable/linux.git] / arch / arm / mach-imx / mach-mx31lite.c
1 /*
2 * Copyright (C) 2000 Deep Blue Solutions Ltd
3 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
4 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
5 * Copyright (C) 2009 Daniel Mack <daniel@caiaq.de>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 */
17
18 #include <linux/types.h>
19 #include <linux/init.h>
20 #include <linux/kernel.h>
21 #include <linux/memory.h>
22 #include <linux/platform_device.h>
23 #include <linux/gpio.h>
24 #include <linux/moduleparam.h>
25 #include <linux/smsc911x.h>
26 #include <linux/mfd/mc13783.h>
27 #include <linux/spi/spi.h>
28 #include <linux/usb/otg.h>
29 #include <linux/usb/ulpi.h>
30 #include <linux/mtd/physmap.h>
31 #include <linux/delay.h>
32 #include <linux/regulator/machine.h>
33 #include <linux/regulator/fixed.h>
34
35 #include <asm/mach-types.h>
36 #include <asm/mach/arch.h>
37 #include <asm/mach/time.h>
38 #include <asm/mach/map.h>
39 #include <asm/page.h>
40 #include <asm/setup.h>
41
42 #include <mach/hardware.h>
43 #include <mach/common.h>
44 #include <mach/board-mx31lite.h>
45 #include <mach/iomux-mx3.h>
46 #include <mach/irqs.h>
47 #include <mach/ulpi.h>
48
49 #include "devices-imx31.h"
50
51 /*
52 * This file contains the module-specific initialization routines.
53 */
54
55 static unsigned int mx31lite_pins[] = {
56 /* LAN9117 IRQ pin */
57 IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO),
58 /* SPI 1 */
59 MX31_PIN_CSPI2_SCLK__SCLK,
60 MX31_PIN_CSPI2_MOSI__MOSI,
61 MX31_PIN_CSPI2_MISO__MISO,
62 MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
63 MX31_PIN_CSPI2_SS0__SS0,
64 MX31_PIN_CSPI2_SS1__SS1,
65 MX31_PIN_CSPI2_SS2__SS2,
66 };
67
68 static const struct mxc_nand_platform_data
69 mx31lite_nand_board_info __initconst = {
70 .width = 1,
71 .hw_ecc = 1,
72 };
73
74 static struct smsc911x_platform_config smsc911x_config = {
75 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
76 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
77 .flags = SMSC911X_USE_16BIT,
78 };
79
80 static struct resource smsc911x_resources[] = {
81 {
82 .start = MX31_CS4_BASE_ADDR,
83 .end = MX31_CS4_BASE_ADDR + 0x100,
84 .flags = IORESOURCE_MEM,
85 }, {
86 /* irq number is run-time assigned */
87 .flags = IORESOURCE_IRQ,
88 },
89 };
90
91 static struct platform_device smsc911x_device = {
92 .name = "smsc911x",
93 .id = -1,
94 .num_resources = ARRAY_SIZE(smsc911x_resources),
95 .resource = smsc911x_resources,
96 .dev = {
97 .platform_data = &smsc911x_config,
98 },
99 };
100
101 /*
102 * SPI
103 *
104 * The MC13783 is the only hard-wired SPI device on the module.
105 */
106
107 static int spi_internal_chipselect[] = {
108 MXC_SPI_CS(0),
109 };
110
111 static const struct spi_imx_master spi1_pdata __initconst = {
112 .chipselect = spi_internal_chipselect,
113 .num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
114 };
115
116 static struct mc13xxx_platform_data mc13783_pdata __initdata = {
117 .flags = MC13XXX_USE_RTC,
118 };
119
120 static struct spi_board_info mc13783_spi_dev __initdata = {
121 .modalias = "mc13783",
122 .max_speed_hz = 1000000,
123 .bus_num = 1,
124 .chip_select = 0,
125 .platform_data = &mc13783_pdata,
126 /* irq number is run-time assigned */
127 };
128
129 /*
130 * USB
131 */
132
133 #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
134 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
135
136 static int usbh2_init(struct platform_device *pdev)
137 {
138 int pins[] = {
139 MX31_PIN_USBH2_DATA0__USBH2_DATA0,
140 MX31_PIN_USBH2_DATA1__USBH2_DATA1,
141 MX31_PIN_USBH2_CLK__USBH2_CLK,
142 MX31_PIN_USBH2_DIR__USBH2_DIR,
143 MX31_PIN_USBH2_NXT__USBH2_NXT,
144 MX31_PIN_USBH2_STP__USBH2_STP,
145 };
146
147 mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2");
148
149 mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
150 mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
151 mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
152 mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
153 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
154 mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
155 mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
156 mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
157 mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
158 mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
159 mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
160 mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
161
162 mxc_iomux_set_gpr(MUX_PGP_UH2, true);
163
164 /* chip select */
165 mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO),
166 "USBH2_CS");
167 gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS");
168 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0);
169
170 mdelay(10);
171
172 return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
173 }
174
175 static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
176 .init = usbh2_init,
177 .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
178 };
179
180 /*
181 * NOR flash
182 */
183
184 static struct physmap_flash_data nor_flash_data = {
185 .width = 2,
186 };
187
188 static struct resource nor_flash_resource = {
189 .start = 0xa0000000,
190 .end = 0xa1ffffff,
191 .flags = IORESOURCE_MEM,
192 };
193
194 static struct platform_device physmap_flash_device = {
195 .name = "physmap-flash",
196 .id = 0,
197 .dev = {
198 .platform_data = &nor_flash_data,
199 },
200 .resource = &nor_flash_resource,
201 .num_resources = 1,
202 };
203
204
205
206 /*
207 * This structure defines the MX31 memory map.
208 */
209 static struct map_desc mx31lite_io_desc[] __initdata = {
210 {
211 .virtual = MX31_CS4_BASE_ADDR_VIRT,
212 .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
213 .length = MX31_CS4_SIZE,
214 .type = MT_DEVICE
215 }
216 };
217
218 /*
219 * Set up static virtual mappings.
220 */
221 void __init mx31lite_map_io(void)
222 {
223 mx31_map_io();
224 iotable_init(mx31lite_io_desc, ARRAY_SIZE(mx31lite_io_desc));
225 }
226
227 static int mx31lite_baseboard;
228 core_param(mx31lite_baseboard, mx31lite_baseboard, int, 0444);
229
230 static struct regulator_consumer_supply dummy_supplies[] = {
231 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
232 REGULATOR_SUPPLY("vddvario", "smsc911x"),
233 };
234
235 static void __init mx31lite_init(void)
236 {
237 int ret;
238
239 imx31_soc_init();
240
241 switch (mx31lite_baseboard) {
242 case MX31LITE_NOBOARD:
243 break;
244 case MX31LITE_DB:
245 mx31lite_db_init();
246 break;
247 default:
248 printk(KERN_ERR "Illegal mx31lite_baseboard type %d\n",
249 mx31lite_baseboard);
250 }
251
252 mxc_iomux_setup_multiple_pins(mx31lite_pins, ARRAY_SIZE(mx31lite_pins),
253 "mx31lite");
254
255 /* NOR and NAND flash */
256 platform_device_register(&physmap_flash_device);
257 imx31_add_mxc_nand(&mx31lite_nand_board_info);
258
259 imx31_add_spi_imx1(&spi1_pdata);
260 mc13783_spi_dev.irq = gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_3));
261 spi_register_board_info(&mc13783_spi_dev, 1);
262
263 /* USB */
264 usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
265 ULPI_OTG_DRVVBUS_EXT);
266 if (usbh2_pdata.otg)
267 imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
268
269 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
270
271 /* SMSC9117 IRQ pin */
272 ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq");
273 if (ret)
274 pr_warning("could not get LAN irq gpio\n");
275 else {
276 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_SFS6));
277 smsc911x_resources[1].start =
278 gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_SFS6));
279 smsc911x_resources[1].end =
280 gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_SFS6));
281 platform_device_register(&smsc911x_device);
282 }
283 }
284
285 static void __init mx31lite_timer_init(void)
286 {
287 mx31_clocks_init(26000000);
288 }
289
290 static struct sys_timer mx31lite_timer = {
291 .init = mx31lite_timer_init,
292 };
293
294 MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
295 /* Maintainer: Freescale Semiconductor, Inc. */
296 .atag_offset = 0x100,
297 .map_io = mx31lite_map_io,
298 .init_early = imx31_init_early,
299 .init_irq = mx31_init_irq,
300 .handle_irq = imx31_handle_irq,
301 .timer = &mx31lite_timer,
302 .init_machine = mx31lite_init,
303 .restart = mxc_restart,
304 MACHINE_END
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