dma: ipu: remove the use of ipu_platform_data
[deliverable/linux.git] / arch / arm / mach-imx / mach-mx35_3ds.c
1 /*
2 * Copyright 2009 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright (C) 2009 Marc Kleine-Budde, Pengutronix
4 *
5 * Author: Fabio Estevam <fabio.estevam@freescale.com>
6 *
7 * Copyright (C) 2011 Meprolight, Ltd.
8 * Alex Gershgorin <alexg@meprolight.com>
9 *
10 * Modified from i.MX31 3-Stack Development System
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 */
22
23 /*
24 * This machine is known as:
25 * - i.MX35 3-Stack Development System
26 * - i.MX35 Platform Development Kit (i.MX35 PDK)
27 */
28
29 #include <linux/types.h>
30 #include <linux/init.h>
31 #include <linux/platform_device.h>
32 #include <linux/memory.h>
33 #include <linux/gpio.h>
34 #include <linux/usb/otg.h>
35
36 #include <linux/mtd/physmap.h>
37 #include <linux/mfd/mc13892.h>
38 #include <linux/regulator/machine.h>
39
40 #include <asm/mach-types.h>
41 #include <asm/mach/arch.h>
42 #include <asm/mach/time.h>
43 #include <asm/mach/map.h>
44 #include <asm/memblock.h>
45
46 #include <mach/hardware.h>
47 #include <mach/common.h>
48 #include <mach/iomux-mx35.h>
49 #include <mach/irqs.h>
50 #include <mach/3ds_debugboard.h>
51 #include <video/platform_lcd.h>
52
53 #include <media/soc_camera.h>
54
55 #include "devices-imx35.h"
56
57 #define GPIO_MC9S08DZ60_GPS_ENABLE 0
58 #define GPIO_MC9S08DZ60_HDD_ENABLE 4
59 #define GPIO_MC9S08DZ60_WIFI_ENABLE 5
60 #define GPIO_MC9S08DZ60_LCD_ENABLE 6
61 #define GPIO_MC9S08DZ60_SPEAKER_ENABLE 8
62
63 static const struct fb_videomode fb_modedb[] = {
64 {
65 /* 800x480 @ 55 Hz */
66 .name = "Ceramate-CLAA070VC01",
67 .refresh = 55,
68 .xres = 800,
69 .yres = 480,
70 .pixclock = 40000,
71 .left_margin = 40,
72 .right_margin = 40,
73 .upper_margin = 5,
74 .lower_margin = 5,
75 .hsync_len = 20,
76 .vsync_len = 10,
77 .sync = FB_SYNC_OE_ACT_HIGH,
78 .vmode = FB_VMODE_NONINTERLACED,
79 .flag = 0,
80 },
81 };
82
83 static struct mx3fb_platform_data mx3fb_pdata __initdata = {
84 .name = "Ceramate-CLAA070VC01",
85 .mode = fb_modedb,
86 .num_modes = ARRAY_SIZE(fb_modedb),
87 };
88
89 static struct i2c_board_info __initdata i2c_devices_3ds[] = {
90 {
91 I2C_BOARD_INFO("mc9s08dz60", 0x69),
92 },
93 };
94
95 static int lcd_power_gpio = -ENXIO;
96
97 static int mc9s08dz60_gpiochip_match(struct gpio_chip *chip, void *data)
98 {
99 return !strcmp(chip->label, data);
100 }
101
102 static void mx35_3ds_lcd_set_power(
103 struct plat_lcd_data *pd, unsigned int power)
104 {
105 struct gpio_chip *chip;
106
107 if (!gpio_is_valid(lcd_power_gpio)) {
108 chip = gpiochip_find(
109 "mc9s08dz60", mc9s08dz60_gpiochip_match);
110 if (chip) {
111 lcd_power_gpio =
112 chip->base + GPIO_MC9S08DZ60_LCD_ENABLE;
113 if (gpio_request(lcd_power_gpio, "lcd_power") < 0) {
114 pr_err("error: gpio already requested!\n");
115 lcd_power_gpio = -ENXIO;
116 }
117 } else {
118 pr_err("error: didn't find mc9s08dz60 gpio chip\n");
119 }
120 }
121
122 if (gpio_is_valid(lcd_power_gpio))
123 gpio_set_value_cansleep(lcd_power_gpio, power);
124 }
125
126 static struct plat_lcd_data mx35_3ds_lcd_data = {
127 .set_power = mx35_3ds_lcd_set_power,
128 };
129
130 static struct platform_device mx35_3ds_lcd = {
131 .name = "platform-lcd",
132 .dev.platform_data = &mx35_3ds_lcd_data,
133 };
134
135 #define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(1, 1))
136
137 static const struct imxuart_platform_data uart_pdata __initconst = {
138 .flags = IMXUART_HAVE_RTSCTS,
139 };
140
141 static struct physmap_flash_data mx35pdk_flash_data = {
142 .width = 2,
143 };
144
145 static struct resource mx35pdk_flash_resource = {
146 .start = MX35_CS0_BASE_ADDR,
147 .end = MX35_CS0_BASE_ADDR + SZ_64M - 1,
148 .flags = IORESOURCE_MEM,
149 };
150
151 static struct platform_device mx35pdk_flash = {
152 .name = "physmap-flash",
153 .id = 0,
154 .dev = {
155 .platform_data = &mx35pdk_flash_data,
156 },
157 .resource = &mx35pdk_flash_resource,
158 .num_resources = 1,
159 };
160
161 static const struct mxc_nand_platform_data mx35pdk_nand_board_info __initconst = {
162 .width = 1,
163 .hw_ecc = 1,
164 .flash_bbt = 1,
165 };
166
167 static struct platform_device *devices[] __initdata = {
168 &mx35pdk_flash,
169 };
170
171 static iomux_v3_cfg_t mx35pdk_pads[] = {
172 /* UART1 */
173 MX35_PAD_CTS1__UART1_CTS,
174 MX35_PAD_RTS1__UART1_RTS,
175 MX35_PAD_TXD1__UART1_TXD_MUX,
176 MX35_PAD_RXD1__UART1_RXD_MUX,
177 /* FEC */
178 MX35_PAD_FEC_TX_CLK__FEC_TX_CLK,
179 MX35_PAD_FEC_RX_CLK__FEC_RX_CLK,
180 MX35_PAD_FEC_RX_DV__FEC_RX_DV,
181 MX35_PAD_FEC_COL__FEC_COL,
182 MX35_PAD_FEC_RDATA0__FEC_RDATA_0,
183 MX35_PAD_FEC_TDATA0__FEC_TDATA_0,
184 MX35_PAD_FEC_TX_EN__FEC_TX_EN,
185 MX35_PAD_FEC_MDC__FEC_MDC,
186 MX35_PAD_FEC_MDIO__FEC_MDIO,
187 MX35_PAD_FEC_TX_ERR__FEC_TX_ERR,
188 MX35_PAD_FEC_RX_ERR__FEC_RX_ERR,
189 MX35_PAD_FEC_CRS__FEC_CRS,
190 MX35_PAD_FEC_RDATA1__FEC_RDATA_1,
191 MX35_PAD_FEC_TDATA1__FEC_TDATA_1,
192 MX35_PAD_FEC_RDATA2__FEC_RDATA_2,
193 MX35_PAD_FEC_TDATA2__FEC_TDATA_2,
194 MX35_PAD_FEC_RDATA3__FEC_RDATA_3,
195 MX35_PAD_FEC_TDATA3__FEC_TDATA_3,
196 /* USBOTG */
197 MX35_PAD_USBOTG_PWR__USB_TOP_USBOTG_PWR,
198 MX35_PAD_USBOTG_OC__USB_TOP_USBOTG_OC,
199 /* USBH1 */
200 MX35_PAD_I2C2_CLK__USB_TOP_USBH2_PWR,
201 MX35_PAD_I2C2_DAT__USB_TOP_USBH2_OC,
202 /* SDCARD */
203 MX35_PAD_SD1_CMD__ESDHC1_CMD,
204 MX35_PAD_SD1_CLK__ESDHC1_CLK,
205 MX35_PAD_SD1_DATA0__ESDHC1_DAT0,
206 MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
207 MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
208 MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
209 /* I2C1 */
210 MX35_PAD_I2C1_CLK__I2C1_SCL,
211 MX35_PAD_I2C1_DAT__I2C1_SDA,
212 /* Display */
213 MX35_PAD_LD0__IPU_DISPB_DAT_0,
214 MX35_PAD_LD1__IPU_DISPB_DAT_1,
215 MX35_PAD_LD2__IPU_DISPB_DAT_2,
216 MX35_PAD_LD3__IPU_DISPB_DAT_3,
217 MX35_PAD_LD4__IPU_DISPB_DAT_4,
218 MX35_PAD_LD5__IPU_DISPB_DAT_5,
219 MX35_PAD_LD6__IPU_DISPB_DAT_6,
220 MX35_PAD_LD7__IPU_DISPB_DAT_7,
221 MX35_PAD_LD8__IPU_DISPB_DAT_8,
222 MX35_PAD_LD9__IPU_DISPB_DAT_9,
223 MX35_PAD_LD10__IPU_DISPB_DAT_10,
224 MX35_PAD_LD11__IPU_DISPB_DAT_11,
225 MX35_PAD_LD12__IPU_DISPB_DAT_12,
226 MX35_PAD_LD13__IPU_DISPB_DAT_13,
227 MX35_PAD_LD14__IPU_DISPB_DAT_14,
228 MX35_PAD_LD15__IPU_DISPB_DAT_15,
229 MX35_PAD_LD16__IPU_DISPB_DAT_16,
230 MX35_PAD_LD17__IPU_DISPB_DAT_17,
231 MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC,
232 MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK,
233 MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY,
234 MX35_PAD_CONTRAST__IPU_DISPB_CONTR,
235 MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC,
236 MX35_PAD_D3_REV__IPU_DISPB_D3_REV,
237 MX35_PAD_D3_CLS__IPU_DISPB_D3_CLS,
238 /* CSI */
239 MX35_PAD_TX1__IPU_CSI_D_6,
240 MX35_PAD_TX0__IPU_CSI_D_7,
241 MX35_PAD_CSI_D8__IPU_CSI_D_8,
242 MX35_PAD_CSI_D9__IPU_CSI_D_9,
243 MX35_PAD_CSI_D10__IPU_CSI_D_10,
244 MX35_PAD_CSI_D11__IPU_CSI_D_11,
245 MX35_PAD_CSI_D12__IPU_CSI_D_12,
246 MX35_PAD_CSI_D13__IPU_CSI_D_13,
247 MX35_PAD_CSI_D14__IPU_CSI_D_14,
248 MX35_PAD_CSI_D15__IPU_CSI_D_15,
249 MX35_PAD_CSI_HSYNC__IPU_CSI_HSYNC,
250 MX35_PAD_CSI_MCLK__IPU_CSI_MCLK,
251 MX35_PAD_CSI_PIXCLK__IPU_CSI_PIXCLK,
252 MX35_PAD_CSI_VSYNC__IPU_CSI_VSYNC,
253 /*PMIC IRQ*/
254 MX35_PAD_GPIO2_0__GPIO2_0,
255 };
256
257 /*
258 * Camera support
259 */
260 static phys_addr_t mx3_camera_base __initdata;
261 #define MX35_3DS_CAMERA_BUF_SIZE SZ_8M
262
263 static const struct mx3_camera_pdata mx35_3ds_camera_pdata __initconst = {
264 .flags = MX3_CAMERA_DATAWIDTH_8,
265 .mclk_10khz = 2000,
266 };
267
268 static int __init imx35_3ds_init_camera(void)
269 {
270 int dma, ret = -ENOMEM;
271 struct platform_device *pdev =
272 imx35_alloc_mx3_camera(&mx35_3ds_camera_pdata);
273
274 if (IS_ERR(pdev))
275 return PTR_ERR(pdev);
276
277 if (!mx3_camera_base)
278 goto err;
279
280 dma = dma_declare_coherent_memory(&pdev->dev,
281 mx3_camera_base, mx3_camera_base,
282 MX35_3DS_CAMERA_BUF_SIZE,
283 DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
284
285 if (!(dma & DMA_MEMORY_MAP))
286 goto err;
287
288 ret = platform_device_add(pdev);
289 if (ret)
290 err:
291 platform_device_put(pdev);
292
293 return ret;
294 }
295
296 static struct i2c_board_info mx35_3ds_i2c_camera = {
297 I2C_BOARD_INFO("ov2640", 0x30),
298 };
299
300 static struct soc_camera_link iclink_ov2640 = {
301 .bus_id = 0,
302 .board_info = &mx35_3ds_i2c_camera,
303 .i2c_adapter_id = 0,
304 .power = NULL,
305 };
306
307 static struct platform_device mx35_3ds_ov2640 = {
308 .name = "soc-camera-pdrv",
309 .id = 0,
310 .dev = {
311 .platform_data = &iclink_ov2640,
312 },
313 };
314
315 static struct regulator_consumer_supply sw1_consumers[] = {
316 {
317 .supply = "cpu_vcc",
318 }
319 };
320
321 static struct regulator_consumer_supply vcam_consumers[] = {
322 /* sgtl5000 */
323 REGULATOR_SUPPLY("VDDA", "0-000a"),
324 };
325
326 static struct regulator_consumer_supply vaudio_consumers[] = {
327 REGULATOR_SUPPLY("cmos_vio", "soc-camera-pdrv.0"),
328 };
329
330 static struct regulator_init_data sw1_init = {
331 .constraints = {
332 .name = "SW1",
333 .min_uV = 600000,
334 .max_uV = 1375000,
335 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
336 .valid_modes_mask = 0,
337 .always_on = 1,
338 .boot_on = 1,
339 },
340 .num_consumer_supplies = ARRAY_SIZE(sw1_consumers),
341 .consumer_supplies = sw1_consumers,
342 };
343
344 static struct regulator_init_data sw2_init = {
345 .constraints = {
346 .name = "SW2",
347 .always_on = 1,
348 .boot_on = 1,
349 }
350 };
351
352 static struct regulator_init_data sw3_init = {
353 .constraints = {
354 .name = "SW3",
355 .always_on = 1,
356 .boot_on = 1,
357 }
358 };
359
360 static struct regulator_init_data sw4_init = {
361 .constraints = {
362 .name = "SW4",
363 .always_on = 1,
364 .boot_on = 1,
365 }
366 };
367
368 static struct regulator_init_data viohi_init = {
369 .constraints = {
370 .name = "VIOHI",
371 .boot_on = 1,
372 }
373 };
374
375 static struct regulator_init_data vusb_init = {
376 .constraints = {
377 .name = "VUSB",
378 .boot_on = 1,
379 }
380 };
381
382 static struct regulator_init_data vdig_init = {
383 .constraints = {
384 .name = "VDIG",
385 .boot_on = 1,
386 }
387 };
388
389 static struct regulator_init_data vpll_init = {
390 .constraints = {
391 .name = "VPLL",
392 .boot_on = 1,
393 }
394 };
395
396 static struct regulator_init_data vusb2_init = {
397 .constraints = {
398 .name = "VUSB2",
399 .boot_on = 1,
400 }
401 };
402
403 static struct regulator_init_data vvideo_init = {
404 .constraints = {
405 .name = "VVIDEO",
406 .boot_on = 1
407 }
408 };
409
410 static struct regulator_init_data vaudio_init = {
411 .constraints = {
412 .name = "VAUDIO",
413 .min_uV = 2300000,
414 .max_uV = 3000000,
415 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
416 .boot_on = 1
417 },
418 .num_consumer_supplies = ARRAY_SIZE(vaudio_consumers),
419 .consumer_supplies = vaudio_consumers,
420 };
421
422 static struct regulator_init_data vcam_init = {
423 .constraints = {
424 .name = "VCAM",
425 .min_uV = 2500000,
426 .max_uV = 3000000,
427 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
428 REGULATOR_CHANGE_MODE,
429 .valid_modes_mask = REGULATOR_MODE_FAST | REGULATOR_MODE_NORMAL,
430 .boot_on = 1
431 },
432 .num_consumer_supplies = ARRAY_SIZE(vcam_consumers),
433 .consumer_supplies = vcam_consumers,
434 };
435
436 static struct regulator_init_data vgen1_init = {
437 .constraints = {
438 .name = "VGEN1",
439 }
440 };
441
442 static struct regulator_init_data vgen2_init = {
443 .constraints = {
444 .name = "VGEN2",
445 .boot_on = 1,
446 }
447 };
448
449 static struct regulator_init_data vgen3_init = {
450 .constraints = {
451 .name = "VGEN3",
452 }
453 };
454
455 static struct mc13xxx_regulator_init_data mx35_3ds_regulators[] = {
456 { .id = MC13892_SW1, .init_data = &sw1_init },
457 { .id = MC13892_SW2, .init_data = &sw2_init },
458 { .id = MC13892_SW3, .init_data = &sw3_init },
459 { .id = MC13892_SW4, .init_data = &sw4_init },
460 { .id = MC13892_VIOHI, .init_data = &viohi_init },
461 { .id = MC13892_VPLL, .init_data = &vpll_init },
462 { .id = MC13892_VDIG, .init_data = &vdig_init },
463 { .id = MC13892_VUSB2, .init_data = &vusb2_init },
464 { .id = MC13892_VVIDEO, .init_data = &vvideo_init },
465 { .id = MC13892_VAUDIO, .init_data = &vaudio_init },
466 { .id = MC13892_VCAM, .init_data = &vcam_init },
467 { .id = MC13892_VGEN1, .init_data = &vgen1_init },
468 { .id = MC13892_VGEN2, .init_data = &vgen2_init },
469 { .id = MC13892_VGEN3, .init_data = &vgen3_init },
470 { .id = MC13892_VUSB, .init_data = &vusb_init },
471 };
472
473 static struct mc13xxx_platform_data mx35_3ds_mc13892_data = {
474 .flags = MC13XXX_USE_RTC | MC13XXX_USE_TOUCHSCREEN,
475 .regulators = {
476 .num_regulators = ARRAY_SIZE(mx35_3ds_regulators),
477 .regulators = mx35_3ds_regulators,
478 },
479 };
480
481 #define GPIO_PMIC_INT IMX_GPIO_NR(2, 0)
482
483 static struct i2c_board_info mx35_3ds_i2c_mc13892 = {
484
485 I2C_BOARD_INFO("mc13892", 0x08),
486 .platform_data = &mx35_3ds_mc13892_data,
487 /* irq number is run-time assigned */
488 };
489
490 static void __init imx35_3ds_init_mc13892(void)
491 {
492 int ret = gpio_request_one(GPIO_PMIC_INT, GPIOF_DIR_IN, "pmic irq");
493
494 if (ret) {
495 pr_err("failed to get pmic irq: %d\n", ret);
496 return;
497 }
498
499 mx35_3ds_i2c_mc13892.irq = gpio_to_irq(GPIO_PMIC_INT);
500 i2c_register_board_info(0, &mx35_3ds_i2c_mc13892, 1);
501 }
502
503 static int mx35_3ds_otg_init(struct platform_device *pdev)
504 {
505 return mx35_initialize_usb_hw(pdev->id, MXC_EHCI_INTERNAL_PHY);
506 }
507
508 /* OTG config */
509 static const struct fsl_usb2_platform_data usb_otg_pdata __initconst = {
510 .operating_mode = FSL_USB2_DR_DEVICE,
511 .phy_mode = FSL_USB2_PHY_UTMI_WIDE,
512 .workaround = FLS_USB2_WORKAROUND_ENGCM09152,
513 /*
514 * ENGCM09152 also requires a hardware change.
515 * Please check the MX35 Chip Errata document for details.
516 */
517 };
518
519 static struct mxc_usbh_platform_data otg_pdata __initdata = {
520 .init = mx35_3ds_otg_init,
521 .portsc = MXC_EHCI_MODE_UTMI,
522 };
523
524 static int mx35_3ds_usbh_init(struct platform_device *pdev)
525 {
526 return mx35_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_SINGLE_UNI |
527 MXC_EHCI_INTERNAL_PHY);
528 }
529
530 /* USB HOST config */
531 static const struct mxc_usbh_platform_data usb_host_pdata __initconst = {
532 .init = mx35_3ds_usbh_init,
533 .portsc = MXC_EHCI_MODE_SERIAL,
534 };
535
536 static int otg_mode_host;
537
538 static int __init mx35_3ds_otg_mode(char *options)
539 {
540 if (!strcmp(options, "host"))
541 otg_mode_host = 1;
542 else if (!strcmp(options, "device"))
543 otg_mode_host = 0;
544 else
545 pr_info("otg_mode neither \"host\" nor \"device\". "
546 "Defaulting to device\n");
547 return 0;
548 }
549 __setup("otg_mode=", mx35_3ds_otg_mode);
550
551 static const struct imxi2c_platform_data mx35_3ds_i2c0_data __initconst = {
552 .bitrate = 100000,
553 };
554
555 /*
556 * Board specific initialization.
557 */
558 static void __init mx35_3ds_init(void)
559 {
560 struct platform_device *imx35_fb_pdev;
561
562 imx35_soc_init();
563
564 mxc_iomux_v3_setup_multiple_pads(mx35pdk_pads, ARRAY_SIZE(mx35pdk_pads));
565
566 imx35_add_fec(NULL);
567 imx35_add_imx2_wdt(NULL);
568 platform_add_devices(devices, ARRAY_SIZE(devices));
569
570 imx35_add_imx_uart0(&uart_pdata);
571
572 if (otg_mode_host)
573 imx35_add_mxc_ehci_otg(&otg_pdata);
574
575 imx35_add_mxc_ehci_hs(&usb_host_pdata);
576
577 if (!otg_mode_host)
578 imx35_add_fsl_usb2_udc(&usb_otg_pdata);
579
580 imx35_add_mxc_nand(&mx35pdk_nand_board_info);
581 imx35_add_sdhci_esdhc_imx(0, NULL);
582
583 if (mxc_expio_init(MX35_CS5_BASE_ADDR, EXPIO_PARENT_INT))
584 pr_warn("Init of the debugboard failed, all "
585 "devices on the debugboard are unusable.\n");
586 imx35_add_imx_i2c0(&mx35_3ds_i2c0_data);
587
588 i2c_register_board_info(
589 0, i2c_devices_3ds, ARRAY_SIZE(i2c_devices_3ds));
590
591 imx35_add_ipu_core();
592 platform_device_register(&mx35_3ds_ov2640);
593 imx35_3ds_init_camera();
594
595 imx35_fb_pdev = imx35_add_mx3_sdc_fb(&mx3fb_pdata);
596 mx35_3ds_lcd.dev.parent = &imx35_fb_pdev->dev;
597 platform_device_register(&mx35_3ds_lcd);
598
599 imx35_3ds_init_mc13892();
600 }
601
602 static void __init mx35pdk_timer_init(void)
603 {
604 mx35_clocks_init();
605 }
606
607 static struct sys_timer mx35pdk_timer = {
608 .init = mx35pdk_timer_init,
609 };
610
611 static void __init mx35_3ds_reserve(void)
612 {
613 /* reserve MX35_3DS_CAMERA_BUF_SIZE bytes for mx3-camera */
614 mx3_camera_base = arm_memblock_steal(MX35_3DS_CAMERA_BUF_SIZE,
615 MX35_3DS_CAMERA_BUF_SIZE);
616 }
617
618 MACHINE_START(MX35_3DS, "Freescale MX35PDK")
619 /* Maintainer: Freescale Semiconductor, Inc */
620 .atag_offset = 0x100,
621 .map_io = mx35_map_io,
622 .init_early = imx35_init_early,
623 .init_irq = mx35_init_irq,
624 .handle_irq = imx35_handle_irq,
625 .timer = &mx35pdk_timer,
626 .init_machine = mx35_3ds_init,
627 .reserve = mx35_3ds_reserve,
628 .restart = mxc_restart,
629 MACHINE_END
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