ARM i.MX ehci: do ehci init in board specific functions
[deliverable/linux.git] / arch / arm / mach-imx / mach-pca100.c
1 /*
2 * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
3 * Copyright (C) 2009 Sascha Hauer (kernel@pengutronix.de)
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
17 * MA 02110-1301, USA.
18 */
19
20 #include <linux/platform_device.h>
21 #include <linux/io.h>
22 #include <linux/i2c.h>
23 #include <linux/i2c/at24.h>
24 #include <linux/dma-mapping.h>
25 #include <linux/spi/spi.h>
26 #include <linux/spi/eeprom.h>
27 #include <linux/irq.h>
28 #include <linux/delay.h>
29 #include <linux/gpio.h>
30 #include <linux/usb/otg.h>
31 #include <linux/usb/ulpi.h>
32
33 #include <asm/mach/arch.h>
34 #include <asm/mach-types.h>
35 #include <mach/common.h>
36 #include <mach/hardware.h>
37 #include <mach/iomux-mx27.h>
38 #include <asm/mach/time.h>
39 #include <mach/audmux.h>
40 #include <mach/mxc_nand.h>
41 #include <mach/irqs.h>
42 #include <mach/ulpi.h>
43
44 #include "devices-imx27.h"
45
46 #define OTG_PHY_CS_GPIO (GPIO_PORTB + 23)
47 #define USBH2_PHY_CS_GPIO (GPIO_PORTB + 24)
48 #define SPI1_SS0 (GPIO_PORTD + 28)
49 #define SPI1_SS1 (GPIO_PORTD + 27)
50 #define SD2_CD (GPIO_PORTC + 29)
51
52 static const int pca100_pins[] __initconst = {
53 /* UART1 */
54 PE12_PF_UART1_TXD,
55 PE13_PF_UART1_RXD,
56 PE14_PF_UART1_CTS,
57 PE15_PF_UART1_RTS,
58 /* SDHC */
59 PB4_PF_SD2_D0,
60 PB5_PF_SD2_D1,
61 PB6_PF_SD2_D2,
62 PB7_PF_SD2_D3,
63 PB8_PF_SD2_CMD,
64 PB9_PF_SD2_CLK,
65 SD2_CD | GPIO_GPIO | GPIO_IN,
66 /* FEC */
67 PD0_AIN_FEC_TXD0,
68 PD1_AIN_FEC_TXD1,
69 PD2_AIN_FEC_TXD2,
70 PD3_AIN_FEC_TXD3,
71 PD4_AOUT_FEC_RX_ER,
72 PD5_AOUT_FEC_RXD1,
73 PD6_AOUT_FEC_RXD2,
74 PD7_AOUT_FEC_RXD3,
75 PD8_AF_FEC_MDIO,
76 PD9_AIN_FEC_MDC,
77 PD10_AOUT_FEC_CRS,
78 PD11_AOUT_FEC_TX_CLK,
79 PD12_AOUT_FEC_RXD0,
80 PD13_AOUT_FEC_RX_DV,
81 PD14_AOUT_FEC_RX_CLK,
82 PD15_AOUT_FEC_COL,
83 PD16_AIN_FEC_TX_ER,
84 PF23_AIN_FEC_TX_EN,
85 /* SSI1 */
86 PC20_PF_SSI1_FS,
87 PC21_PF_SSI1_RXD,
88 PC22_PF_SSI1_TXD,
89 PC23_PF_SSI1_CLK,
90 /* onboard I2C */
91 PC5_PF_I2C2_SDA,
92 PC6_PF_I2C2_SCL,
93 /* external I2C */
94 PD17_PF_I2C_DATA,
95 PD18_PF_I2C_CLK,
96 /* SPI1 */
97 PD25_PF_CSPI1_RDY,
98 PD29_PF_CSPI1_SCLK,
99 PD30_PF_CSPI1_MISO,
100 PD31_PF_CSPI1_MOSI,
101 /* OTG */
102 OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
103 PC7_PF_USBOTG_DATA5,
104 PC8_PF_USBOTG_DATA6,
105 PC9_PF_USBOTG_DATA0,
106 PC10_PF_USBOTG_DATA2,
107 PC11_PF_USBOTG_DATA1,
108 PC12_PF_USBOTG_DATA4,
109 PC13_PF_USBOTG_DATA3,
110 PE0_PF_USBOTG_NXT,
111 PE1_PF_USBOTG_STP,
112 PE2_PF_USBOTG_DIR,
113 PE24_PF_USBOTG_CLK,
114 PE25_PF_USBOTG_DATA7,
115 /* USBH2 */
116 USBH2_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
117 PA0_PF_USBH2_CLK,
118 PA1_PF_USBH2_DIR,
119 PA2_PF_USBH2_DATA7,
120 PA3_PF_USBH2_NXT,
121 PA4_PF_USBH2_STP,
122 PD19_AF_USBH2_DATA4,
123 PD20_AF_USBH2_DATA3,
124 PD21_AF_USBH2_DATA6,
125 PD22_AF_USBH2_DATA0,
126 PD23_AF_USBH2_DATA2,
127 PD24_AF_USBH2_DATA1,
128 PD26_AF_USBH2_DATA5,
129 /* display */
130 PA5_PF_LSCLK,
131 PA6_PF_LD0,
132 PA7_PF_LD1,
133 PA8_PF_LD2,
134 PA9_PF_LD3,
135 PA10_PF_LD4,
136 PA11_PF_LD5,
137 PA12_PF_LD6,
138 PA13_PF_LD7,
139 PA14_PF_LD8,
140 PA15_PF_LD9,
141 PA16_PF_LD10,
142 PA17_PF_LD11,
143 PA18_PF_LD12,
144 PA19_PF_LD13,
145 PA20_PF_LD14,
146 PA21_PF_LD15,
147 PA22_PF_LD16,
148 PA23_PF_LD17,
149 PA26_PF_PS,
150 PA28_PF_HSYNC,
151 PA29_PF_VSYNC,
152 PA31_PF_OE_ACD,
153 /* free GPIO */
154 GPIO_PORTC | 31 | GPIO_GPIO | GPIO_IN, /* GPIO0_IRQ */
155 GPIO_PORTC | 25 | GPIO_GPIO | GPIO_IN, /* GPIO1_IRQ */
156 GPIO_PORTE | 5 | GPIO_GPIO | GPIO_IN, /* GPIO2_IRQ */
157 };
158
159 static const struct imxuart_platform_data uart_pdata __initconst = {
160 .flags = IMXUART_HAVE_RTSCTS,
161 };
162
163 static const struct mxc_nand_platform_data
164 pca100_nand_board_info __initconst = {
165 .width = 1,
166 .hw_ecc = 1,
167 };
168
169 static const struct imxi2c_platform_data pca100_i2c1_data __initconst = {
170 .bitrate = 100000,
171 };
172
173 static struct at24_platform_data board_eeprom = {
174 .byte_len = 4096,
175 .page_size = 32,
176 .flags = AT24_FLAG_ADDR16,
177 };
178
179 static struct i2c_board_info pca100_i2c_devices[] = {
180 {
181 I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
182 .platform_data = &board_eeprom,
183 }, {
184 I2C_BOARD_INFO("pcf8563", 0x51),
185 }, {
186 I2C_BOARD_INFO("lm75", 0x4a),
187 }
188 };
189
190 static struct spi_eeprom at25320 = {
191 .name = "at25320an",
192 .byte_len = 4096,
193 .page_size = 32,
194 .flags = EE_ADDR2,
195 };
196
197 static struct spi_board_info pca100_spi_board_info[] __initdata = {
198 {
199 .modalias = "at25",
200 .max_speed_hz = 30000,
201 .bus_num = 0,
202 .chip_select = 1,
203 .platform_data = &at25320,
204 },
205 };
206
207 static int pca100_spi_cs[] = {SPI1_SS0, SPI1_SS1};
208
209 static const struct spi_imx_master pca100_spi0_data __initconst = {
210 .chipselect = pca100_spi_cs,
211 .num_chipselect = ARRAY_SIZE(pca100_spi_cs),
212 };
213
214 static void pca100_ac97_warm_reset(struct snd_ac97 *ac97)
215 {
216 mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT);
217 gpio_set_value(GPIO_PORTC + 20, 1);
218 udelay(2);
219 gpio_set_value(GPIO_PORTC + 20, 0);
220 mxc_gpio_mode(PC20_PF_SSI1_FS);
221 msleep(2);
222 }
223
224 static void pca100_ac97_cold_reset(struct snd_ac97 *ac97)
225 {
226 mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT); /* FS */
227 gpio_set_value(GPIO_PORTC + 20, 0);
228 mxc_gpio_mode(GPIO_PORTC | 22 | GPIO_GPIO | GPIO_OUT); /* TX */
229 gpio_set_value(GPIO_PORTC + 22, 0);
230 mxc_gpio_mode(GPIO_PORTC | 28 | GPIO_GPIO | GPIO_OUT); /* reset */
231 gpio_set_value(GPIO_PORTC + 28, 0);
232 udelay(10);
233 gpio_set_value(GPIO_PORTC + 28, 1);
234 mxc_gpio_mode(PC20_PF_SSI1_FS);
235 mxc_gpio_mode(PC22_PF_SSI1_TXD);
236 msleep(2);
237 }
238
239 static const struct imx_ssi_platform_data pca100_ssi_pdata __initconst = {
240 .ac97_reset = pca100_ac97_cold_reset,
241 .ac97_warm_reset = pca100_ac97_warm_reset,
242 .flags = IMX_SSI_USE_AC97,
243 };
244
245 static int pca100_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
246 void *data)
247 {
248 int ret;
249
250 ret = request_irq(IRQ_GPIOC(29), detect_irq,
251 IRQF_DISABLED | IRQF_TRIGGER_FALLING,
252 "imx-mmc-detect", data);
253 if (ret)
254 printk(KERN_ERR
255 "pca100: Failed to reuest irq for sd/mmc detection\n");
256
257 return ret;
258 }
259
260 static void pca100_sdhc2_exit(struct device *dev, void *data)
261 {
262 free_irq(IRQ_GPIOC(29), data);
263 }
264
265 static const struct imxmmc_platform_data sdhc_pdata __initconst = {
266 .init = pca100_sdhc2_init,
267 .exit = pca100_sdhc2_exit,
268 };
269
270 #if defined(CONFIG_USB_ULPI)
271 static int otg_phy_init(struct platform_device *pdev)
272 {
273 gpio_set_value(OTG_PHY_CS_GPIO, 0);
274
275 mdelay(10);
276
277 return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
278 }
279
280 static struct mxc_usbh_platform_data otg_pdata __initdata = {
281 .init = otg_phy_init,
282 .portsc = MXC_EHCI_MODE_ULPI,
283 };
284
285 static int usbh2_phy_init(struct platform_device *pdev)
286 {
287 gpio_set_value(USBH2_PHY_CS_GPIO, 0);
288
289 mdelay(10);
290
291 return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_INTERFACE_DIFF_UNI);
292 }
293
294 static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
295 .init = usbh2_phy_init,
296 .portsc = MXC_EHCI_MODE_ULPI,
297 };
298 #endif
299
300 static const struct fsl_usb2_platform_data otg_device_pdata __initconst = {
301 .operating_mode = FSL_USB2_DR_DEVICE,
302 .phy_mode = FSL_USB2_PHY_ULPI,
303 };
304
305 static int otg_mode_host;
306
307 static int __init pca100_otg_mode(char *options)
308 {
309 if (!strcmp(options, "host"))
310 otg_mode_host = 1;
311 else if (!strcmp(options, "device"))
312 otg_mode_host = 0;
313 else
314 pr_info("otg_mode neither \"host\" nor \"device\". "
315 "Defaulting to device\n");
316 return 0;
317 }
318 __setup("otg_mode=", pca100_otg_mode);
319
320 /* framebuffer info */
321 static struct imx_fb_videomode pca100_fb_modes[] = {
322 {
323 .mode = {
324 .name = "EMERGING-ETV570G0DHU",
325 .refresh = 60,
326 .xres = 640,
327 .yres = 480,
328 .pixclock = 39722, /* in ps (25.175 MHz) */
329 .hsync_len = 30,
330 .left_margin = 114,
331 .right_margin = 16,
332 .vsync_len = 3,
333 .upper_margin = 32,
334 .lower_margin = 0,
335 },
336 /*
337 * TFT
338 * Pixel pol active high
339 * HSYNC active low
340 * VSYNC active low
341 * use HSYNC for ACD count
342 * line clock disable while idle
343 * always enable line clock even if no data
344 */
345 .pcr = 0xf0c08080,
346 .bpp = 16,
347 },
348 };
349
350 static const struct imx_fb_platform_data pca100_fb_data __initconst = {
351 .mode = pca100_fb_modes,
352 .num_modes = ARRAY_SIZE(pca100_fb_modes),
353
354 .pwmr = 0x00A903FF,
355 .lscr1 = 0x00120300,
356 .dmacr = 0x00020010,
357 };
358
359 static void __init pca100_init(void)
360 {
361 int ret;
362
363 /* SSI unit */
364 mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0,
365 MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */
366 MXC_AUDMUX_V1_PCR_TFCSEL(3) |
367 MXC_AUDMUX_V1_PCR_TCLKDIR | /* clock is output */
368 MXC_AUDMUX_V1_PCR_RXDSEL(3));
369 mxc_audmux_v1_configure_port(3,
370 MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */
371 MXC_AUDMUX_V1_PCR_TFCSEL(0) |
372 MXC_AUDMUX_V1_PCR_TFSDIR |
373 MXC_AUDMUX_V1_PCR_RXDSEL(0));
374
375 ret = mxc_gpio_setup_multiple_pins(pca100_pins,
376 ARRAY_SIZE(pca100_pins), "PCA100");
377 if (ret)
378 printk(KERN_ERR "pca100: Failed to setup pins (%d)\n", ret);
379
380 imx27_add_imx_ssi(0, &pca100_ssi_pdata);
381
382 imx27_add_imx_uart0(&uart_pdata);
383
384 imx27_add_mxc_mmc(1, &sdhc_pdata);
385
386 imx27_add_mxc_nand(&pca100_nand_board_info);
387
388 /* only the i2c master 1 is used on this CPU card */
389 i2c_register_board_info(1, pca100_i2c_devices,
390 ARRAY_SIZE(pca100_i2c_devices));
391
392 imx27_add_imx_i2c(1, &pca100_i2c1_data);
393
394 mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_IN);
395 mxc_gpio_mode(GPIO_PORTD | 27 | GPIO_GPIO | GPIO_IN);
396 spi_register_board_info(pca100_spi_board_info,
397 ARRAY_SIZE(pca100_spi_board_info));
398 imx27_add_spi_imx0(&pca100_spi0_data);
399
400 gpio_request(OTG_PHY_CS_GPIO, "usb-otg-cs");
401 gpio_direction_output(OTG_PHY_CS_GPIO, 1);
402 gpio_request(USBH2_PHY_CS_GPIO, "usb-host2-cs");
403 gpio_direction_output(USBH2_PHY_CS_GPIO, 1);
404
405 #if defined(CONFIG_USB_ULPI)
406 if (otg_mode_host) {
407 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
408 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
409
410 imx27_add_mxc_ehci_otg(&otg_pdata);
411 }
412
413 usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
414 ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT);
415
416 imx27_add_mxc_ehci_hs(2, &usbh2_pdata);
417 #endif
418 if (!otg_mode_host) {
419 gpio_set_value(OTG_PHY_CS_GPIO, 0);
420 imx27_add_fsl_usb2_udc(&otg_device_pdata);
421 }
422
423 imx27_add_imx_fb(&pca100_fb_data);
424
425 imx27_add_fec(NULL);
426 imx27_add_imx2_wdt(NULL);
427 imx27_add_mxc_w1(NULL);
428 }
429
430 static void __init pca100_timer_init(void)
431 {
432 mx27_clocks_init(26000000);
433 }
434
435 static struct sys_timer pca100_timer = {
436 .init = pca100_timer_init,
437 };
438
439 MACHINE_START(PCA100, "phyCARD-i.MX27")
440 .boot_params = MX27_PHYS_OFFSET + 0x100,
441 .map_io = mx27_map_io,
442 .init_early = imx27_init_early,
443 .init_irq = mx27_init_irq,
444 .init_machine = pca100_init,
445 .timer = &pca100_timer,
446 MACHINE_END
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