arch/arm/mach-mmp/cputype.h

   1 #ifndef __ASM_MACH_CPUTYPE_H
   2 #define __ASM_MACH_CPUTYPE_H
   3
   4 #include <asm/cputype.h>
   5
   6 /*
   7  *  CPU   Stepping   CPU_ID      CHIP_ID
   8  *
   9  * PXA168    S0    0x56158400   0x0000C910
  10  * PXA168    A0    0x56158400   0x00A0A168
  11  * PXA910    Y1    0x56158400   0x00F2C920
  12  * PXA910    A0    0x56158400   0x00F2C910
  13  * PXA910    A1    0x56158400   0x00A0C910
  14  * PXA920    Y0    0x56158400   0x00F2C920
  15  * PXA920    A0    0x56158400   0x00A0C920
  16  * PXA920    A1    0x56158400   0x00A1C920
  17  * MMP2      Z0    0x560f5811   0x00F00410
  18  * MMP2      Z1    0x560f5811   0x00E00410
  19  * MMP2      A0    0x560f5811   0x00A0A610
  20  */
  21
  22 extern unsigned int mmp_chip_id;
  23
  24 #ifdef CONFIG_CPU_PXA168
  25 static inline int cpu_is_pxa168(void)
  26 {
  27         return (((read_cpuid_id() >> 8) & 0xff) == 0x84) &&
  28                 ((mmp_chip_id & 0xfff) == 0x168);
  29 }
  30 #else
  31 #define cpu_is_pxa168() (0)
  32 #endif
  33
  34 /* cpu_is_pxa910() is shared on both pxa910 and pxa920 */
  35 #ifdef CONFIG_CPU_PXA910
  36 static inline int cpu_is_pxa910(void)
  37 {
  38         return (((read_cpuid_id() >> 8) & 0xff) == 0x84) &&
  39                 (((mmp_chip_id & 0xfff) == 0x910) ||
  40                  ((mmp_chip_id & 0xfff) == 0x920));
  41 }
  42 #else
  43 #define cpu_is_pxa910() (0)
  44 #endif
  45
  46 #ifdef CONFIG_CPU_MMP2
  47 static inline int cpu_is_mmp2(void)
  48 {
  49         return (((read_cpuid_id() >> 8) & 0xff) == 0x58);
  50 }
  51 #else
  52 #define cpu_is_mmp2()   (0)
  53 #endif
  54
  55 #endif /* __ASM_MACH_CPUTYPE_H */