Merge branch 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux...
[deliverable/linux.git] / arch / arm / mach-msm / io.c
1 /* arch/arm/mach-msm/io.c
2 *
3 * MSM7K, QSD io support
4 *
5 * Copyright (C) 2007 Google, Inc.
6 * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
7 * Author: Brian Swetland <swetland@google.com>
8 *
9 * This software is licensed under the terms of the GNU General Public
10 * License version 2, as published by the Free Software Foundation, and
11 * may be copied, distributed, and modified under those terms.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 */
19
20 #include <linux/kernel.h>
21 #include <linux/bug.h>
22 #include <linux/init.h>
23 #include <linux/io.h>
24 #include <linux/export.h>
25
26 #include <mach/hardware.h>
27 #include <asm/page.h>
28 #include <mach/msm_iomap.h>
29 #include <asm/mach/map.h>
30
31 #include "common.h"
32
33 #define MSM_CHIP_DEVICE_TYPE(name, chip, mem_type) { \
34 .virtual = (unsigned long) MSM_##name##_BASE, \
35 .pfn = __phys_to_pfn(chip##_##name##_PHYS), \
36 .length = chip##_##name##_SIZE, \
37 .type = mem_type, \
38 }
39
40 #define MSM_DEVICE_TYPE(name, mem_type) \
41 MSM_CHIP_DEVICE_TYPE(name, MSM, mem_type)
42 #define MSM_CHIP_DEVICE(name, chip) \
43 MSM_CHIP_DEVICE_TYPE(name, chip, MT_DEVICE)
44 #define MSM_DEVICE(name) MSM_CHIP_DEVICE(name, MSM)
45
46 #if defined(CONFIG_ARCH_MSM7X00A)
47 static struct map_desc msm_io_desc[] __initdata = {
48 MSM_DEVICE_TYPE(VIC, MT_DEVICE_NONSHARED),
49 MSM_CHIP_DEVICE_TYPE(CSR, MSM7X00, MT_DEVICE_NONSHARED),
50 MSM_DEVICE_TYPE(DMOV, MT_DEVICE_NONSHARED),
51 MSM_CHIP_DEVICE_TYPE(GPIO1, MSM7X00, MT_DEVICE_NONSHARED),
52 MSM_CHIP_DEVICE_TYPE(GPIO2, MSM7X00, MT_DEVICE_NONSHARED),
53 MSM_DEVICE_TYPE(CLK_CTL, MT_DEVICE_NONSHARED),
54 {
55 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
56 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
57 .length = MSM_SHARED_RAM_SIZE,
58 .type = MT_DEVICE,
59 },
60 #if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
61 defined(CONFIG_DEBUG_MSM_UART3)
62 {
63 /* Must be last: virtual and pfn filled in by debug_ll_addr() */
64 .length = SZ_4K,
65 .type = MT_DEVICE_NONSHARED,
66 }
67 #endif
68 };
69
70 void __init msm_map_common_io(void)
71 {
72 size_t size = ARRAY_SIZE(msm_io_desc);
73
74 /* Make sure the peripheral register window is closed, since
75 * we will use PTE flags (TEX[1]=1,B=0,C=1) to determine which
76 * pages are peripheral interface or not.
77 */
78 asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0));
79 #if defined(CONFIG_DEBUG_MSM_UART1) || defined(CONFIG_DEBUG_MSM_UART2) || \
80 defined(CONFIG_DEBUG_MSM_UART3)
81 #ifdef CONFIG_MMU
82 debug_ll_addr(&msm_io_desc[size - 1].pfn,
83 &msm_io_desc[size - 1].virtual);
84 #endif
85 msm_io_desc[size - 1].pfn = __phys_to_pfn(msm_io_desc[size - 1].pfn);
86 #endif
87 iotable_init(msm_io_desc, size);
88 }
89 #endif
90
91 #ifdef CONFIG_ARCH_QSD8X50
92 static struct map_desc qsd8x50_io_desc[] __initdata = {
93 MSM_DEVICE(VIC),
94 MSM_CHIP_DEVICE(CSR, QSD8X50),
95 MSM_DEVICE(DMOV),
96 MSM_CHIP_DEVICE(GPIO1, QSD8X50),
97 MSM_CHIP_DEVICE(GPIO2, QSD8X50),
98 MSM_DEVICE(CLK_CTL),
99 MSM_DEVICE(SIRC),
100 MSM_DEVICE(SCPLL),
101 MSM_DEVICE(AD5),
102 MSM_DEVICE(MDC),
103 {
104 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
105 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
106 .length = MSM_SHARED_RAM_SIZE,
107 .type = MT_DEVICE,
108 },
109 };
110
111 void __init msm_map_qsd8x50_io(void)
112 {
113 debug_ll_io_init();
114 iotable_init(qsd8x50_io_desc, ARRAY_SIZE(qsd8x50_io_desc));
115 }
116 #endif /* CONFIG_ARCH_QSD8X50 */
117
118 #ifdef CONFIG_ARCH_MSM7X30
119 static struct map_desc msm7x30_io_desc[] __initdata = {
120 MSM_DEVICE(VIC),
121 MSM_CHIP_DEVICE(CSR, MSM7X30),
122 MSM_DEVICE(DMOV),
123 MSM_CHIP_DEVICE(GPIO1, MSM7X30),
124 MSM_CHIP_DEVICE(GPIO2, MSM7X30),
125 MSM_DEVICE(CLK_CTL),
126 MSM_DEVICE(CLK_CTL_SH2),
127 MSM_DEVICE(AD5),
128 MSM_DEVICE(MDC),
129 MSM_DEVICE(ACC),
130 MSM_DEVICE(SAW),
131 MSM_DEVICE(GCC),
132 MSM_DEVICE(TCSR),
133 {
134 .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
135 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
136 .length = MSM_SHARED_RAM_SIZE,
137 .type = MT_DEVICE,
138 },
139 };
140
141 void __init msm_map_msm7x30_io(void)
142 {
143 debug_ll_io_init();
144 iotable_init(msm7x30_io_desc, ARRAY_SIZE(msm7x30_io_desc));
145 }
146 #endif /* CONFIG_ARCH_MSM7X30 */
147
148 #ifdef CONFIG_ARCH_MSM7X00A
149 void __iomem *__msm_ioremap_caller(phys_addr_t phys_addr, size_t size,
150 unsigned int mtype, void *caller)
151 {
152 if (mtype == MT_DEVICE) {
153 /* The peripherals in the 88000000 - D0000000 range
154 * are only accessible by type MT_DEVICE_NONSHARED.
155 * Adjust mtype as necessary to make this "just work."
156 */
157 if ((phys_addr >= 0x88000000) && (phys_addr < 0xD0000000))
158 mtype = MT_DEVICE_NONSHARED;
159 }
160
161 return __arm_ioremap_caller(phys_addr, size, mtype, caller);
162 }
163 #endif
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