arch/arm/mach-msm/io.c

   1 /* arch/arm/mach-msm/io.c
   2  *
   3  * MSM7K, QSD io support
   4  *
   5  * Copyright (C) 2007 Google, Inc.
   6  * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved.
   7  * Author: Brian Swetland <swetland@google.com>
   8  *
   9  * This software is licensed under the terms of the GNU General Public
  10  * License version 2, as published by the Free Software Foundation, and
  11  * may be copied, distributed, and modified under those terms.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  */
  19
  20 #include <linux/kernel.h>
  21 #include <linux/init.h>
  22 #include <linux/io.h>
  23
  24 #include <mach/hardware.h>
  25 #include <asm/page.h>
  26 #include <mach/msm_iomap.h>
  27 #include <asm/mach/map.h>
  28
  29 #include <mach/board.h>
  30
  31 #define MSM_DEVICE(name) { \
  32                 .virtual = (unsigned long) MSM_##name##_BASE, \
  33                 .pfn = __phys_to_pfn(MSM_##name##_PHYS), \
  34                 .length = MSM_##name##_SIZE, \
  35                 .type = MT_DEVICE_NONSHARED, \
  36          }
  37
  38 #if defined(CONFIG_ARCH_MSM7X00A) || defined(CONFIG_ARCH_MSM7X27) \
  39         || defined(CONFIG_ARCH_MSM7X25)
  40 static struct map_desc msm_io_desc[] __initdata = {
  41         MSM_DEVICE(VIC),
  42         MSM_DEVICE(CSR),
  43         MSM_DEVICE(GPT),
  44         MSM_DEVICE(DMOV),
  45         MSM_DEVICE(GPIO1),
  46         MSM_DEVICE(GPIO2),
  47         MSM_DEVICE(CLK_CTL),
  48 #ifdef CONFIG_MSM_DEBUG_UART
  49         MSM_DEVICE(DEBUG_UART),
  50 #endif
  51 #ifdef CONFIG_ARCH_MSM7X30
  52         MSM_DEVICE(GCC),
  53 #endif
  54         {
  55                 .virtual =  (unsigned long) MSM_SHARED_RAM_BASE,
  56                 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
  57                 .length =   MSM_SHARED_RAM_SIZE,
  58                 .type =     MT_DEVICE,
  59         },
  60 };
  61
  62 void __init msm_map_common_io(void)
  63 {
  64         /* Make sure the peripheral register window is closed, since
  65          * we will use PTE flags (TEX[1]=1,B=0,C=1) to determine which
  66          * pages are peripheral interface or not.
  67          */
  68         asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0));
  69         iotable_init(msm_io_desc, ARRAY_SIZE(msm_io_desc));
  70 }
  71 #endif
  72
  73 #ifdef CONFIG_ARCH_QSD8X50
  74 static struct map_desc qsd8x50_io_desc[] __initdata = {
  75         MSM_DEVICE(VIC),
  76         MSM_DEVICE(CSR),
  77         MSM_DEVICE(TMR),
  78         MSM_DEVICE(DMOV),
  79         MSM_DEVICE(GPIO1),
  80         MSM_DEVICE(GPIO2),
  81         MSM_DEVICE(CLK_CTL),
  82         MSM_DEVICE(SIRC),
  83         MSM_DEVICE(SCPLL),
  84         MSM_DEVICE(AD5),
  85         MSM_DEVICE(MDC),
  86 #ifdef CONFIG_MSM_DEBUG_UART
  87         MSM_DEVICE(DEBUG_UART),
  88 #endif
  89         {
  90                 .virtual =  (unsigned long) MSM_SHARED_RAM_BASE,
  91                 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
  92                 .length =   MSM_SHARED_RAM_SIZE,
  93                 .type =     MT_DEVICE,
  94         },
  95 };
  96
  97 void __init msm_map_qsd8x50_io(void)
  98 {
  99         iotable_init(qsd8x50_io_desc, ARRAY_SIZE(qsd8x50_io_desc));
 100 }
 101 #endif /* CONFIG_ARCH_QSD8X50 */
 102
 103 #ifdef CONFIG_ARCH_MSM8X60
 104 static struct map_desc msm8x60_io_desc[] __initdata = {
 105         MSM_DEVICE(QGIC_DIST),
 106         MSM_DEVICE(QGIC_CPU),
 107         MSM_DEVICE(TMR),
 108         MSM_DEVICE(TMR0),
 109         MSM_DEVICE(ACC),
 110         MSM_DEVICE(GCC),
 111 };
 112
 113 void __init msm_map_msm8x60_io(void)
 114 {
 115         iotable_init(msm8x60_io_desc, ARRAY_SIZE(msm8x60_io_desc));
 116 }
 117 #endif /* CONFIG_ARCH_MSM8X60 */
 118
 119 #ifdef CONFIG_ARCH_MSM7X30
 120 static struct map_desc msm7x30_io_desc[] __initdata = {
 121         MSM_DEVICE(VIC),
 122         MSM_DEVICE(CSR),
 123         MSM_DEVICE(TMR),
 124         MSM_DEVICE(DMOV),
 125         MSM_DEVICE(GPIO1),
 126         MSM_DEVICE(GPIO2),
 127         MSM_DEVICE(CLK_CTL),
 128         MSM_DEVICE(CLK_CTL_SH2),
 129         MSM_DEVICE(AD5),
 130         MSM_DEVICE(MDC),
 131         MSM_DEVICE(ACC),
 132         MSM_DEVICE(SAW),
 133         MSM_DEVICE(GCC),
 134         MSM_DEVICE(TCSR),
 135 #ifdef CONFIG_MSM_DEBUG_UART
 136         MSM_DEVICE(DEBUG_UART),
 137 #endif
 138         {
 139                 .virtual =  (unsigned long) MSM_SHARED_RAM_BASE,
 140                 .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
 141                 .length =   MSM_SHARED_RAM_SIZE,
 142                 .type =     MT_DEVICE,
 143         },
 144 };
 145
 146 void __init msm_map_msm7x30_io(void)
 147 {
 148         iotable_init(msm7x30_io_desc, ARRAY_SIZE(msm7x30_io_desc));
 149 }
 150 #endif /* CONFIG_ARCH_MSM7X30 */
 151
 152 void __iomem *
 153 __msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
 154 {
 155         if (mtype == MT_DEVICE) {
 156                 /* The peripherals in the 88000000 - D0000000 range
 157                  * are only accessable by type MT_DEVICE_NONSHARED.
 158                  * Adjust mtype as necessary to make this "just work."
 159                  */
 160                 if ((phys_addr >= 0x88000000) && (phys_addr < 0xD0000000))
 161                         mtype = MT_DEVICE_NONSHARED;
 162         }
 163
 164         return __arm_ioremap_caller(phys_addr, size, mtype,
 165                 __builtin_return_address(0));
 166 }
 167 EXPORT_SYMBOL(__msm_ioremap);