2 * Copyright (C) 2000 Deep Blue Solutions Ltd
3 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
4 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #include <linux/platform_device.h>
22 #include <linux/mtd/mtd.h>
23 #include <linux/mtd/map.h>
24 #include <linux/mtd/partitions.h>
25 #include <linux/mtd/physmap.h>
26 #include <mach/common.h>
27 #include <mach/hardware.h>
28 #include <asm/mach-types.h>
29 #include <asm/mach/arch.h>
30 #include <asm/mach/time.h>
31 #include <asm/mach/map.h>
32 #include <mach/gpio.h>
33 #include <mach/imx-uart.h>
34 #include <mach/iomux-mx1-mx2.h>
35 #include <mach/board-mx27ads.h>
40 static struct physmap_flash_data mx27ads_flash_data
= {
44 static struct resource mx27ads_flash_resource
= {
46 .end
= 0xc0000000 + 0x02000000 - 1,
47 .flags
= IORESOURCE_MEM
,
51 static struct platform_device mx27ads_nor_mtd_device
= {
52 .name
= "physmap-flash",
55 .platform_data
= &mx27ads_flash_data
,
58 .resource
= &mx27ads_flash_resource
,
61 static int mxc_uart0_pins
[] = {
68 static int uart_mxc_port0_init(struct platform_device
*pdev
)
70 return mxc_gpio_setup_multiple_pins(mxc_uart0_pins
,
71 ARRAY_SIZE(mxc_uart0_pins
),
72 MXC_GPIO_ALLOC_MODE_NORMAL
, "UART0");
75 static int uart_mxc_port0_exit(struct platform_device
*pdev
)
77 return mxc_gpio_setup_multiple_pins(mxc_uart0_pins
,
78 ARRAY_SIZE(mxc_uart0_pins
),
79 MXC_GPIO_ALLOC_MODE_RELEASE
, "UART0");
82 static int mxc_uart1_pins
[] = {
89 static int uart_mxc_port1_init(struct platform_device
*pdev
)
91 return mxc_gpio_setup_multiple_pins(mxc_uart1_pins
,
92 ARRAY_SIZE(mxc_uart1_pins
),
93 MXC_GPIO_ALLOC_MODE_NORMAL
, "UART1");
96 static int uart_mxc_port1_exit(struct platform_device
*pdev
)
98 return mxc_gpio_setup_multiple_pins(mxc_uart1_pins
,
99 ARRAY_SIZE(mxc_uart1_pins
),
100 MXC_GPIO_ALLOC_MODE_RELEASE
, "UART1");
103 static int mxc_uart2_pins
[] = {
110 static int uart_mxc_port2_init(struct platform_device
*pdev
)
112 return mxc_gpio_setup_multiple_pins(mxc_uart2_pins
,
113 ARRAY_SIZE(mxc_uart2_pins
),
114 MXC_GPIO_ALLOC_MODE_NORMAL
, "UART2");
117 static int uart_mxc_port2_exit(struct platform_device
*pdev
)
119 return mxc_gpio_setup_multiple_pins(mxc_uart2_pins
,
120 ARRAY_SIZE(mxc_uart2_pins
),
121 MXC_GPIO_ALLOC_MODE_RELEASE
, "UART2");
124 static int mxc_uart3_pins
[] = {
131 static int uart_mxc_port3_init(struct platform_device
*pdev
)
133 return mxc_gpio_setup_multiple_pins(mxc_uart3_pins
,
134 ARRAY_SIZE(mxc_uart3_pins
),
135 MXC_GPIO_ALLOC_MODE_NORMAL
, "UART3");
138 static int uart_mxc_port3_exit(struct platform_device
*pdev
)
140 return mxc_gpio_setup_multiple_pins(mxc_uart3_pins
,
141 ARRAY_SIZE(mxc_uart3_pins
),
142 MXC_GPIO_ALLOC_MODE_RELEASE
, "UART3");
145 static int mxc_uart4_pins
[] = {
152 static int uart_mxc_port4_init(struct platform_device
*pdev
)
154 return mxc_gpio_setup_multiple_pins(mxc_uart4_pins
,
155 ARRAY_SIZE(mxc_uart4_pins
),
156 MXC_GPIO_ALLOC_MODE_NORMAL
, "UART4");
159 static int uart_mxc_port4_exit(struct platform_device
*pdev
)
161 return mxc_gpio_setup_multiple_pins(mxc_uart4_pins
,
162 ARRAY_SIZE(mxc_uart4_pins
),
163 MXC_GPIO_ALLOC_MODE_RELEASE
, "UART4");
166 static int mxc_uart5_pins
[] = {
173 static int uart_mxc_port5_init(struct platform_device
*pdev
)
175 return mxc_gpio_setup_multiple_pins(mxc_uart5_pins
,
176 ARRAY_SIZE(mxc_uart5_pins
),
177 MXC_GPIO_ALLOC_MODE_NORMAL
, "UART5");
180 static int uart_mxc_port5_exit(struct platform_device
*pdev
)
182 return mxc_gpio_setup_multiple_pins(mxc_uart5_pins
,
183 ARRAY_SIZE(mxc_uart5_pins
),
184 MXC_GPIO_ALLOC_MODE_RELEASE
, "UART5");
187 static struct platform_device
*platform_devices
[] __initdata
= {
188 &mx27ads_nor_mtd_device
,
191 static int mxc_fec_pins
[] = {
203 PD11_AOUT_FEC_TX_CLK
,
212 static void gpio_fec_active(void)
214 mxc_gpio_setup_multiple_pins(mxc_fec_pins
,
215 ARRAY_SIZE(mxc_fec_pins
),
216 MXC_GPIO_ALLOC_MODE_NORMAL
, "FEC");
219 static void gpio_fec_inactive(void)
221 mxc_gpio_setup_multiple_pins(mxc_fec_pins
,
222 ARRAY_SIZE(mxc_fec_pins
),
223 MXC_GPIO_ALLOC_MODE_RELEASE
, "FEC");
226 static struct imxuart_platform_data uart_pdata
[] = {
228 .init
= uart_mxc_port0_init
,
229 .exit
= uart_mxc_port0_exit
,
230 .flags
= IMXUART_HAVE_RTSCTS
,
232 .init
= uart_mxc_port1_init
,
233 .exit
= uart_mxc_port1_exit
,
234 .flags
= IMXUART_HAVE_RTSCTS
,
236 .init
= uart_mxc_port2_init
,
237 .exit
= uart_mxc_port2_exit
,
238 .flags
= IMXUART_HAVE_RTSCTS
,
240 .init
= uart_mxc_port3_init
,
241 .exit
= uart_mxc_port3_exit
,
242 .flags
= IMXUART_HAVE_RTSCTS
,
244 .init
= uart_mxc_port4_init
,
245 .exit
= uart_mxc_port4_exit
,
246 .flags
= IMXUART_HAVE_RTSCTS
,
248 .init
= uart_mxc_port5_init
,
249 .exit
= uart_mxc_port5_exit
,
250 .flags
= IMXUART_HAVE_RTSCTS
,
254 static void __init
mx27ads_board_init(void)
258 mxc_register_device(&mxc_uart_device0
, &uart_pdata
[0]);
259 mxc_register_device(&mxc_uart_device1
, &uart_pdata
[1]);
260 mxc_register_device(&mxc_uart_device2
, &uart_pdata
[2]);
261 mxc_register_device(&mxc_uart_device3
, &uart_pdata
[3]);
262 mxc_register_device(&mxc_uart_device4
, &uart_pdata
[4]);
263 mxc_register_device(&mxc_uart_device5
, &uart_pdata
[5]);
265 platform_add_devices(platform_devices
, ARRAY_SIZE(platform_devices
));
268 static void __init
mx27ads_timer_init(void)
270 unsigned long fref
= 26000000;
272 if ((__raw_readw(PBC_VERSION_REG
) & CKIH_27MHZ_BIT_SET
) == 0)
275 mxc_clocks_init(fref
);
276 mxc_timer_init("gpt_clk.0");
279 struct sys_timer mx27ads_timer
= {
280 .init
= mx27ads_timer_init
,
283 static struct map_desc mx27ads_io_desc
[] __initdata
= {
285 .virtual = PBC_BASE_ADDRESS
,
286 .pfn
= __phys_to_pfn(CS4_BASE_ADDR
),
292 void __init
mx27ads_map_io(void)
295 iotable_init(mx27ads_io_desc
, ARRAY_SIZE(mx27ads_io_desc
));
298 MACHINE_START(MX27ADS
, "Freescale i.MX27ADS")
299 /* maintainer: Freescale Semiconductor, Inc. */
300 .phys_io
= AIPI_BASE_ADDR
,
301 .io_pg_offst
= ((AIPI_BASE_ADDR_VIRT
) >> 18) & 0xfffc,
302 .boot_params
= PHYS_OFFSET
+ 0x100,
303 .map_io
= mx27ads_map_io
,
304 .init_irq
= mxc_init_irq
,
305 .init_machine
= mx27ads_board_init
,
306 .timer
= &mx27ads_timer
,