mx3/eukrea_mbimxsd-baseboard: add SD card detect support
[deliverable/linux.git] / arch / arm / mach-mx3 / eukrea_mbimxsd-baseboard.c
1 /*
2 * Copyright (C) 2010 Eric Benard - eric@eukrea.com
3 *
4 * Based on pcm970-baseboard.c which is :
5 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
19 * MA 02110-1301, USA.
20 */
21
22 #include <linux/types.h>
23 #include <linux/init.h>
24
25 #include <linux/gpio.h>
26 #include <linux/interrupt.h>
27 #include <linux/leds.h>
28 #include <linux/platform_device.h>
29 #include <linux/gpio_keys.h>
30 #include <linux/input.h>
31 #include <video/platform_lcd.h>
32 #include <linux/i2c.h>
33
34 #include <asm/mach-types.h>
35 #include <asm/mach/arch.h>
36 #include <asm/mach/time.h>
37 #include <asm/mach/map.h>
38
39 #include <mach/hardware.h>
40 #include <mach/common.h>
41 #include <mach/imx-uart.h>
42 #include <mach/iomux-mx35.h>
43 #include <mach/ipu.h>
44 #include <mach/mx3fb.h>
45 #include <mach/audmux.h>
46 #include <mach/esdhc.h>
47
48 #include "devices-imx35.h"
49 #include "devices.h"
50
51 static const struct fb_videomode fb_modedb[] = {
52 {
53 .name = "CMO-QVGA",
54 .refresh = 60,
55 .xres = 320,
56 .yres = 240,
57 .pixclock = KHZ2PICOS(6500),
58 .left_margin = 68,
59 .right_margin = 20,
60 .upper_margin = 15,
61 .lower_margin = 4,
62 .hsync_len = 30,
63 .vsync_len = 3,
64 .sync = 0,
65 .vmode = FB_VMODE_NONINTERLACED,
66 .flag = 0,
67 },
68 {
69 .name = "DVI-VGA",
70 .refresh = 60,
71 .xres = 640,
72 .yres = 480,
73 .pixclock = 32000,
74 .left_margin = 100,
75 .right_margin = 100,
76 .upper_margin = 7,
77 .lower_margin = 100,
78 .hsync_len = 7,
79 .vsync_len = 7,
80 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT |
81 FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
82 .vmode = FB_VMODE_NONINTERLACED,
83 .flag = 0,
84 },
85 {
86 .name = "DVI-SVGA",
87 .refresh = 60,
88 .xres = 800,
89 .yres = 600,
90 .pixclock = 25000,
91 .left_margin = 75,
92 .right_margin = 75,
93 .upper_margin = 7,
94 .lower_margin = 75,
95 .hsync_len = 7,
96 .vsync_len = 7,
97 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT |
98 FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
99 .vmode = FB_VMODE_NONINTERLACED,
100 .flag = 0,
101 },
102 };
103
104 static struct ipu_platform_data mx3_ipu_data = {
105 .irq_base = MXC_IPU_IRQ_START,
106 };
107
108 static struct mx3fb_platform_data mx3fb_pdata = {
109 .dma_dev = &mx3_ipu.dev,
110 .name = "CMO-QVGA",
111 .mode = fb_modedb,
112 .num_modes = ARRAY_SIZE(fb_modedb),
113 };
114
115 static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {
116 /* LCD */
117 MX35_PAD_LD0__IPU_DISPB_DAT_0,
118 MX35_PAD_LD1__IPU_DISPB_DAT_1,
119 MX35_PAD_LD2__IPU_DISPB_DAT_2,
120 MX35_PAD_LD3__IPU_DISPB_DAT_3,
121 MX35_PAD_LD4__IPU_DISPB_DAT_4,
122 MX35_PAD_LD5__IPU_DISPB_DAT_5,
123 MX35_PAD_LD6__IPU_DISPB_DAT_6,
124 MX35_PAD_LD7__IPU_DISPB_DAT_7,
125 MX35_PAD_LD8__IPU_DISPB_DAT_8,
126 MX35_PAD_LD9__IPU_DISPB_DAT_9,
127 MX35_PAD_LD10__IPU_DISPB_DAT_10,
128 MX35_PAD_LD11__IPU_DISPB_DAT_11,
129 MX35_PAD_LD12__IPU_DISPB_DAT_12,
130 MX35_PAD_LD13__IPU_DISPB_DAT_13,
131 MX35_PAD_LD14__IPU_DISPB_DAT_14,
132 MX35_PAD_LD15__IPU_DISPB_DAT_15,
133 MX35_PAD_LD16__IPU_DISPB_DAT_16,
134 MX35_PAD_LD17__IPU_DISPB_DAT_17,
135 MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC,
136 MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK,
137 MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY,
138 MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC,
139 /* Backlight */
140 MX35_PAD_CONTRAST__IPU_DISPB_CONTR,
141 /* LCD_PWR */
142 MX35_PAD_D3_CLS__GPIO1_4,
143 /* LED */
144 MX35_PAD_LD23__GPIO3_29,
145 /* SWITCH */
146 MX35_PAD_LD19__GPIO3_25,
147 /* UART2 */
148 MX35_PAD_CTS2__UART2_CTS,
149 MX35_PAD_RTS2__UART2_RTS,
150 MX35_PAD_TXD2__UART2_TXD_MUX,
151 MX35_PAD_RXD2__UART2_RXD_MUX,
152 /* I2S */
153 MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS,
154 MX35_PAD_STXD4__AUDMUX_AUD4_TXD,
155 MX35_PAD_SRXD4__AUDMUX_AUD4_RXD,
156 MX35_PAD_SCK4__AUDMUX_AUD4_TXC,
157 /* CAN2 */
158 MX35_PAD_TX5_RX0__CAN2_TXCAN,
159 MX35_PAD_TX4_RX1__CAN2_RXCAN,
160 /* SDCARD */
161 MX35_PAD_SD1_CMD__ESDHC1_CMD,
162 MX35_PAD_SD1_CLK__ESDHC1_CLK,
163 MX35_PAD_SD1_DATA0__ESDHC1_DAT0,
164 MX35_PAD_SD1_DATA1__ESDHC1_DAT1,
165 MX35_PAD_SD1_DATA2__ESDHC1_DAT2,
166 MX35_PAD_SD1_DATA3__ESDHC1_DAT3,
167 /* SD1 CD */
168 MX35_PAD_LD18__GPIO3_24,
169 };
170
171 #define GPIO_LED1 IMX_GPIO_NR(3, 29)
172 #define GPIO_SWITCH1 IMX_GPIO_NR(3, 25)
173 #define GPIO_LCDPWR IMX_GPIO_NR(1, 4)
174 #define GPIO_SD1CD IMX_GPIO_NR(3, 24)
175
176 static void eukrea_mbimxsd_lcd_power_set(struct plat_lcd_data *pd,
177 unsigned int power)
178 {
179 if (power)
180 gpio_direction_output(GPIO_LCDPWR, 1);
181 else
182 gpio_direction_output(GPIO_LCDPWR, 0);
183 }
184
185 static struct plat_lcd_data eukrea_mbimxsd_lcd_power_data = {
186 .set_power = eukrea_mbimxsd_lcd_power_set,
187 };
188
189 static struct platform_device eukrea_mbimxsd_lcd_powerdev = {
190 .name = "platform-lcd",
191 .dev.platform_data = &eukrea_mbimxsd_lcd_power_data,
192 };
193
194 static struct gpio_led eukrea_mbimxsd_leds[] = {
195 {
196 .name = "led1",
197 .default_trigger = "heartbeat",
198 .active_low = 1,
199 .gpio = GPIO_LED1,
200 },
201 };
202
203 static struct gpio_led_platform_data eukrea_mbimxsd_led_info = {
204 .leds = eukrea_mbimxsd_leds,
205 .num_leds = ARRAY_SIZE(eukrea_mbimxsd_leds),
206 };
207
208 static struct platform_device eukrea_mbimxsd_leds_gpio = {
209 .name = "leds-gpio",
210 .id = -1,
211 .dev = {
212 .platform_data = &eukrea_mbimxsd_led_info,
213 },
214 };
215
216 static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = {
217 {
218 .gpio = GPIO_SWITCH1,
219 .code = BTN_0,
220 .desc = "BP1",
221 .active_low = 1,
222 .wakeup = 1,
223 },
224 };
225
226 static struct gpio_keys_platform_data eukrea_mbimxsd_button_data = {
227 .buttons = eukrea_mbimxsd_gpio_buttons,
228 .nbuttons = ARRAY_SIZE(eukrea_mbimxsd_gpio_buttons),
229 };
230
231 static struct platform_device eukrea_mbimxsd_button_device = {
232 .name = "gpio-keys",
233 .id = -1,
234 .num_resources = 0,
235 .dev = {
236 .platform_data = &eukrea_mbimxsd_button_data,
237 }
238 };
239
240 static struct platform_device *platform_devices[] __initdata = {
241 &eukrea_mbimxsd_leds_gpio,
242 &eukrea_mbimxsd_button_device,
243 &eukrea_mbimxsd_lcd_powerdev,
244 };
245
246 static const struct imxuart_platform_data uart_pdata __initconst = {
247 .flags = IMXUART_HAVE_RTSCTS,
248 };
249
250 static struct i2c_board_info eukrea_mbimxsd_i2c_devices[] = {
251 {
252 I2C_BOARD_INFO("tlv320aic23", 0x1a),
253 },
254 };
255
256 static const
257 struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata __initconst = {
258 .flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE,
259 };
260
261 static struct esdhc_platform_data sd1_pdata = {
262 .cd_gpio = GPIO_SD1CD,
263 .wp_gpio = -EINVAL,
264 };
265
266 /*
267 * system init for baseboard usage. Will be called by cpuimx35 init.
268 *
269 * Add platform devices present on this baseboard and init
270 * them from CPU side as far as required to use them later on
271 */
272 void __init eukrea_mbimxsd35_baseboard_init(void)
273 {
274 if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd_pads,
275 ARRAY_SIZE(eukrea_mbimxsd_pads)))
276 printk(KERN_ERR "error setting mbimxsd pads !\n");
277
278 #if defined(CONFIG_SND_SOC_EUKREA_TLV320)
279 /* SSI unit master I2S codec connected to SSI_AUD4 */
280 mxc_audmux_v2_configure_port(0,
281 MXC_AUDMUX_V2_PTCR_SYN |
282 MXC_AUDMUX_V2_PTCR_TFSDIR |
283 MXC_AUDMUX_V2_PTCR_TFSEL(3) |
284 MXC_AUDMUX_V2_PTCR_TCLKDIR |
285 MXC_AUDMUX_V2_PTCR_TCSEL(3),
286 MXC_AUDMUX_V2_PDCR_RXDSEL(3)
287 );
288 mxc_audmux_v2_configure_port(3,
289 MXC_AUDMUX_V2_PTCR_SYN,
290 MXC_AUDMUX_V2_PDCR_RXDSEL(0)
291 );
292 #endif
293
294 imx35_add_imx_uart1(&uart_pdata);
295 mxc_register_device(&mx3_ipu, &mx3_ipu_data);
296 mxc_register_device(&mx3_fb, &mx3fb_pdata);
297
298 imx35_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata);
299
300 imx35_add_flexcan1(NULL);
301 imx35_add_sdhci_esdhc_imx(0, &sd1_pdata);
302
303 gpio_request(GPIO_LED1, "LED1");
304 gpio_direction_output(GPIO_LED1, 1);
305 gpio_free(GPIO_LED1);
306
307 gpio_request(GPIO_SWITCH1, "SWITCH1");
308 gpio_direction_input(GPIO_SWITCH1);
309 gpio_free(GPIO_SWITCH1);
310
311 gpio_request(GPIO_LCDPWR, "LCDPWR");
312 gpio_direction_output(GPIO_LCDPWR, 1);
313
314 i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices,
315 ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));
316
317 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
318 }
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