arch/arm/mach-mx3/mach-mx31_3ds.c

   1 /*
   2  *  Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <linux/delay.h>
  16 #include <linux/types.h>
  17 #include <linux/init.h>
  18 #include <linux/clk.h>
  19 #include <linux/irq.h>
  20 #include <linux/gpio.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/mfd/mc13783.h>
  23 #include <linux/spi/spi.h>
  24 #include <linux/regulator/machine.h>
  25
  26 #include <mach/hardware.h>
  27 #include <asm/mach-types.h>
  28 #include <asm/mach/arch.h>
  29 #include <asm/mach/time.h>
  30 #include <asm/memory.h>
  31 #include <asm/mach/map.h>
  32 #include <mach/common.h>
  33 #include <mach/iomux-mx3.h>
  34 #include <mach/3ds_debugboard.h>
  35
  36 #include "devices-imx31.h"
  37 #include "devices.h"
  38
  39 /* CPLD IRQ line for external uart, external ethernet etc */
  40 #define EXPIO_PARENT_INT        IOMUX_TO_IRQ(MX31_PIN_GPIO1_1)
  41
  42 /*
  43  * This file contains the board-specific initialization routines.
  44  */
  45
  46 static int mx31_3ds_pins[] = {
  47         /* UART1 */
  48         MX31_PIN_CTS1__CTS1,
  49         MX31_PIN_RTS1__RTS1,
  50         MX31_PIN_TXD1__TXD1,
  51         MX31_PIN_RXD1__RXD1,
  52         IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO),
  53         /* SPI 1 */
  54         MX31_PIN_CSPI2_SCLK__SCLK,
  55         MX31_PIN_CSPI2_MOSI__MOSI,
  56         MX31_PIN_CSPI2_MISO__MISO,
  57         MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
  58         MX31_PIN_CSPI2_SS0__SS0,
  59         MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */
  60         /* MC13783 IRQ */
  61         IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO),
  62         /* USB OTG reset */
  63         IOMUX_MODE(MX31_PIN_USB_PWR, IOMUX_CONFIG_GPIO),
  64         /* USB OTG */
  65         MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
  66         MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
  67         MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
  68         MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
  69         MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
  70         MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
  71         MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
  72         MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
  73         MX31_PIN_USBOTG_CLK__USBOTG_CLK,
  74         MX31_PIN_USBOTG_DIR__USBOTG_DIR,
  75         MX31_PIN_USBOTG_NXT__USBOTG_NXT,
  76         MX31_PIN_USBOTG_STP__USBOTG_STP,
  77         /*Keyboard*/
  78         MX31_PIN_KEY_ROW0_KEY_ROW0,
  79         MX31_PIN_KEY_ROW1_KEY_ROW1,
  80         MX31_PIN_KEY_ROW2_KEY_ROW2,
  81         MX31_PIN_KEY_COL0_KEY_COL0,
  82         MX31_PIN_KEY_COL1_KEY_COL1,
  83         MX31_PIN_KEY_COL2_KEY_COL2,
  84         MX31_PIN_KEY_COL3_KEY_COL3,
  85 };
  86
  87 /*
  88  * Matrix keyboard
  89  */
  90
  91 static const uint32_t mx31_3ds_keymap[] = {
  92         KEY(0, 0, KEY_UP),
  93         KEY(0, 1, KEY_DOWN),
  94         KEY(1, 0, KEY_RIGHT),
  95         KEY(1, 1, KEY_LEFT),
  96         KEY(1, 2, KEY_ENTER),
  97         KEY(2, 0, KEY_F6),
  98         KEY(2, 1, KEY_F8),
  99         KEY(2, 2, KEY_F9),
 100         KEY(2, 3, KEY_F10),
 101 };
 102
 103 static const struct matrix_keymap_data mx31_3ds_keymap_data __initconst = {
 104         .keymap         = mx31_3ds_keymap,
 105         .keymap_size    = ARRAY_SIZE(mx31_3ds_keymap),
 106 };
 107
 108 /* Regulators */
 109 static struct regulator_init_data pwgtx_init = {
 110         .constraints = {
 111                 .boot_on        = 1,
 112                 .always_on      = 1,
 113         },
 114 };
 115
 116 static struct mc13783_regulator_init_data mx31_3ds_regulators[] = {
 117         {
 118                 .id = MC13783_REGU_PWGT1SPI, /* Power Gate for ARM core. */
 119                 .init_data = &pwgtx_init,
 120         }, {
 121                 .id = MC13783_REGU_PWGT2SPI, /* Power Gate for L2 Cache. */
 122                 .init_data = &pwgtx_init,
 123         },
 124 };
 125
 126 /* MC13783 */
 127 static struct mc13783_platform_data mc13783_pdata __initdata = {
 128         .regulators = mx31_3ds_regulators,
 129         .num_regulators = ARRAY_SIZE(mx31_3ds_regulators),
 130         .flags  = MC13783_USE_REGULATOR,
 131 };
 132
 133 /* SPI */
 134 static int spi1_internal_chipselect[] = {
 135         MXC_SPI_CS(0),
 136         MXC_SPI_CS(2),
 137 };
 138
 139 static const struct spi_imx_master spi1_pdata __initconst = {
 140         .chipselect     = spi1_internal_chipselect,
 141         .num_chipselect = ARRAY_SIZE(spi1_internal_chipselect),
 142 };
 143
 144 static struct spi_board_info mx31_3ds_spi_devs[] __initdata = {
 145         {
 146                 .modalias       = "mc13783",
 147                 .max_speed_hz   = 1000000,
 148                 .bus_num        = 1,
 149                 .chip_select    = 1, /* SS2 */
 150                 .platform_data  = &mc13783_pdata,
 151                 .irq            = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
 152                 .mode = SPI_CS_HIGH,
 153         },
 154 };
 155
 156 /*
 157  * NAND Flash
 158  */
 159 static const struct mxc_nand_platform_data
 160 mx31_3ds_nand_board_info __initconst = {
 161         .width          = 1,
 162         .hw_ecc         = 1,
 163 #ifdef MACH_MX31_3DS_MXC_NAND_USE_BBT
 164         .flash_bbt      = 1,
 165 #endif
 166 };
 167
 168 /*
 169  * USB OTG
 170  */
 171
 172 #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
 173                      PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
 174
 175 #define USBOTG_RST_B IOMUX_TO_GPIO(MX31_PIN_USB_PWR)
 176
 177 static int mx31_3ds_usbotg_init(void)
 178 {
 179         int err;
 180
 181         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
 182         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
 183         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
 184         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
 185         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
 186         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
 187         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
 188         mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
 189         mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
 190         mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
 191         mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
 192         mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
 193
 194         err = gpio_request(USBOTG_RST_B, "otgusb-reset");
 195         if (err) {
 196                 pr_err("Failed to request the USB OTG reset gpio\n");
 197                 return err;
 198         }
 199
 200         err = gpio_direction_output(USBOTG_RST_B, 0);
 201         if (err) {
 202                 pr_err("Failed to drive the USB OTG reset gpio\n");
 203                 goto usbotg_free_reset;
 204         }
 205
 206         mdelay(1);
 207         gpio_set_value(USBOTG_RST_B, 1);
 208         return 0;
 209
 210 usbotg_free_reset:
 211         gpio_free(USBOTG_RST_B);
 212         return err;
 213 }
 214
 215 static const struct fsl_usb2_platform_data usbotg_pdata __initconst = {
 216         .operating_mode = FSL_USB2_DR_DEVICE,
 217         .phy_mode       = FSL_USB2_PHY_ULPI,
 218 };
 219
 220 static const struct imxuart_platform_data uart_pdata __initconst = {
 221         .flags = IMXUART_HAVE_RTSCTS,
 222 };
 223
 224 /*
 225  * Set up static virtual mappings.
 226  */
 227 static void __init mx31_3ds_map_io(void)
 228 {
 229         mx31_map_io();
 230 }
 231
 232 /*!
 233  * Board specific initialization.
 234  */
 235 static void __init mxc_board_init(void)
 236 {
 237         mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins),
 238                                       "mx31_3ds");
 239
 240         imx31_add_imx_uart0(&uart_pdata);
 241         imx31_add_mxc_nand(&mx31_3ds_nand_board_info);
 242
 243         imx31_add_spi_imx1(&spi1_pdata);
 244         spi_register_board_info(mx31_3ds_spi_devs,
 245                                                 ARRAY_SIZE(mx31_3ds_spi_devs));
 246
 247         imx31_add_imx_keypad(&mx31_3ds_keymap_data);
 248
 249         mx31_3ds_usbotg_init();
 250         imx31_add_fsl_usb2_udc(&usbotg_pdata);
 251
 252         if (mxc_expio_init(MX31_CS5_BASE_ADDR, EXPIO_PARENT_INT))
 253                 printk(KERN_WARNING "Init of the debug board failed, all "
 254                                     "devices on the debug board are unusable.\n");
 255 }
 256
 257 static void __init mx31_3ds_timer_init(void)
 258 {
 259         mx31_clocks_init(26000000);
 260 }
 261
 262 static struct sys_timer mx31_3ds_timer = {
 263         .init   = mx31_3ds_timer_init,
 264 };
 265
 266 /*
 267  * The following uses standard kernel macros defined in arch.h in order to
 268  * initialize __mach_desc_MX31_3DS data structure.
 269  */
 270 MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
 271         /* Maintainer: Freescale Semiconductor, Inc. */
 272         .boot_params    = MX3x_PHYS_OFFSET + 0x100,
 273         .map_io         = mx31_3ds_map_io,
 274         .init_irq       = mx31_init_irq,
 275         .init_machine   = mxc_board_init,
 276         .timer          = &mx31_3ds_timer,
 277 MACHINE_END