2 * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #include <linux/delay.h>
16 #include <linux/types.h>
17 #include <linux/init.h>
18 #include <linux/clk.h>
19 #include <linux/irq.h>
20 #include <linux/gpio.h>
21 #include <linux/platform_device.h>
22 #include <linux/mfd/mc13783.h>
23 #include <linux/spi/spi.h>
24 #include <linux/regulator/machine.h>
25 #include <linux/input/matrix_keypad.h>
27 #include <mach/hardware.h>
28 #include <asm/mach-types.h>
29 #include <asm/mach/arch.h>
30 #include <asm/mach/time.h>
31 #include <asm/memory.h>
32 #include <asm/mach/map.h>
33 #include <mach/common.h>
34 #include <mach/iomux-mx3.h>
35 #include <mach/3ds_debugboard.h>
37 #include "devices-imx31.h"
40 /* CPLD IRQ line for external uart, external ethernet etc */
41 #define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_1)
44 * This file contains the board-specific initialization routines.
47 static int mx31_3ds_pins
[] = {
53 IOMUX_MODE(MX31_PIN_GPIO1_1
, IOMUX_CONFIG_GPIO
),
55 MX31_PIN_CSPI2_SCLK__SCLK
,
56 MX31_PIN_CSPI2_MOSI__MOSI
,
57 MX31_PIN_CSPI2_MISO__MISO
,
58 MX31_PIN_CSPI2_SPI_RDY__SPI_RDY
,
59 MX31_PIN_CSPI2_SS0__SS0
,
60 MX31_PIN_CSPI2_SS2__SS2
, /*CS for MC13783 */
62 IOMUX_MODE(MX31_PIN_GPIO1_3
, IOMUX_CONFIG_GPIO
),
64 IOMUX_MODE(MX31_PIN_USB_PWR
, IOMUX_CONFIG_GPIO
),
66 MX31_PIN_USBOTG_DATA0__USBOTG_DATA0
,
67 MX31_PIN_USBOTG_DATA1__USBOTG_DATA1
,
68 MX31_PIN_USBOTG_DATA2__USBOTG_DATA2
,
69 MX31_PIN_USBOTG_DATA3__USBOTG_DATA3
,
70 MX31_PIN_USBOTG_DATA4__USBOTG_DATA4
,
71 MX31_PIN_USBOTG_DATA5__USBOTG_DATA5
,
72 MX31_PIN_USBOTG_DATA6__USBOTG_DATA6
,
73 MX31_PIN_USBOTG_DATA7__USBOTG_DATA7
,
74 MX31_PIN_USBOTG_CLK__USBOTG_CLK
,
75 MX31_PIN_USBOTG_DIR__USBOTG_DIR
,
76 MX31_PIN_USBOTG_NXT__USBOTG_NXT
,
77 MX31_PIN_USBOTG_STP__USBOTG_STP
,
79 MX31_PIN_KEY_ROW0_KEY_ROW0
,
80 MX31_PIN_KEY_ROW1_KEY_ROW1
,
81 MX31_PIN_KEY_ROW2_KEY_ROW2
,
82 MX31_PIN_KEY_COL0_KEY_COL0
,
83 MX31_PIN_KEY_COL1_KEY_COL1
,
84 MX31_PIN_KEY_COL2_KEY_COL2
,
85 MX31_PIN_KEY_COL3_KEY_COL3
,
92 static const uint32_t mx31_3ds_keymap
[] = {
104 static struct matrix_keymap_data mx31_3ds_keymap_data
= {
105 .keymap
= mx31_3ds_keymap
,
106 .keymap_size
= ARRAY_SIZE(mx31_3ds_keymap
),
110 static struct regulator_init_data pwgtx_init
= {
117 static struct mc13783_regulator_init_data mx31_3ds_regulators
[] = {
119 .id
= MC13783_REGU_PWGT1SPI
, /* Power Gate for ARM core. */
120 .init_data
= &pwgtx_init
,
122 .id
= MC13783_REGU_PWGT2SPI
, /* Power Gate for L2 Cache. */
123 .init_data
= &pwgtx_init
,
128 static struct mc13783_platform_data mc13783_pdata __initdata
= {
129 .regulators
= mx31_3ds_regulators
,
130 .num_regulators
= ARRAY_SIZE(mx31_3ds_regulators
),
131 .flags
= MC13783_USE_REGULATOR
,
135 static int spi1_internal_chipselect
[] = {
140 static const struct spi_imx_master spi1_pdata __initconst
= {
141 .chipselect
= spi1_internal_chipselect
,
142 .num_chipselect
= ARRAY_SIZE(spi1_internal_chipselect
),
145 static struct spi_board_info mx31_3ds_spi_devs
[] __initdata
= {
147 .modalias
= "mc13783",
148 .max_speed_hz
= 1000000,
150 .chip_select
= 1, /* SS2 */
151 .platform_data
= &mc13783_pdata
,
152 .irq
= IOMUX_TO_IRQ(MX31_PIN_GPIO1_3
),
160 static const struct mxc_nand_platform_data
161 mx31_3ds_nand_board_info __initconst
= {
164 #ifdef MACH_MX31_3DS_MXC_NAND_USE_BBT
173 #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
174 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
176 #define USBOTG_RST_B IOMUX_TO_GPIO(MX31_PIN_USB_PWR)
178 static int mx31_3ds_usbotg_init(void)
182 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0
, USB_PAD_CFG
);
183 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1
, USB_PAD_CFG
);
184 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2
, USB_PAD_CFG
);
185 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3
, USB_PAD_CFG
);
186 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4
, USB_PAD_CFG
);
187 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5
, USB_PAD_CFG
);
188 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6
, USB_PAD_CFG
);
189 mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7
, USB_PAD_CFG
);
190 mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK
, USB_PAD_CFG
);
191 mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR
, USB_PAD_CFG
);
192 mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT
, USB_PAD_CFG
);
193 mxc_iomux_set_pad(MX31_PIN_USBOTG_STP
, USB_PAD_CFG
);
195 err
= gpio_request(USBOTG_RST_B
, "otgusb-reset");
197 pr_err("Failed to request the USB OTG reset gpio\n");
201 err
= gpio_direction_output(USBOTG_RST_B
, 0);
203 pr_err("Failed to drive the USB OTG reset gpio\n");
204 goto usbotg_free_reset
;
208 gpio_set_value(USBOTG_RST_B
, 1);
212 gpio_free(USBOTG_RST_B
);
216 static const struct fsl_usb2_platform_data usbotg_pdata __initconst
= {
217 .operating_mode
= FSL_USB2_DR_DEVICE
,
218 .phy_mode
= FSL_USB2_PHY_ULPI
,
221 static const struct imxuart_platform_data uart_pdata __initconst
= {
222 .flags
= IMXUART_HAVE_RTSCTS
,
226 * Set up static virtual mappings.
228 static void __init
mx31_3ds_map_io(void)
234 * Board specific initialization.
236 static void __init
mxc_board_init(void)
238 mxc_iomux_setup_multiple_pins(mx31_3ds_pins
, ARRAY_SIZE(mx31_3ds_pins
),
241 imx31_add_imx_uart0(&uart_pdata
);
242 imx31_add_mxc_nand(&mx31_3ds_nand_board_info
);
244 imx31_add_spi_imx1(&spi1_pdata
);
245 spi_register_board_info(mx31_3ds_spi_devs
,
246 ARRAY_SIZE(mx31_3ds_spi_devs
));
248 mxc_register_device(&imx_kpp_device
, &mx31_3ds_keymap_data
);
250 mx31_3ds_usbotg_init();
251 imx31_add_fsl_usb2_udc(&usbotg_pdata
);
253 if (mxc_expio_init(MX31_CS5_BASE_ADDR
, EXPIO_PARENT_INT
))
254 printk(KERN_WARNING
"Init of the debug board failed, all "
255 "devices on the debug board are unusable.\n");
258 static void __init
mx31_3ds_timer_init(void)
260 mx31_clocks_init(26000000);
263 static struct sys_timer mx31_3ds_timer
= {
264 .init
= mx31_3ds_timer_init
,
268 * The following uses standard kernel macros defined in arch.h in order to
269 * initialize __mach_desc_MX31_3DS data structure.
271 MACHINE_START(MX31_3DS
, "Freescale MX31PDK (3DS)")
272 /* Maintainer: Freescale Semiconductor, Inc. */
273 .boot_params
= MX3x_PHYS_OFFSET
+ 0x100,
274 .map_io
= mx31_3ds_map_io
,
275 .init_irq
= mx31_init_irq
,
276 .init_machine
= mxc_board_init
,
277 .timer
= &mx31_3ds_timer
,