arch/arm/mach-mx3/mach-pcm037.c

   1 /*
   2  *  Copyright (C) 2008 Sascha Hauer, Pengutronix
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <linux/types.h>
  16 #include <linux/init.h>
  17 #include <linux/dma-mapping.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/mtd/physmap.h>
  20 #include <linux/mtd/plat-ram.h>
  21 #include <linux/memory.h>
  22 #include <linux/gpio.h>
  23 #include <linux/smsc911x.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/i2c.h>
  26 #include <linux/i2c/at24.h>
  27 #include <linux/delay.h>
  28 #include <linux/spi/spi.h>
  29 #include <linux/irq.h>
  30 #include <linux/fsl_devices.h>
  31 #include <linux/can/platform/sja1000.h>
  32 #include <linux/usb/otg.h>
  33 #include <linux/usb/ulpi.h>
  34 #include <linux/gfp.h>
  35
  36 #include <media/soc_camera.h>
  37
  38 #include <asm/mach-types.h>
  39 #include <asm/mach/arch.h>
  40 #include <asm/mach/time.h>
  41 #include <asm/mach/map.h>
  42 #include <mach/common.h>
  43 #include <mach/hardware.h>
  44 #include <mach/imx-uart.h>
  45 #include <mach/iomux-mx3.h>
  46 #include <mach/ipu.h>
  47 #include <mach/mmc.h>
  48 #include <mach/mx3_camera.h>
  49 #include <mach/mx3fb.h>
  50 #include <mach/mxc_ehci.h>
  51 #include <mach/ulpi.h>
  52
  53 #include "devices-imx31.h"
  54 #include "devices.h"
  55 #include "pcm037.h"
  56
  57 static enum pcm037_board_variant pcm037_instance = PCM037_PCM970;
  58
  59 static int __init pcm037_variant_setup(char *str)
  60 {
  61         if (!strcmp("eet", str))
  62                 pcm037_instance = PCM037_EET;
  63         else if (strcmp("pcm970", str))
  64                 pr_warning("Unknown pcm037 baseboard variant %s\n", str);
  65
  66         return 1;
  67 }
  68
  69 /* Supported values: "pcm970" (default) and "eet" */
  70 __setup("pcm037_variant=", pcm037_variant_setup);
  71
  72 enum pcm037_board_variant pcm037_variant(void)
  73 {
  74         return pcm037_instance;
  75 }
  76
  77 /* UART1 with RTS/CTS handshake signals */
  78 static unsigned int pcm037_uart1_handshake_pins[] = {
  79         MX31_PIN_CTS1__CTS1,
  80         MX31_PIN_RTS1__RTS1,
  81         MX31_PIN_TXD1__TXD1,
  82         MX31_PIN_RXD1__RXD1,
  83 };
  84
  85 /* UART1 without RTS/CTS handshake signals */
  86 static unsigned int pcm037_uart1_pins[] = {
  87         MX31_PIN_TXD1__TXD1,
  88         MX31_PIN_RXD1__RXD1,
  89 };
  90
  91 static unsigned int pcm037_pins[] = {
  92         /* I2C */
  93         MX31_PIN_CSPI2_MOSI__SCL,
  94         MX31_PIN_CSPI2_MISO__SDA,
  95         MX31_PIN_CSPI2_SS2__I2C3_SDA,
  96         MX31_PIN_CSPI2_SCLK__I2C3_SCL,
  97         /* SDHC1 */
  98         MX31_PIN_SD1_DATA3__SD1_DATA3,
  99         MX31_PIN_SD1_DATA2__SD1_DATA2,
 100         MX31_PIN_SD1_DATA1__SD1_DATA1,
 101         MX31_PIN_SD1_DATA0__SD1_DATA0,
 102         MX31_PIN_SD1_CLK__SD1_CLK,
 103         MX31_PIN_SD1_CMD__SD1_CMD,
 104         IOMUX_MODE(MX31_PIN_SCK6, IOMUX_CONFIG_GPIO), /* card detect */
 105         IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO), /* write protect */
 106         /* SPI1 */
 107         MX31_PIN_CSPI1_MOSI__MOSI,
 108         MX31_PIN_CSPI1_MISO__MISO,
 109         MX31_PIN_CSPI1_SCLK__SCLK,
 110         MX31_PIN_CSPI1_SPI_RDY__SPI_RDY,
 111         MX31_PIN_CSPI1_SS0__SS0,
 112         MX31_PIN_CSPI1_SS1__SS1,
 113         MX31_PIN_CSPI1_SS2__SS2,
 114         /* UART2 */
 115         MX31_PIN_TXD2__TXD2,
 116         MX31_PIN_RXD2__RXD2,
 117         MX31_PIN_CTS2__CTS2,
 118         MX31_PIN_RTS2__RTS2,
 119         /* UART3 */
 120         MX31_PIN_CSPI3_MOSI__RXD3,
 121         MX31_PIN_CSPI3_MISO__TXD3,
 122         MX31_PIN_CSPI3_SCLK__RTS3,
 123         MX31_PIN_CSPI3_SPI_RDY__CTS3,
 124         /* LAN9217 irq pin */
 125         IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO),
 126         /* Onewire */
 127         MX31_PIN_BATT_LINE__OWIRE,
 128         /* Framebuffer */
 129         MX31_PIN_LD0__LD0,
 130         MX31_PIN_LD1__LD1,
 131         MX31_PIN_LD2__LD2,
 132         MX31_PIN_LD3__LD3,
 133         MX31_PIN_LD4__LD4,
 134         MX31_PIN_LD5__LD5,
 135         MX31_PIN_LD6__LD6,
 136         MX31_PIN_LD7__LD7,
 137         MX31_PIN_LD8__LD8,
 138         MX31_PIN_LD9__LD9,
 139         MX31_PIN_LD10__LD10,
 140         MX31_PIN_LD11__LD11,
 141         MX31_PIN_LD12__LD12,
 142         MX31_PIN_LD13__LD13,
 143         MX31_PIN_LD14__LD14,
 144         MX31_PIN_LD15__LD15,
 145         MX31_PIN_LD16__LD16,
 146         MX31_PIN_LD17__LD17,
 147         MX31_PIN_VSYNC3__VSYNC3,
 148         MX31_PIN_HSYNC__HSYNC,
 149         MX31_PIN_FPSHIFT__FPSHIFT,
 150         MX31_PIN_DRDY0__DRDY0,
 151         MX31_PIN_D3_REV__D3_REV,
 152         MX31_PIN_CONTRAST__CONTRAST,
 153         MX31_PIN_D3_SPL__D3_SPL,
 154         MX31_PIN_D3_CLS__D3_CLS,
 155         MX31_PIN_LCS0__GPI03_23,
 156         /* CSI */
 157         IOMUX_MODE(MX31_PIN_CSI_D5, IOMUX_CONFIG_GPIO),
 158         MX31_PIN_CSI_D6__CSI_D6,
 159         MX31_PIN_CSI_D7__CSI_D7,
 160         MX31_PIN_CSI_D8__CSI_D8,
 161         MX31_PIN_CSI_D9__CSI_D9,
 162         MX31_PIN_CSI_D10__CSI_D10,
 163         MX31_PIN_CSI_D11__CSI_D11,
 164         MX31_PIN_CSI_D12__CSI_D12,
 165         MX31_PIN_CSI_D13__CSI_D13,
 166         MX31_PIN_CSI_D14__CSI_D14,
 167         MX31_PIN_CSI_D15__CSI_D15,
 168         MX31_PIN_CSI_HSYNC__CSI_HSYNC,
 169         MX31_PIN_CSI_MCLK__CSI_MCLK,
 170         MX31_PIN_CSI_PIXCLK__CSI_PIXCLK,
 171         MX31_PIN_CSI_VSYNC__CSI_VSYNC,
 172         /* GPIO */
 173         IOMUX_MODE(MX31_PIN_ATA_DMACK, IOMUX_CONFIG_GPIO),
 174         /* OTG */
 175         MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
 176         MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
 177         MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
 178         MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
 179         MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
 180         MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
 181         MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
 182         MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
 183         MX31_PIN_USBOTG_CLK__USBOTG_CLK,
 184         MX31_PIN_USBOTG_DIR__USBOTG_DIR,
 185         MX31_PIN_USBOTG_NXT__USBOTG_NXT,
 186         MX31_PIN_USBOTG_STP__USBOTG_STP,
 187         /* USB host 2 */
 188         IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
 189         IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
 190         IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
 191         IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
 192         IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
 193         IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
 194         IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC),
 195         IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC),
 196         IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC),
 197         IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC),
 198         IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC),
 199         IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC),
 200 };
 201
 202 static struct physmap_flash_data pcm037_flash_data = {
 203         .width  = 2,
 204 };
 205
 206 static struct resource pcm037_flash_resource = {
 207         .start  = 0xa0000000,
 208         .end    = 0xa1ffffff,
 209         .flags  = IORESOURCE_MEM,
 210 };
 211
 212 static struct platform_device pcm037_flash = {
 213         .name   = "physmap-flash",
 214         .id     = 0,
 215         .dev    = {
 216                 .platform_data  = &pcm037_flash_data,
 217         },
 218         .resource = &pcm037_flash_resource,
 219         .num_resources = 1,
 220 };
 221
 222 static struct imxuart_platform_data uart_pdata = {
 223         .flags = IMXUART_HAVE_RTSCTS,
 224 };
 225
 226 static struct resource smsc911x_resources[] = {
 227         {
 228                 .start          = MX31_CS1_BASE_ADDR + 0x300,
 229                 .end            = MX31_CS1_BASE_ADDR + 0x300 + SZ_64K - 1,
 230                 .flags          = IORESOURCE_MEM,
 231         }, {
 232                 .start          = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
 233                 .end            = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
 234                 .flags          = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
 235         },
 236 };
 237
 238 static struct smsc911x_platform_config smsc911x_info = {
 239         .flags          = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY |
 240                           SMSC911X_SAVE_MAC_ADDRESS,
 241         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
 242         .irq_type       = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
 243         .phy_interface  = PHY_INTERFACE_MODE_MII,
 244 };
 245
 246 static struct platform_device pcm037_eth = {
 247         .name           = "smsc911x",
 248         .id             = -1,
 249         .num_resources  = ARRAY_SIZE(smsc911x_resources),
 250         .resource       = smsc911x_resources,
 251         .dev            = {
 252                 .platform_data = &smsc911x_info,
 253         },
 254 };
 255
 256 static struct platdata_mtd_ram pcm038_sram_data = {
 257         .bankwidth = 2,
 258 };
 259
 260 static struct resource pcm038_sram_resource = {
 261         .start = MX31_CS4_BASE_ADDR,
 262         .end   = MX31_CS4_BASE_ADDR + 512 * 1024 - 1,
 263         .flags = IORESOURCE_MEM,
 264 };
 265
 266 static struct platform_device pcm037_sram_device = {
 267         .name = "mtd-ram",
 268         .id = 0,
 269         .dev = {
 270                 .platform_data = &pcm038_sram_data,
 271         },
 272         .num_resources = 1,
 273         .resource = &pcm038_sram_resource,
 274 };
 275
 276 static const struct mxc_nand_platform_data
 277 pcm037_nand_board_info __initconst = {
 278         .width = 1,
 279         .hw_ecc = 1,
 280 };
 281
 282 static const struct imxi2c_platform_data pcm037_i2c1_data __initconst = {
 283         .bitrate = 100000,
 284 };
 285
 286 static const struct imxi2c_platform_data pcm037_i2c2_data __initconst = {
 287         .bitrate = 20000,
 288 };
 289
 290 static struct at24_platform_data board_eeprom = {
 291         .byte_len = 4096,
 292         .page_size = 32,
 293         .flags = AT24_FLAG_ADDR16,
 294 };
 295
 296 static int pcm037_camera_power(struct device *dev, int on)
 297 {
 298         /* disable or enable the camera in X7 or X8 PCM970 connector */
 299         gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), !on);
 300         return 0;
 301 }
 302
 303 static struct i2c_board_info pcm037_i2c_camera[] = {
 304         {
 305                 I2C_BOARD_INFO("mt9t031", 0x5d),
 306         }, {
 307                 I2C_BOARD_INFO("mt9v022", 0x48),
 308         },
 309 };
 310
 311 static struct soc_camera_link iclink_mt9v022 = {
 312         .bus_id         = 0,            /* Must match with the camera ID */
 313         .board_info     = &pcm037_i2c_camera[1],
 314         .i2c_adapter_id = 2,
 315         .module_name    = "mt9v022",
 316 };
 317
 318 static struct soc_camera_link iclink_mt9t031 = {
 319         .bus_id         = 0,            /* Must match with the camera ID */
 320         .power          = pcm037_camera_power,
 321         .board_info     = &pcm037_i2c_camera[0],
 322         .i2c_adapter_id = 2,
 323         .module_name    = "mt9t031",
 324 };
 325
 326 static struct i2c_board_info pcm037_i2c_devices[] = {
 327         {
 328                 I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
 329                 .platform_data = &board_eeprom,
 330         }, {
 331                 I2C_BOARD_INFO("pcf8563", 0x51),
 332         }
 333 };
 334
 335 static struct platform_device pcm037_mt9t031 = {
 336         .name   = "soc-camera-pdrv",
 337         .id     = 0,
 338         .dev    = {
 339                 .platform_data = &iclink_mt9t031,
 340         },
 341 };
 342
 343 static struct platform_device pcm037_mt9v022 = {
 344         .name   = "soc-camera-pdrv",
 345         .id     = 1,
 346         .dev    = {
 347                 .platform_data = &iclink_mt9v022,
 348         },
 349 };
 350
 351 /* Not connected by default */
 352 #ifdef PCM970_SDHC_RW_SWITCH
 353 static int pcm970_sdhc1_get_ro(struct device *dev)
 354 {
 355         return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_SFS6));
 356 }
 357 #endif
 358
 359 #define SDHC1_GPIO_WP   IOMUX_TO_GPIO(MX31_PIN_SFS6)
 360 #define SDHC1_GPIO_DET  IOMUX_TO_GPIO(MX31_PIN_SCK6)
 361
 362 static int pcm970_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
 363                 void *data)
 364 {
 365         int ret;
 366
 367         ret = gpio_request(SDHC1_GPIO_DET, "sdhc-detect");
 368         if (ret)
 369                 return ret;
 370
 371         gpio_direction_input(SDHC1_GPIO_DET);
 372
 373 #ifdef PCM970_SDHC_RW_SWITCH
 374         ret = gpio_request(SDHC1_GPIO_WP, "sdhc-wp");
 375         if (ret)
 376                 goto err_gpio_free;
 377         gpio_direction_input(SDHC1_GPIO_WP);
 378 #endif
 379
 380         ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_SCK6), detect_irq,
 381                         IRQF_DISABLED | IRQF_TRIGGER_FALLING,
 382                                 "sdhc-detect", data);
 383         if (ret)
 384                 goto err_gpio_free_2;
 385
 386         return 0;
 387
 388 err_gpio_free_2:
 389 #ifdef PCM970_SDHC_RW_SWITCH
 390         gpio_free(SDHC1_GPIO_WP);
 391 err_gpio_free:
 392 #endif
 393         gpio_free(SDHC1_GPIO_DET);
 394
 395         return ret;
 396 }
 397
 398 static void pcm970_sdhc1_exit(struct device *dev, void *data)
 399 {
 400         free_irq(IOMUX_TO_IRQ(MX31_PIN_SCK6), data);
 401         gpio_free(SDHC1_GPIO_DET);
 402         gpio_free(SDHC1_GPIO_WP);
 403 }
 404
 405 static struct imxmmc_platform_data sdhc_pdata = {
 406 #ifdef PCM970_SDHC_RW_SWITCH
 407         .get_ro = pcm970_sdhc1_get_ro,
 408 #endif
 409         .init = pcm970_sdhc1_init,
 410         .exit = pcm970_sdhc1_exit,
 411 };
 412
 413 struct mx3_camera_pdata camera_pdata = {
 414         .dma_dev        = &mx3_ipu.dev,
 415         .flags          = MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10,
 416         .mclk_10khz     = 2000,
 417 };
 418
 419 static int __init pcm037_camera_alloc_dma(const size_t buf_size)
 420 {
 421         dma_addr_t dma_handle;
 422         void *buf;
 423         int dma;
 424
 425         if (buf_size < 2 * 1024 * 1024)
 426                 return -EINVAL;
 427
 428         buf = dma_alloc_coherent(NULL, buf_size, &dma_handle, GFP_KERNEL);
 429         if (!buf) {
 430                 pr_err("%s: cannot allocate camera buffer-memory\n", __func__);
 431                 return -ENOMEM;
 432         }
 433
 434         memset(buf, 0, buf_size);
 435
 436         dma = dma_declare_coherent_memory(&mx3_camera.dev,
 437                                         dma_handle, dma_handle, buf_size,
 438                                         DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
 439
 440         /* The way we call dma_declare_coherent_memory only a malloc can fail */
 441         return dma & DMA_MEMORY_MAP ? 0 : -ENOMEM;
 442 }
 443
 444 static struct platform_device *devices[] __initdata = {
 445         &pcm037_flash,
 446         &pcm037_sram_device,
 447         &imx_wdt_device0,
 448         &pcm037_mt9t031,
 449         &pcm037_mt9v022,
 450 };
 451
 452 static struct ipu_platform_data mx3_ipu_data = {
 453         .irq_base = MXC_IPU_IRQ_START,
 454 };
 455
 456 static const struct fb_videomode fb_modedb[] = {
 457         {
 458                 /* 240x320 @ 60 Hz Sharp */
 459                 .name           = "Sharp-LQ035Q7DH06-QVGA",
 460                 .refresh        = 60,
 461                 .xres           = 240,
 462                 .yres           = 320,
 463                 .pixclock       = 185925,
 464                 .left_margin    = 9,
 465                 .right_margin   = 16,
 466                 .upper_margin   = 7,
 467                 .lower_margin   = 9,
 468                 .hsync_len      = 1,
 469                 .vsync_len      = 1,
 470                 .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE |
 471                                   FB_SYNC_CLK_INVERT | FB_SYNC_CLK_IDLE_EN,
 472                 .vmode          = FB_VMODE_NONINTERLACED,
 473                 .flag           = 0,
 474         }, {
 475                 /* 240x320 @ 60 Hz */
 476                 .name           = "TX090",
 477                 .refresh        = 60,
 478                 .xres           = 240,
 479                 .yres           = 320,
 480                 .pixclock       = 38255,
 481                 .left_margin    = 144,
 482                 .right_margin   = 0,
 483                 .upper_margin   = 7,
 484                 .lower_margin   = 40,
 485                 .hsync_len      = 96,
 486                 .vsync_len      = 1,
 487                 .sync           = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH,
 488                 .vmode          = FB_VMODE_NONINTERLACED,
 489                 .flag           = 0,
 490         }, {
 491                 /* 240x320 @ 60 Hz */
 492                 .name           = "CMEL-OLED",
 493                 .refresh        = 60,
 494                 .xres           = 240,
 495                 .yres           = 320,
 496                 .pixclock       = 185925,
 497                 .left_margin    = 9,
 498                 .right_margin   = 16,
 499                 .upper_margin   = 7,
 500                 .lower_margin   = 9,
 501                 .hsync_len      = 1,
 502                 .vsync_len      = 1,
 503                 .sync           = FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
 504                 .vmode          = FB_VMODE_NONINTERLACED,
 505                 .flag           = 0,
 506         },
 507 };
 508
 509 static struct mx3fb_platform_data mx3fb_pdata = {
 510         .dma_dev        = &mx3_ipu.dev,
 511         .name           = "Sharp-LQ035Q7DH06-QVGA",
 512         .mode           = fb_modedb,
 513         .num_modes      = ARRAY_SIZE(fb_modedb),
 514 };
 515
 516 static struct resource pcm970_sja1000_resources[] = {
 517         {
 518                 .start   = MX31_CS5_BASE_ADDR,
 519                 .end     = MX31_CS5_BASE_ADDR + 0x100 - 1,
 520                 .flags   = IORESOURCE_MEM,
 521         }, {
 522                 .start   = IOMUX_TO_IRQ(IOMUX_PIN(48, 105)),
 523                 .end     = IOMUX_TO_IRQ(IOMUX_PIN(48, 105)),
 524                 .flags   = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
 525         },
 526 };
 527
 528 struct sja1000_platform_data pcm970_sja1000_platform_data = {
 529         .osc_freq       = 16000000,
 530         .ocr            = OCR_TX1_PULLDOWN | OCR_TX0_PUSHPULL,
 531         .cdr            = CDR_CBP,
 532 };
 533
 534 static struct platform_device pcm970_sja1000 = {
 535         .name = "sja1000_platform",
 536         .dev = {
 537                 .platform_data = &pcm970_sja1000_platform_data,
 538         },
 539         .resource = pcm970_sja1000_resources,
 540         .num_resources = ARRAY_SIZE(pcm970_sja1000_resources),
 541 };
 542
 543 static struct mxc_usbh_platform_data otg_pdata = {
 544         .portsc = MXC_EHCI_MODE_ULPI,
 545         .flags  = MXC_EHCI_INTERFACE_DIFF_UNI,
 546 };
 547
 548 static struct mxc_usbh_platform_data usbh2_pdata = {
 549         .portsc = MXC_EHCI_MODE_ULPI,
 550         .flags  = MXC_EHCI_INTERFACE_DIFF_UNI,
 551 };
 552
 553 static struct fsl_usb2_platform_data otg_device_pdata = {
 554         .operating_mode = FSL_USB2_DR_DEVICE,
 555         .phy_mode       = FSL_USB2_PHY_ULPI,
 556 };
 557
 558 static int otg_mode_host;
 559
 560 static int __init pcm037_otg_mode(char *options)
 561 {
 562         if (!strcmp(options, "host"))
 563                 otg_mode_host = 1;
 564         else if (!strcmp(options, "device"))
 565                 otg_mode_host = 0;
 566         else
 567                 pr_info("otg_mode neither \"host\" nor \"device\". "
 568                         "Defaulting to device\n");
 569         return 0;
 570 }
 571 __setup("otg_mode=", pcm037_otg_mode);
 572
 573 /*
 574  * Board specific initialization.
 575  */
 576 static void __init mxc_board_init(void)
 577 {
 578         int ret;
 579         u32 tmp;
 580
 581         mxc_iomux_set_gpr(MUX_PGP_UH2, 1);
 582
 583         mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins),
 584                         "pcm037");
 585
 586 #define H2_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS \
 587                 | PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
 588
 589         mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, H2_PAD_CFG);
 590         mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, H2_PAD_CFG);
 591         mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, H2_PAD_CFG);
 592         mxc_iomux_set_pad(MX31_PIN_USBH2_STP, H2_PAD_CFG);
 593         mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, H2_PAD_CFG); /* USBH2_DATA0 */
 594         mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, H2_PAD_CFG); /* USBH2_DATA1 */
 595         mxc_iomux_set_pad(MX31_PIN_SRXD6, H2_PAD_CFG);  /* USBH2_DATA2 */
 596         mxc_iomux_set_pad(MX31_PIN_STXD6, H2_PAD_CFG);  /* USBH2_DATA3 */
 597         mxc_iomux_set_pad(MX31_PIN_SFS3, H2_PAD_CFG);   /* USBH2_DATA4 */
 598         mxc_iomux_set_pad(MX31_PIN_SCK3, H2_PAD_CFG);   /* USBH2_DATA5 */
 599         mxc_iomux_set_pad(MX31_PIN_SRXD3, H2_PAD_CFG);  /* USBH2_DATA6 */
 600         mxc_iomux_set_pad(MX31_PIN_STXD3, H2_PAD_CFG);  /* USBH2_DATA7 */
 601
 602         if (pcm037_variant() == PCM037_EET)
 603                 mxc_iomux_setup_multiple_pins(pcm037_uart1_pins,
 604                         ARRAY_SIZE(pcm037_uart1_pins), "pcm037_uart1");
 605         else
 606                 mxc_iomux_setup_multiple_pins(pcm037_uart1_handshake_pins,
 607                         ARRAY_SIZE(pcm037_uart1_handshake_pins),
 608                         "pcm037_uart1");
 609
 610         platform_add_devices(devices, ARRAY_SIZE(devices));
 611
 612         mxc_register_device(&mxc_uart_device0, &uart_pdata);
 613         mxc_register_device(&mxc_uart_device1, &uart_pdata);
 614         mxc_register_device(&mxc_uart_device2, &uart_pdata);
 615
 616         mxc_register_device(&mxc_w1_master_device, NULL);
 617
 618         /* LAN9217 IRQ pin */
 619         ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1), "lan9217-irq");
 620         if (ret)
 621                 pr_warning("could not get LAN irq gpio\n");
 622         else {
 623                 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1));
 624                 platform_device_register(&pcm037_eth);
 625         }
 626
 627
 628         /* I2C adapters and devices */
 629         i2c_register_board_info(1, pcm037_i2c_devices,
 630                         ARRAY_SIZE(pcm037_i2c_devices));
 631
 632         imx31_add_imx_i2c1(&pcm037_i2c1_data);
 633         imx31_add_imx_i2c2(&pcm037_i2c2_data);
 634
 635         imx31_add_mxc_nand(&pcm037_nand_board_info);
 636         mxc_register_device(&mxcsdhc_device0, &sdhc_pdata);
 637         mxc_register_device(&mx3_ipu, &mx3_ipu_data);
 638         mxc_register_device(&mx3_fb, &mx3fb_pdata);
 639
 640         /* CSI */
 641         /* Camera power: default - off */
 642         ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), "mt9t031-power");
 643         if (!ret)
 644                 gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), 1);
 645         else
 646                 iclink_mt9t031.power = NULL;
 647
 648         if (!pcm037_camera_alloc_dma(4 * 1024 * 1024))
 649                 mxc_register_device(&mx3_camera, &camera_pdata);
 650
 651         platform_device_register(&pcm970_sja1000);
 652
 653 #if defined(CONFIG_USB_ULPI)
 654         if (otg_mode_host) {
 655                 otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
 656                                 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
 657
 658                 mxc_register_device(&mxc_otg_host, &otg_pdata);
 659         }
 660
 661         usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
 662                                 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
 663
 664         mxc_register_device(&mxc_usbh2, &usbh2_pdata);
 665 #endif
 666         if (!otg_mode_host)
 667                 mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
 668
 669 }
 670
 671 static void __init pcm037_timer_init(void)
 672 {
 673         mx31_clocks_init(26000000);
 674 }
 675
 676 struct sys_timer pcm037_timer = {
 677         .init   = pcm037_timer_init,
 678 };
 679
 680 MACHINE_START(PCM037, "Phytec Phycore pcm037")
 681         /* Maintainer: Pengutronix */
 682         .phys_io        = MX31_AIPS1_BASE_ADDR,
 683         .io_pg_offst    = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
 684         .boot_params    = MX3x_PHYS_OFFSET + 0x100,
 685         .map_io         = mx31_map_io,
 686         .init_irq       = mx31_init_irq,
 687         .init_machine   = mxc_board_init,
 688         .timer          = &pcm037_timer,
 689 MACHINE_END