2 * Copyright (C) 2000 Deep Blue Solutions Ltd
3 * Copyright (C) 2002 Shane Nay (shane@minirl.com)
4 * Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #include <linux/types.h>
22 #include <linux/init.h>
23 #include <linux/clk.h>
24 #include <linux/serial_8250.h>
25 #include <linux/irq.h>
27 #include <mach/hardware.h>
28 #include <asm/mach-types.h>
29 #include <asm/mach/arch.h>
30 #include <asm/mach/time.h>
31 #include <asm/memory.h>
32 #include <asm/mach/map.h>
33 #include <mach/common.h>
34 #include <mach/board-mx31ads.h>
35 #include <mach/imx-uart.h>
36 #include <mach/iomux-mx3.h>
41 * @brief This file contains the board-specific initialization routines.
46 #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
48 * The serial port definition structure.
50 static struct plat_serial8250_port serial_platform_data
[] = {
52 .membase
= (void *)(PBC_BASE_ADDRESS
+ PBC_SC16C652_UARTA
),
53 .mapbase
= (unsigned long)(CS4_BASE_ADDR
+ PBC_SC16C652_UARTA
),
54 .irq
= EXPIO_INT_XUART_INTA
,
58 .flags
= UPF_BOOT_AUTOCONF
| UPF_SKIP_TEST
| UPF_AUTO_IRQ
,
60 .membase
= (void *)(PBC_BASE_ADDRESS
+ PBC_SC16C652_UARTB
),
61 .mapbase
= (unsigned long)(CS4_BASE_ADDR
+ PBC_SC16C652_UARTB
),
62 .irq
= EXPIO_INT_XUART_INTB
,
66 .flags
= UPF_BOOT_AUTOCONF
| UPF_SKIP_TEST
| UPF_AUTO_IRQ
,
71 static struct platform_device serial_device
= {
75 .platform_data
= serial_platform_data
,
79 static int __init
mxc_init_extuart(void)
81 return platform_device_register(&serial_device
);
84 static inline int mxc_init_extuart(void)
90 #if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
91 static struct imxuart_platform_data uart_pdata
= {
92 .flags
= IMXUART_HAVE_RTSCTS
,
95 static inline void mxc_init_imx_uart(void)
97 mxc_iomux_mode(MX31_PIN_CTS1__CTS1
);
98 mxc_iomux_mode(MX31_PIN_RTS1__RTS1
);
99 mxc_iomux_mode(MX31_PIN_TXD1__TXD1
);
100 mxc_iomux_mode(MX31_PIN_RXD1__RXD1
);
102 mxc_register_device(&mxc_uart_device0
, &uart_pdata
);
104 #else /* !SERIAL_IMX */
105 static inline void mxc_init_imx_uart(void)
108 #endif /* !SERIAL_IMX */
110 static void mx31ads_expio_irq_handler(u32 irq
, struct irq_desc
*desc
)
116 imr_val
= __raw_readw(PBC_INTMASK_SET_REG
);
117 int_valid
= __raw_readw(PBC_INTSTATUS_REG
) & imr_val
;
119 expio_irq
= MXC_EXP_IO_BASE
;
120 for (; int_valid
!= 0; int_valid
>>= 1, expio_irq
++) {
121 if ((int_valid
& 1) == 0)
124 generic_handle_irq(expio_irq
);
129 * Disable an expio pin's interrupt by setting the bit in the imr.
130 * @param irq an expio virtual irq number
132 static void expio_mask_irq(u32 irq
)
134 u32 expio
= MXC_IRQ_TO_EXPIO(irq
);
135 /* mask the interrupt */
136 __raw_writew(1 << expio
, PBC_INTMASK_CLEAR_REG
);
137 __raw_readw(PBC_INTMASK_CLEAR_REG
);
141 * Acknowledge an expanded io pin's interrupt by clearing the bit in the isr.
142 * @param irq an expanded io virtual irq number
144 static void expio_ack_irq(u32 irq
)
146 u32 expio
= MXC_IRQ_TO_EXPIO(irq
);
147 /* clear the interrupt status */
148 __raw_writew(1 << expio
, PBC_INTSTATUS_REG
);
152 * Enable a expio pin's interrupt by clearing the bit in the imr.
153 * @param irq a expio virtual irq number
155 static void expio_unmask_irq(u32 irq
)
157 u32 expio
= MXC_IRQ_TO_EXPIO(irq
);
158 /* unmask the interrupt */
159 __raw_writew(1 << expio
, PBC_INTMASK_SET_REG
);
162 static struct irq_chip expio_irq_chip
= {
163 .ack
= expio_ack_irq
,
164 .mask
= expio_mask_irq
,
165 .unmask
= expio_unmask_irq
,
168 static void __init
mx31ads_init_expio(void)
172 printk(KERN_INFO
"MX31ADS EXPIO(CPLD) hardware\n");
175 * Configure INT line as GPIO input
177 mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_4
, IOMUX_CONFIG_GPIO
));
179 /* disable the interrupt and clear the status */
180 __raw_writew(0xFFFF, PBC_INTMASK_CLEAR_REG
);
181 __raw_writew(0xFFFF, PBC_INTSTATUS_REG
);
182 for (i
= MXC_EXP_IO_BASE
; i
< (MXC_EXP_IO_BASE
+ MXC_MAX_EXP_IO_LINES
);
184 set_irq_chip(i
, &expio_irq_chip
);
185 set_irq_handler(i
, handle_level_irq
);
186 set_irq_flags(i
, IRQF_VALID
);
188 set_irq_type(EXPIO_PARENT_INT
, IRQ_TYPE_LEVEL_HIGH
);
189 set_irq_chained_handler(EXPIO_PARENT_INT
, mx31ads_expio_irq_handler
);
193 * This structure defines static mappings for the i.MX31ADS board.
195 static struct map_desc mx31ads_io_desc
[] __initdata
= {
197 .virtual = AIPS1_BASE_ADDR_VIRT
,
198 .pfn
= __phys_to_pfn(AIPS1_BASE_ADDR
),
199 .length
= AIPS1_SIZE
,
200 .type
= MT_DEVICE_NONSHARED
202 .virtual = SPBA0_BASE_ADDR_VIRT
,
203 .pfn
= __phys_to_pfn(SPBA0_BASE_ADDR
),
204 .length
= SPBA0_SIZE
,
205 .type
= MT_DEVICE_NONSHARED
207 .virtual = AIPS2_BASE_ADDR_VIRT
,
208 .pfn
= __phys_to_pfn(AIPS2_BASE_ADDR
),
209 .length
= AIPS2_SIZE
,
210 .type
= MT_DEVICE_NONSHARED
212 .virtual = CS4_BASE_ADDR_VIRT
,
213 .pfn
= __phys_to_pfn(CS4_BASE_ADDR
),
214 .length
= CS4_SIZE
/ 2,
220 * Set up static virtual mappings.
222 void __init
mx31ads_map_io(void)
225 iotable_init(mx31ads_io_desc
, ARRAY_SIZE(mx31ads_io_desc
));
228 void __init
mx31ads_init_irq(void)
231 mx31ads_init_expio();
235 * Board specific initialization.
237 static void __init
mxc_board_init(void)
243 static void __init
mx31ads_timer_init(void)
245 mxc_clocks_init(26000000);
246 mxc_timer_init("ipg_clk.0");
249 struct sys_timer mx31ads_timer
= {
250 .init
= mx31ads_timer_init
,
254 * The following uses standard kernel macros defined in arch.h in order to
255 * initialize __mach_desc_MX31ADS data structure.
257 MACHINE_START(MX31ADS
, "Freescale MX31ADS")
258 /* Maintainer: Freescale Semiconductor, Inc. */
259 .phys_io
= AIPS1_BASE_ADDR
,
260 .io_pg_offst
= ((AIPS1_BASE_ADDR_VIRT
) >> 18) & 0xfffc,
261 .boot_params
= PHYS_OFFSET
+ 0x100,
262 .map_io
= mx31ads_map_io
,
263 .init_irq
= mx31ads_init_irq
,
264 .init_machine
= mxc_board_init
,
265 .timer
= &mx31ads_timer
,