mx5: Add i2c to Freescale MX51 Babbage HW
[deliverable/linux.git] / arch / arm / mach-mx5 / devices.c
1 /*
2 * Copyright 2009 Amit Kucheria <amit.kucheria@canonical.com>
3 * Copyright (C) 2010 Freescale Semiconductor, Inc.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13 #include <linux/platform_device.h>
14 #include <linux/dma-mapping.h>
15 #include <linux/gpio.h>
16 #include <mach/hardware.h>
17 #include <mach/imx-uart.h>
18 #include <mach/irqs.h>
19
20 static struct resource uart0[] = {
21 {
22 .start = MX51_UART1_BASE_ADDR,
23 .end = MX51_UART1_BASE_ADDR + 0xfff,
24 .flags = IORESOURCE_MEM,
25 }, {
26 .start = MX51_MXC_INT_UART1,
27 .end = MX51_MXC_INT_UART1,
28 .flags = IORESOURCE_IRQ,
29 },
30 };
31
32 struct platform_device mxc_uart_device0 = {
33 .name = "imx-uart",
34 .id = 0,
35 .resource = uart0,
36 .num_resources = ARRAY_SIZE(uart0),
37 };
38
39 static struct resource uart1[] = {
40 {
41 .start = MX51_UART2_BASE_ADDR,
42 .end = MX51_UART2_BASE_ADDR + 0xfff,
43 .flags = IORESOURCE_MEM,
44 }, {
45 .start = MX51_MXC_INT_UART2,
46 .end = MX51_MXC_INT_UART2,
47 .flags = IORESOURCE_IRQ,
48 },
49 };
50
51 struct platform_device mxc_uart_device1 = {
52 .name = "imx-uart",
53 .id = 1,
54 .resource = uart1,
55 .num_resources = ARRAY_SIZE(uart1),
56 };
57
58 static struct resource uart2[] = {
59 {
60 .start = MX51_UART3_BASE_ADDR,
61 .end = MX51_UART3_BASE_ADDR + 0xfff,
62 .flags = IORESOURCE_MEM,
63 }, {
64 .start = MX51_MXC_INT_UART3,
65 .end = MX51_MXC_INT_UART3,
66 .flags = IORESOURCE_IRQ,
67 },
68 };
69
70 struct platform_device mxc_uart_device2 = {
71 .name = "imx-uart",
72 .id = 2,
73 .resource = uart2,
74 .num_resources = ARRAY_SIZE(uart2),
75 };
76
77 static struct resource mxc_fec_resources[] = {
78 {
79 .start = MX51_MXC_FEC_BASE_ADDR,
80 .end = MX51_MXC_FEC_BASE_ADDR + 0xfff,
81 .flags = IORESOURCE_MEM,
82 }, {
83 .start = MX51_MXC_INT_FEC,
84 .end = MX51_MXC_INT_FEC,
85 .flags = IORESOURCE_IRQ,
86 },
87 };
88
89 struct platform_device mxc_fec_device = {
90 .name = "fec",
91 .id = 0,
92 .num_resources = ARRAY_SIZE(mxc_fec_resources),
93 .resource = mxc_fec_resources,
94 };
95
96 static struct resource mxc_i2c0_resources[] = {
97 {
98 .start = MX51_I2C1_BASE_ADDR,
99 .end = MX51_I2C1_BASE_ADDR + SZ_4K - 1,
100 .flags = IORESOURCE_MEM,
101 }, {
102 .start = MX51_MXC_INT_I2C1,
103 .end = MX51_MXC_INT_I2C1,
104 .flags = IORESOURCE_IRQ,
105 },
106 };
107
108 struct platform_device mxc_i2c_device0 = {
109 .name = "imx-i2c",
110 .id = 0,
111 .num_resources = ARRAY_SIZE(mxc_i2c0_resources),
112 .resource = mxc_i2c0_resources,
113 };
114
115 static struct resource mxc_i2c1_resources[] = {
116 {
117 .start = MX51_I2C2_BASE_ADDR,
118 .end = MX51_I2C2_BASE_ADDR + SZ_4K - 1,
119 .flags = IORESOURCE_MEM,
120 }, {
121 .start = MX51_MXC_INT_I2C2,
122 .end = MX51_MXC_INT_I2C2,
123 .flags = IORESOURCE_IRQ,
124 },
125 };
126
127 struct platform_device mxc_i2c_device1 = {
128 .name = "imx-i2c",
129 .id = 1,
130 .num_resources = ARRAY_SIZE(mxc_i2c1_resources),
131 .resource = mxc_i2c1_resources,
132 };
133
134 static struct resource mxc_hsi2c_resources[] = {
135 {
136 .start = MX51_HSI2C_DMA_BASE_ADDR,
137 .end = MX51_HSI2C_DMA_BASE_ADDR + SZ_16K - 1,
138 .flags = IORESOURCE_MEM,
139 },
140 {
141 .start = MX51_MXC_INT_HS_I2C,
142 .end = MX51_MXC_INT_HS_I2C,
143 .flags = IORESOURCE_IRQ,
144 },
145 };
146
147 struct platform_device mxc_hsi2c_device = {
148 .name = "imx-i2c",
149 .id = 2,
150 .num_resources = ARRAY_SIZE(mxc_hsi2c_resources),
151 .resource = mxc_hsi2c_resources
152 };
153
154 static u64 usb_dma_mask = DMA_BIT_MASK(32);
155
156 static struct resource usbotg_resources[] = {
157 {
158 .start = MX51_OTG_BASE_ADDR,
159 .end = MX51_OTG_BASE_ADDR + 0x1ff,
160 .flags = IORESOURCE_MEM,
161 },
162 {
163 .start = MX51_MXC_INT_USB_OTG,
164 .flags = IORESOURCE_IRQ,
165 },
166 };
167
168 /* OTG gadget device */
169 struct platform_device mxc_usbdr_udc_device = {
170 .name = "fsl-usb2-udc",
171 .id = -1,
172 .num_resources = ARRAY_SIZE(usbotg_resources),
173 .resource = usbotg_resources,
174 .dev = {
175 .dma_mask = &usb_dma_mask,
176 .coherent_dma_mask = DMA_BIT_MASK(32),
177 },
178 };
179
180 struct platform_device mxc_usbdr_host_device = {
181 .name = "mxc-ehci",
182 .id = 0,
183 .num_resources = ARRAY_SIZE(usbotg_resources),
184 .resource = usbotg_resources,
185 .dev = {
186 .dma_mask = &usb_dma_mask,
187 .coherent_dma_mask = DMA_BIT_MASK(32),
188 },
189 };
190
191 static struct resource usbh1_resources[] = {
192 {
193 .start = MX51_OTG_BASE_ADDR + 0x200,
194 .end = MX51_OTG_BASE_ADDR + 0x200 + 0x1ff,
195 .flags = IORESOURCE_MEM,
196 },
197 {
198 .start = MX51_MXC_INT_USB_H1,
199 .flags = IORESOURCE_IRQ,
200 },
201 };
202
203 struct platform_device mxc_usbh1_device = {
204 .name = "mxc-ehci",
205 .id = 1,
206 .num_resources = ARRAY_SIZE(usbh1_resources),
207 .resource = usbh1_resources,
208 .dev = {
209 .dma_mask = &usb_dma_mask,
210 .coherent_dma_mask = DMA_BIT_MASK(32),
211 },
212 };
213
214 static struct resource mxc_wdt_resources[] = {
215 {
216 .start = MX51_WDOG_BASE_ADDR,
217 .end = MX51_WDOG_BASE_ADDR + SZ_16K - 1,
218 .flags = IORESOURCE_MEM,
219 },
220 };
221
222 struct platform_device mxc_wdt = {
223 .name = "imx2-wdt",
224 .id = 0,
225 .num_resources = ARRAY_SIZE(mxc_wdt_resources),
226 .resource = mxc_wdt_resources,
227 };
228
229 static struct mxc_gpio_port mxc_gpio_ports[] = {
230 {
231 .chip.label = "gpio-0",
232 .base = MX51_IO_ADDRESS(MX51_GPIO1_BASE_ADDR),
233 .irq = MX51_MXC_INT_GPIO1_LOW,
234 .virtual_irq_start = MXC_GPIO_IRQ_START
235 },
236 {
237 .chip.label = "gpio-1",
238 .base = MX51_IO_ADDRESS(MX51_GPIO2_BASE_ADDR),
239 .irq = MX51_MXC_INT_GPIO2_LOW,
240 .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 1
241 },
242 {
243 .chip.label = "gpio-2",
244 .base = MX51_IO_ADDRESS(MX51_GPIO3_BASE_ADDR),
245 .irq = MX51_MXC_INT_GPIO3_LOW,
246 .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 2
247 },
248 {
249 .chip.label = "gpio-3",
250 .base = MX51_IO_ADDRESS(MX51_GPIO4_BASE_ADDR),
251 .irq = MX51_MXC_INT_GPIO4_LOW,
252 .virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 3
253 },
254 };
255
256 int __init mxc_register_gpios(void)
257 {
258 return mxc_gpio_init(mxc_gpio_ports, ARRAY_SIZE(mxc_gpio_ports));
259 }
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