2 * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
11 * Create static mapping between physical to virtual memory.
15 #include <linux/init.h>
17 #include <asm/mach/map.h>
19 #include <mach/hardware.h>
20 #include <mach/common.h>
21 #include <mach/iomux-v3.h>
24 * Define the MX51 memory map.
26 static struct map_desc mx51_io_desc
[] __initdata
= {
27 imx_map_entry(MX51
, IRAM
, MT_DEVICE
),
28 imx_map_entry(MX51
, DEBUG
, MT_DEVICE
),
29 imx_map_entry(MX51
, AIPS1
, MT_DEVICE
),
30 imx_map_entry(MX51
, SPBA0
, MT_DEVICE
),
31 imx_map_entry(MX51
, AIPS2
, MT_DEVICE
),
35 * Define the MX53 memory map.
37 static struct map_desc mx53_io_desc
[] __initdata
= {
38 imx_map_entry(MX53
, AIPS1
, MT_DEVICE
),
39 imx_map_entry(MX53
, SPBA0
, MT_DEVICE
),
40 imx_map_entry(MX53
, AIPS2
, MT_DEVICE
),
44 * This function initializes the memory map. It is called during the
45 * system startup to create static physical to virtual memory mappings
48 void __init
mx51_map_io(void)
50 iotable_init(mx51_io_desc
, ARRAY_SIZE(mx51_io_desc
));
53 void __init
imx51_init_early(void)
55 mxc_set_cpu_type(MXC_CPU_MX51
);
56 mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR
));
57 mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR
));
60 void __init
mx53_map_io(void)
62 iotable_init(mx53_io_desc
, ARRAY_SIZE(mx53_io_desc
));
65 void __init
imx53_init_early(void)
67 mxc_set_cpu_type(MXC_CPU_MX53
);
68 mxc_iomux_v3_init(MX53_IO_ADDRESS(MX53_IOMUXC_BASE_ADDR
));
69 mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG1_BASE_ADDR
));
72 void __init
mx51_init_irq(void)
74 unsigned long tzic_addr
;
75 void __iomem
*tzic_virt
;
77 if (mx51_revision() < IMX_CHIP_REVISION_2_0
)
78 tzic_addr
= MX51_TZIC_BASE_ADDR_TO1
;
80 tzic_addr
= MX51_TZIC_BASE_ADDR
;
82 tzic_virt
= ioremap(tzic_addr
, SZ_16K
);
84 panic("unable to map TZIC interrupt controller\n");
86 tzic_init_irq(tzic_virt
);
89 void __init
mx53_init_irq(void)
91 unsigned long tzic_addr
;
92 void __iomem
*tzic_virt
;
94 tzic_addr
= MX53_TZIC_BASE_ADDR
;
96 tzic_virt
= ioremap(tzic_addr
, SZ_16K
);
98 panic("unable to map TZIC interrupt controller\n");
100 tzic_init_irq(tzic_virt
);
103 void __init
imx51_soc_init(void)
105 /* i.mx51 has the i.mx31 type gpio */
106 mxc_register_gpio("imx31-gpio", 0, MX51_GPIO1_BASE_ADDR
, SZ_16K
, MX51_MXC_INT_GPIO1_LOW
, MX51_MXC_INT_GPIO1_HIGH
);
107 mxc_register_gpio("imx31-gpio", 1, MX51_GPIO2_BASE_ADDR
, SZ_16K
, MX51_MXC_INT_GPIO2_LOW
, MX51_MXC_INT_GPIO2_HIGH
);
108 mxc_register_gpio("imx31-gpio", 2, MX51_GPIO3_BASE_ADDR
, SZ_16K
, MX51_MXC_INT_GPIO3_LOW
, MX51_MXC_INT_GPIO3_HIGH
);
109 mxc_register_gpio("imx31-gpio", 3, MX51_GPIO4_BASE_ADDR
, SZ_16K
, MX51_MXC_INT_GPIO4_LOW
, MX51_MXC_INT_GPIO4_HIGH
);
112 void __init
imx53_soc_init(void)
114 /* i.mx53 has the i.mx31 type gpio */
115 mxc_register_gpio("imx31-gpio", 0, MX53_GPIO1_BASE_ADDR
, SZ_16K
, MX53_INT_GPIO1_LOW
, MX53_INT_GPIO1_HIGH
);
116 mxc_register_gpio("imx31-gpio", 1, MX53_GPIO2_BASE_ADDR
, SZ_16K
, MX53_INT_GPIO2_LOW
, MX53_INT_GPIO2_HIGH
);
117 mxc_register_gpio("imx31-gpio", 2, MX53_GPIO3_BASE_ADDR
, SZ_16K
, MX53_INT_GPIO3_LOW
, MX53_INT_GPIO3_HIGH
);
118 mxc_register_gpio("imx31-gpio", 3, MX53_GPIO4_BASE_ADDR
, SZ_16K
, MX53_INT_GPIO4_LOW
, MX53_INT_GPIO4_HIGH
);
119 mxc_register_gpio("imx31-gpio", 4, MX53_GPIO5_BASE_ADDR
, SZ_16K
, MX53_INT_GPIO5_LOW
, MX53_INT_GPIO5_HIGH
);
120 mxc_register_gpio("imx31-gpio", 5, MX53_GPIO6_BASE_ADDR
, SZ_16K
, MX53_INT_GPIO6_LOW
, MX53_INT_GPIO6_HIGH
);
121 mxc_register_gpio("imx31-gpio", 6, MX53_GPIO7_BASE_ADDR
, SZ_16K
, MX53_INT_GPIO7_LOW
, MX53_INT_GPIO7_HIGH
);
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