5769c71815b2e3a6b8324ab17764824791723de5
[deliverable/linux.git] / arch / arm / mach-omap1 / lcd_dma.c
1 /*
2 * linux/arch/arm/mach-omap1/lcd_dma.c
3 *
4 * Extracted from arch/arm/plat-omap/dma.c
5 * Copyright (C) 2003 - 2008 Nokia Corporation
6 * Author: Juha Yrjölä <juha.yrjola@nokia.com>
7 * DMA channel linking for 1610 by Samuel Ortiz <samuel.ortiz@nokia.com>
8 * Graphics DMA and LCD DMA graphics tranformations
9 * by Imre Deak <imre.deak@nokia.com>
10 * OMAP2/3 support Copyright (C) 2004-2007 Texas Instruments, Inc.
11 * Merged to support both OMAP1 and OMAP2 by Tony Lindgren <tony@atomide.com>
12 * Some functions based on earlier dma-omap.c Copyright (C) 2001 RidgeRun, Inc.
13 *
14 * Copyright (C) 2009 Texas Instruments
15 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
16 *
17 * Support functions for the OMAP internal DMA channels.
18 *
19 * This program is free software; you can redistribute it and/or modify
20 * it under the terms of the GNU General Public License version 2 as
21 * published by the Free Software Foundation.
22 *
23 */
24
25 #include <linux/module.h>
26 #include <linux/spinlock.h>
27 #include <linux/interrupt.h>
28 #include <linux/io.h>
29
30 #include <plat/dma.h>
31
32 #include <mach/hardware.h>
33 #include <mach/lcdc.h>
34
35 int omap_lcd_dma_running(void)
36 {
37 /*
38 * On OMAP1510, internal LCD controller will start the transfer
39 * when it gets enabled, so assume DMA running if LCD enabled.
40 */
41 if (cpu_is_omap15xx())
42 if (omap_readw(OMAP_LCDC_CONTROL) & OMAP_LCDC_CTRL_LCD_EN)
43 return 1;
44
45 /* Check if LCD DMA is running */
46 if (cpu_is_omap16xx())
47 if (omap_readw(OMAP1610_DMA_LCD_CCR) & OMAP_DMA_CCR_EN)
48 return 1;
49
50 return 0;
51 }
52
53 static struct lcd_dma_info {
54 spinlock_t lock;
55 int reserved;
56 void (*callback)(u16 status, void *data);
57 void *cb_data;
58
59 int active;
60 unsigned long addr;
61 int rotate, data_type, xres, yres;
62 int vxres;
63 int mirror;
64 int xscale, yscale;
65 int ext_ctrl;
66 int src_port;
67 int single_transfer;
68 } lcd_dma;
69
70 void omap_set_lcd_dma_b1(unsigned long addr, u16 fb_xres, u16 fb_yres,
71 int data_type)
72 {
73 lcd_dma.addr = addr;
74 lcd_dma.data_type = data_type;
75 lcd_dma.xres = fb_xres;
76 lcd_dma.yres = fb_yres;
77 }
78 EXPORT_SYMBOL(omap_set_lcd_dma_b1);
79
80 void omap_set_lcd_dma_ext_controller(int external)
81 {
82 lcd_dma.ext_ctrl = external;
83 }
84 EXPORT_SYMBOL(omap_set_lcd_dma_ext_controller);
85
86 void omap_set_lcd_dma_single_transfer(int single)
87 {
88 lcd_dma.single_transfer = single;
89 }
90 EXPORT_SYMBOL(omap_set_lcd_dma_single_transfer);
91
92 void omap_set_lcd_dma_b1_rotation(int rotate)
93 {
94 if (cpu_is_omap15xx()) {
95 printk(KERN_ERR "DMA rotation is not supported in 1510 mode\n");
96 BUG();
97 return;
98 }
99 lcd_dma.rotate = rotate;
100 }
101 EXPORT_SYMBOL(omap_set_lcd_dma_b1_rotation);
102
103 void omap_set_lcd_dma_b1_mirror(int mirror)
104 {
105 if (cpu_is_omap15xx()) {
106 printk(KERN_ERR "DMA mirror is not supported in 1510 mode\n");
107 BUG();
108 }
109 lcd_dma.mirror = mirror;
110 }
111 EXPORT_SYMBOL(omap_set_lcd_dma_b1_mirror);
112
113 void omap_set_lcd_dma_b1_vxres(unsigned long vxres)
114 {
115 if (cpu_is_omap15xx()) {
116 printk(KERN_ERR "DMA virtual resolution is not supported "
117 "in 1510 mode\n");
118 BUG();
119 }
120 lcd_dma.vxres = vxres;
121 }
122 EXPORT_SYMBOL(omap_set_lcd_dma_b1_vxres);
123
124 void omap_set_lcd_dma_b1_scale(unsigned int xscale, unsigned int yscale)
125 {
126 if (cpu_is_omap15xx()) {
127 printk(KERN_ERR "DMA scale is not supported in 1510 mode\n");
128 BUG();
129 }
130 lcd_dma.xscale = xscale;
131 lcd_dma.yscale = yscale;
132 }
133 EXPORT_SYMBOL(omap_set_lcd_dma_b1_scale);
134
135 static void set_b1_regs(void)
136 {
137 unsigned long top, bottom;
138 int es;
139 u16 w;
140 unsigned long en, fn;
141 long ei, fi;
142 unsigned long vxres;
143 unsigned int xscale, yscale;
144
145 switch (lcd_dma.data_type) {
146 case OMAP_DMA_DATA_TYPE_S8:
147 es = 1;
148 break;
149 case OMAP_DMA_DATA_TYPE_S16:
150 es = 2;
151 break;
152 case OMAP_DMA_DATA_TYPE_S32:
153 es = 4;
154 break;
155 default:
156 BUG();
157 return;
158 }
159
160 vxres = lcd_dma.vxres ? lcd_dma.vxres : lcd_dma.xres;
161 xscale = lcd_dma.xscale ? lcd_dma.xscale : 1;
162 yscale = lcd_dma.yscale ? lcd_dma.yscale : 1;
163 BUG_ON(vxres < lcd_dma.xres);
164
165 #define PIXADDR(x, y) (lcd_dma.addr + \
166 ((y) * vxres * yscale + (x) * xscale) * es)
167 #define PIXSTEP(sx, sy, dx, dy) (PIXADDR(dx, dy) - PIXADDR(sx, sy) - es + 1)
168
169 switch (lcd_dma.rotate) {
170 case 0:
171 if (!lcd_dma.mirror) {
172 top = PIXADDR(0, 0);
173 bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
174 /* 1510 DMA requires the bottom address to be 2 more
175 * than the actual last memory access location. */
176 if (cpu_is_omap15xx() &&
177 lcd_dma.data_type == OMAP_DMA_DATA_TYPE_S32)
178 bottom += 2;
179 ei = PIXSTEP(0, 0, 1, 0);
180 fi = PIXSTEP(lcd_dma.xres - 1, 0, 0, 1);
181 } else {
182 top = PIXADDR(lcd_dma.xres - 1, 0);
183 bottom = PIXADDR(0, lcd_dma.yres - 1);
184 ei = PIXSTEP(1, 0, 0, 0);
185 fi = PIXSTEP(0, 0, lcd_dma.xres - 1, 1);
186 }
187 en = lcd_dma.xres;
188 fn = lcd_dma.yres;
189 break;
190 case 90:
191 if (!lcd_dma.mirror) {
192 top = PIXADDR(0, lcd_dma.yres - 1);
193 bottom = PIXADDR(lcd_dma.xres - 1, 0);
194 ei = PIXSTEP(0, 1, 0, 0);
195 fi = PIXSTEP(0, 0, 1, lcd_dma.yres - 1);
196 } else {
197 top = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
198 bottom = PIXADDR(0, 0);
199 ei = PIXSTEP(0, 1, 0, 0);
200 fi = PIXSTEP(1, 0, 0, lcd_dma.yres - 1);
201 }
202 en = lcd_dma.yres;
203 fn = lcd_dma.xres;
204 break;
205 case 180:
206 if (!lcd_dma.mirror) {
207 top = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
208 bottom = PIXADDR(0, 0);
209 ei = PIXSTEP(1, 0, 0, 0);
210 fi = PIXSTEP(0, 1, lcd_dma.xres - 1, 0);
211 } else {
212 top = PIXADDR(0, lcd_dma.yres - 1);
213 bottom = PIXADDR(lcd_dma.xres - 1, 0);
214 ei = PIXSTEP(0, 0, 1, 0);
215 fi = PIXSTEP(lcd_dma.xres - 1, 1, 0, 0);
216 }
217 en = lcd_dma.xres;
218 fn = lcd_dma.yres;
219 break;
220 case 270:
221 if (!lcd_dma.mirror) {
222 top = PIXADDR(lcd_dma.xres - 1, 0);
223 bottom = PIXADDR(0, lcd_dma.yres - 1);
224 ei = PIXSTEP(0, 0, 0, 1);
225 fi = PIXSTEP(1, lcd_dma.yres - 1, 0, 0);
226 } else {
227 top = PIXADDR(0, 0);
228 bottom = PIXADDR(lcd_dma.xres - 1, lcd_dma.yres - 1);
229 ei = PIXSTEP(0, 0, 0, 1);
230 fi = PIXSTEP(0, lcd_dma.yres - 1, 1, 0);
231 }
232 en = lcd_dma.yres;
233 fn = lcd_dma.xres;
234 break;
235 default:
236 BUG();
237 return; /* Suppress warning about uninitialized vars */
238 }
239
240 if (cpu_is_omap15xx()) {
241 omap_writew(top >> 16, OMAP1510_DMA_LCD_TOP_F1_U);
242 omap_writew(top, OMAP1510_DMA_LCD_TOP_F1_L);
243 omap_writew(bottom >> 16, OMAP1510_DMA_LCD_BOT_F1_U);
244 omap_writew(bottom, OMAP1510_DMA_LCD_BOT_F1_L);
245
246 return;
247 }
248
249 /* 1610 regs */
250 omap_writew(top >> 16, OMAP1610_DMA_LCD_TOP_B1_U);
251 omap_writew(top, OMAP1610_DMA_LCD_TOP_B1_L);
252 omap_writew(bottom >> 16, OMAP1610_DMA_LCD_BOT_B1_U);
253 omap_writew(bottom, OMAP1610_DMA_LCD_BOT_B1_L);
254
255 omap_writew(en, OMAP1610_DMA_LCD_SRC_EN_B1);
256 omap_writew(fn, OMAP1610_DMA_LCD_SRC_FN_B1);
257
258 w = omap_readw(OMAP1610_DMA_LCD_CSDP);
259 w &= ~0x03;
260 w |= lcd_dma.data_type;
261 omap_writew(w, OMAP1610_DMA_LCD_CSDP);
262
263 w = omap_readw(OMAP1610_DMA_LCD_CTRL);
264 /* Always set the source port as SDRAM for now*/
265 w &= ~(0x03 << 6);
266 if (lcd_dma.callback != NULL)
267 w |= 1 << 1; /* Block interrupt enable */
268 else
269 w &= ~(1 << 1);
270 omap_writew(w, OMAP1610_DMA_LCD_CTRL);
271
272 if (!(lcd_dma.rotate || lcd_dma.mirror ||
273 lcd_dma.vxres || lcd_dma.xscale || lcd_dma.yscale))
274 return;
275
276 w = omap_readw(OMAP1610_DMA_LCD_CCR);
277 /* Set the double-indexed addressing mode */
278 w |= (0x03 << 12);
279 omap_writew(w, OMAP1610_DMA_LCD_CCR);
280
281 omap_writew(ei, OMAP1610_DMA_LCD_SRC_EI_B1);
282 omap_writew(fi >> 16, OMAP1610_DMA_LCD_SRC_FI_B1_U);
283 omap_writew(fi, OMAP1610_DMA_LCD_SRC_FI_B1_L);
284 }
285
286 static irqreturn_t lcd_dma_irq_handler(int irq, void *dev_id)
287 {
288 u16 w;
289
290 w = omap_readw(OMAP1610_DMA_LCD_CTRL);
291 if (unlikely(!(w & (1 << 3)))) {
292 printk(KERN_WARNING "Spurious LCD DMA IRQ\n");
293 return IRQ_NONE;
294 }
295 /* Ack the IRQ */
296 w |= (1 << 3);
297 omap_writew(w, OMAP1610_DMA_LCD_CTRL);
298 lcd_dma.active = 0;
299 if (lcd_dma.callback != NULL)
300 lcd_dma.callback(w, lcd_dma.cb_data);
301
302 return IRQ_HANDLED;
303 }
304
305 int omap_request_lcd_dma(void (*callback)(u16 status, void *data),
306 void *data)
307 {
308 spin_lock_irq(&lcd_dma.lock);
309 if (lcd_dma.reserved) {
310 spin_unlock_irq(&lcd_dma.lock);
311 printk(KERN_ERR "LCD DMA channel already reserved\n");
312 BUG();
313 return -EBUSY;
314 }
315 lcd_dma.reserved = 1;
316 spin_unlock_irq(&lcd_dma.lock);
317 lcd_dma.callback = callback;
318 lcd_dma.cb_data = data;
319 lcd_dma.active = 0;
320 lcd_dma.single_transfer = 0;
321 lcd_dma.rotate = 0;
322 lcd_dma.vxres = 0;
323 lcd_dma.mirror = 0;
324 lcd_dma.xscale = 0;
325 lcd_dma.yscale = 0;
326 lcd_dma.ext_ctrl = 0;
327 lcd_dma.src_port = 0;
328
329 return 0;
330 }
331 EXPORT_SYMBOL(omap_request_lcd_dma);
332
333 void omap_free_lcd_dma(void)
334 {
335 spin_lock(&lcd_dma.lock);
336 if (!lcd_dma.reserved) {
337 spin_unlock(&lcd_dma.lock);
338 printk(KERN_ERR "LCD DMA is not reserved\n");
339 BUG();
340 return;
341 }
342 if (!cpu_is_omap15xx())
343 omap_writew(omap_readw(OMAP1610_DMA_LCD_CCR) & ~1,
344 OMAP1610_DMA_LCD_CCR);
345 lcd_dma.reserved = 0;
346 spin_unlock(&lcd_dma.lock);
347 }
348 EXPORT_SYMBOL(omap_free_lcd_dma);
349
350 void omap_enable_lcd_dma(void)
351 {
352 u16 w;
353
354 /*
355 * Set the Enable bit only if an external controller is
356 * connected. Otherwise the OMAP internal controller will
357 * start the transfer when it gets enabled.
358 */
359 if (cpu_is_omap15xx() || !lcd_dma.ext_ctrl)
360 return;
361
362 w = omap_readw(OMAP1610_DMA_LCD_CTRL);
363 w |= 1 << 8;
364 omap_writew(w, OMAP1610_DMA_LCD_CTRL);
365
366 lcd_dma.active = 1;
367
368 w = omap_readw(OMAP1610_DMA_LCD_CCR);
369 w |= 1 << 7;
370 omap_writew(w, OMAP1610_DMA_LCD_CCR);
371 }
372 EXPORT_SYMBOL(omap_enable_lcd_dma);
373
374 void omap_setup_lcd_dma(void)
375 {
376 BUG_ON(lcd_dma.active);
377 if (!cpu_is_omap15xx()) {
378 /* Set some reasonable defaults */
379 omap_writew(0x5440, OMAP1610_DMA_LCD_CCR);
380 omap_writew(0x9102, OMAP1610_DMA_LCD_CSDP);
381 omap_writew(0x0004, OMAP1610_DMA_LCD_LCH_CTRL);
382 }
383 set_b1_regs();
384 if (!cpu_is_omap15xx()) {
385 u16 w;
386
387 w = omap_readw(OMAP1610_DMA_LCD_CCR);
388 /*
389 * If DMA was already active set the end_prog bit to have
390 * the programmed register set loaded into the active
391 * register set.
392 */
393 w |= 1 << 11; /* End_prog */
394 if (!lcd_dma.single_transfer)
395 w |= (3 << 8); /* Auto_init, repeat */
396 omap_writew(w, OMAP1610_DMA_LCD_CCR);
397 }
398 }
399 EXPORT_SYMBOL(omap_setup_lcd_dma);
400
401 void omap_stop_lcd_dma(void)
402 {
403 u16 w;
404
405 lcd_dma.active = 0;
406 if (cpu_is_omap15xx() || !lcd_dma.ext_ctrl)
407 return;
408
409 w = omap_readw(OMAP1610_DMA_LCD_CCR);
410 w &= ~(1 << 7);
411 omap_writew(w, OMAP1610_DMA_LCD_CCR);
412
413 w = omap_readw(OMAP1610_DMA_LCD_CTRL);
414 w &= ~(1 << 8);
415 omap_writew(w, OMAP1610_DMA_LCD_CTRL);
416 }
417 EXPORT_SYMBOL(omap_stop_lcd_dma);
418
419 static int __init omap_init_lcd_dma(void)
420 {
421 int r;
422
423 if (!cpu_class_is_omap1())
424 return -ENODEV;
425
426 if (cpu_is_omap16xx()) {
427 u16 w;
428
429 /* this would prevent OMAP sleep */
430 w = omap_readw(OMAP1610_DMA_LCD_CTRL);
431 w &= ~(1 << 8);
432 omap_writew(w, OMAP1610_DMA_LCD_CTRL);
433 }
434
435 spin_lock_init(&lcd_dma.lock);
436
437 r = request_irq(INT_DMA_LCD, lcd_dma_irq_handler, 0,
438 "LCD DMA", NULL);
439 if (r != 0)
440 printk(KERN_ERR "unable to request IRQ for LCD DMA "
441 "(error %d)\n", r);
442
443 return r;
444 }
445
446 arch_initcall(omap_init_lcd_dma);
447
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