Merge branch 'oprofile-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / arch / arm / mach-omap1 / mcbsp.c
1 /*
2 * linux/arch/arm/mach-omap1/mcbsp.c
3 *
4 * Copyright (C) 2008 Instituto Nokia de Tecnologia
5 * Contact: Eduardo Valentin <eduardo.valentin@indt.org.br>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * Multichannel mode not supported.
12 */
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/clk.h>
16 #include <linux/err.h>
17 #include <linux/io.h>
18 #include <linux/platform_device.h>
19
20 #include <mach/irqs.h>
21 #include <mach/dma.h>
22 #include <mach/irqs.h>
23 #include <mach/mux.h>
24 #include <mach/cpu.h>
25 #include <mach/mcbsp.h>
26 #include <mach/dsp_common.h>
27
28 #define DPS_RSTCT2_PER_EN (1 << 0)
29 #define DSP_RSTCT2_WD_PER_EN (1 << 1)
30
31 static int dsp_use;
32 static struct clk *api_clk;
33 static struct clk *dsp_clk;
34
35 static void omap1_mcbsp_request(unsigned int id)
36 {
37 /*
38 * On 1510, 1610 and 1710, McBSP1 and McBSP3
39 * are DSP public peripherals.
40 */
41 if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) {
42 if (dsp_use++ == 0) {
43 api_clk = clk_get(NULL, "api_ck");
44 dsp_clk = clk_get(NULL, "dsp_ck");
45 if (!IS_ERR(api_clk) && !IS_ERR(dsp_clk)) {
46 clk_enable(api_clk);
47 clk_enable(dsp_clk);
48
49 omap_dsp_request_mem();
50 /*
51 * DSP external peripheral reset
52 * FIXME: This should be moved to dsp code
53 */
54 __raw_writew(__raw_readw(DSP_RSTCT2) | DPS_RSTCT2_PER_EN |
55 DSP_RSTCT2_WD_PER_EN, DSP_RSTCT2);
56 }
57 }
58 }
59 }
60
61 static void omap1_mcbsp_free(unsigned int id)
62 {
63 if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) {
64 if (--dsp_use == 0) {
65 omap_dsp_release_mem();
66 if (!IS_ERR(api_clk)) {
67 clk_disable(api_clk);
68 clk_put(api_clk);
69 }
70 if (!IS_ERR(dsp_clk)) {
71 clk_disable(dsp_clk);
72 clk_put(dsp_clk);
73 }
74 }
75 }
76 }
77
78 static struct omap_mcbsp_ops omap1_mcbsp_ops = {
79 .request = omap1_mcbsp_request,
80 .free = omap1_mcbsp_free,
81 };
82
83 #ifdef CONFIG_ARCH_OMAP730
84 static struct omap_mcbsp_platform_data omap730_mcbsp_pdata[] = {
85 {
86 .phys_base = OMAP730_MCBSP1_BASE,
87 .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
88 .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
89 .rx_irq = INT_730_McBSP1RX,
90 .tx_irq = INT_730_McBSP1TX,
91 .ops = &omap1_mcbsp_ops,
92 },
93 {
94 .phys_base = OMAP730_MCBSP2_BASE,
95 .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
96 .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
97 .rx_irq = INT_730_McBSP2RX,
98 .tx_irq = INT_730_McBSP2TX,
99 .ops = &omap1_mcbsp_ops,
100 },
101 };
102 #define OMAP730_MCBSP_PDATA_SZ ARRAY_SIZE(omap730_mcbsp_pdata)
103 #else
104 #define omap730_mcbsp_pdata NULL
105 #define OMAP730_MCBSP_PDATA_SZ 0
106 #endif
107
108 #ifdef CONFIG_ARCH_OMAP15XX
109 static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
110 {
111 .phys_base = OMAP1510_MCBSP1_BASE,
112 .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
113 .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
114 .rx_irq = INT_McBSP1RX,
115 .tx_irq = INT_McBSP1TX,
116 .ops = &omap1_mcbsp_ops,
117 },
118 {
119 .phys_base = OMAP1510_MCBSP2_BASE,
120 .dma_rx_sync = OMAP_DMA_MCBSP2_RX,
121 .dma_tx_sync = OMAP_DMA_MCBSP2_TX,
122 .rx_irq = INT_1510_SPI_RX,
123 .tx_irq = INT_1510_SPI_TX,
124 .ops = &omap1_mcbsp_ops,
125 },
126 {
127 .phys_base = OMAP1510_MCBSP3_BASE,
128 .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
129 .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
130 .rx_irq = INT_McBSP3RX,
131 .tx_irq = INT_McBSP3TX,
132 .ops = &omap1_mcbsp_ops,
133 },
134 };
135 #define OMAP15XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap15xx_mcbsp_pdata)
136 #else
137 #define omap15xx_mcbsp_pdata NULL
138 #define OMAP15XX_MCBSP_PDATA_SZ 0
139 #endif
140
141 #ifdef CONFIG_ARCH_OMAP16XX
142 static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
143 {
144 .phys_base = OMAP1610_MCBSP1_BASE,
145 .dma_rx_sync = OMAP_DMA_MCBSP1_RX,
146 .dma_tx_sync = OMAP_DMA_MCBSP1_TX,
147 .rx_irq = INT_McBSP1RX,
148 .tx_irq = INT_McBSP1TX,
149 .ops = &omap1_mcbsp_ops,
150 },
151 {
152 .phys_base = OMAP1610_MCBSP2_BASE,
153 .dma_rx_sync = OMAP_DMA_MCBSP2_RX,
154 .dma_tx_sync = OMAP_DMA_MCBSP2_TX,
155 .rx_irq = INT_1610_McBSP2_RX,
156 .tx_irq = INT_1610_McBSP2_TX,
157 .ops = &omap1_mcbsp_ops,
158 },
159 {
160 .phys_base = OMAP1610_MCBSP3_BASE,
161 .dma_rx_sync = OMAP_DMA_MCBSP3_RX,
162 .dma_tx_sync = OMAP_DMA_MCBSP3_TX,
163 .rx_irq = INT_McBSP3RX,
164 .tx_irq = INT_McBSP3TX,
165 .ops = &omap1_mcbsp_ops,
166 },
167 };
168 #define OMAP16XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap16xx_mcbsp_pdata)
169 #else
170 #define omap16xx_mcbsp_pdata NULL
171 #define OMAP16XX_MCBSP_PDATA_SZ 0
172 #endif
173
174 int __init omap1_mcbsp_init(void)
175 {
176 if (cpu_is_omap730())
177 omap_mcbsp_count = OMAP730_MCBSP_PDATA_SZ;
178 if (cpu_is_omap15xx())
179 omap_mcbsp_count = OMAP15XX_MCBSP_PDATA_SZ;
180 if (cpu_is_omap16xx())
181 omap_mcbsp_count = OMAP16XX_MCBSP_PDATA_SZ;
182
183 mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *),
184 GFP_KERNEL);
185 if (!mcbsp_ptr)
186 return -ENOMEM;
187
188 if (cpu_is_omap730())
189 omap_mcbsp_register_board_cfg(omap730_mcbsp_pdata,
190 OMAP730_MCBSP_PDATA_SZ);
191
192 if (cpu_is_omap15xx())
193 omap_mcbsp_register_board_cfg(omap15xx_mcbsp_pdata,
194 OMAP15XX_MCBSP_PDATA_SZ);
195
196 if (cpu_is_omap16xx())
197 omap_mcbsp_register_board_cfg(omap16xx_mcbsp_pdata,
198 OMAP16XX_MCBSP_PDATA_SZ);
199
200 return omap_mcbsp_init();
201 }
202
203 arch_initcall(omap1_mcbsp_init);
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