arch/arm/mach-omap1/mcbsp.c

   1 /*
   2  * linux/arch/arm/mach-omap1/mcbsp.c
   3  *
   4  * Copyright (C) 2008 Instituto Nokia de Tecnologia
   5  * Contact: Eduardo Valentin <eduardo.valentin@indt.org.br>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * Multichannel mode not supported.
  12  */
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/clk.h>
  16 #include <linux/err.h>
  17 #include <linux/io.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/slab.h>
  20
  21 #include <mach/irqs.h>
  22 #include <plat/dma.h>
  23 #include <plat/mux.h>
  24 #include <plat/cpu.h>
  25 #include <plat/mcbsp.h>
  26
  27 #define DPS_RSTCT2_PER_EN       (1 << 0)
  28 #define DSP_RSTCT2_WD_PER_EN    (1 << 1)
  29
  30 static int dsp_use;
  31 static struct clk *api_clk;
  32 static struct clk *dsp_clk;
  33
  34 static void omap1_mcbsp_request(unsigned int id)
  35 {
  36         /*
  37          * On 1510, 1610 and 1710, McBSP1 and McBSP3
  38          * are DSP public peripherals.
  39          */
  40         if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) {
  41                 if (dsp_use++ == 0) {
  42                         api_clk = clk_get(NULL, "api_ck");
  43                         dsp_clk = clk_get(NULL, "dsp_ck");
  44                         if (!IS_ERR(api_clk) && !IS_ERR(dsp_clk)) {
  45                                 clk_enable(api_clk);
  46                                 clk_enable(dsp_clk);
  47
  48                                 /*
  49                                  * DSP external peripheral reset
  50                                  * FIXME: This should be moved to dsp code
  51                                  */
  52                                 __raw_writew(__raw_readw(DSP_RSTCT2) | DPS_RSTCT2_PER_EN |
  53                                                 DSP_RSTCT2_WD_PER_EN, DSP_RSTCT2);
  54                         }
  55                 }
  56         }
  57 }
  58
  59 static void omap1_mcbsp_free(unsigned int id)
  60 {
  61         if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) {
  62                 if (--dsp_use == 0) {
  63                         if (!IS_ERR(api_clk)) {
  64                                 clk_disable(api_clk);
  65                                 clk_put(api_clk);
  66                         }
  67                         if (!IS_ERR(dsp_clk)) {
  68                                 clk_disable(dsp_clk);
  69                                 clk_put(dsp_clk);
  70                         }
  71                 }
  72         }
  73 }
  74
  75 static struct omap_mcbsp_ops omap1_mcbsp_ops = {
  76         .request        = omap1_mcbsp_request,
  77         .free           = omap1_mcbsp_free,
  78 };
  79
  80 #if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
  81 static struct omap_mcbsp_platform_data omap7xx_mcbsp_pdata[] = {
  82         {
  83                 .phys_base      = OMAP7XX_MCBSP1_BASE,
  84                 .dma_rx_sync    = OMAP_DMA_MCBSP1_RX,
  85                 .dma_tx_sync    = OMAP_DMA_MCBSP1_TX,
  86                 .rx_irq         = INT_7XX_McBSP1RX,
  87                 .tx_irq         = INT_7XX_McBSP1TX,
  88                 .ops            = &omap1_mcbsp_ops,
  89         },
  90         {
  91                 .phys_base      = OMAP7XX_MCBSP2_BASE,
  92                 .dma_rx_sync    = OMAP_DMA_MCBSP3_RX,
  93                 .dma_tx_sync    = OMAP_DMA_MCBSP3_TX,
  94                 .rx_irq         = INT_7XX_McBSP2RX,
  95                 .tx_irq         = INT_7XX_McBSP2TX,
  96                 .ops            = &omap1_mcbsp_ops,
  97         },
  98 };
  99 #define OMAP7XX_MCBSP_PDATA_SZ          ARRAY_SIZE(omap7xx_mcbsp_pdata)
 100 #define OMAP7XX_MCBSP_REG_NUM           (OMAP_MCBSP_REG_XCERH / sizeof(u16) + 1)
 101 #else
 102 #define omap7xx_mcbsp_pdata             NULL
 103 #define OMAP7XX_MCBSP_PDATA_SZ          0
 104 #define OMAP7XX_MCBSP_REG_NUM           0
 105 #endif
 106
 107 #ifdef CONFIG_ARCH_OMAP15XX
 108 static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = {
 109         {
 110                 .phys_base      = OMAP1510_MCBSP1_BASE,
 111                 .dma_rx_sync    = OMAP_DMA_MCBSP1_RX,
 112                 .dma_tx_sync    = OMAP_DMA_MCBSP1_TX,
 113                 .rx_irq         = INT_McBSP1RX,
 114                 .tx_irq         = INT_McBSP1TX,
 115                 .ops            = &omap1_mcbsp_ops,
 116         },
 117         {
 118                 .phys_base      = OMAP1510_MCBSP2_BASE,
 119                 .dma_rx_sync    = OMAP_DMA_MCBSP2_RX,
 120                 .dma_tx_sync    = OMAP_DMA_MCBSP2_TX,
 121                 .rx_irq         = INT_1510_SPI_RX,
 122                 .tx_irq         = INT_1510_SPI_TX,
 123                 .ops            = &omap1_mcbsp_ops,
 124         },
 125         {
 126                 .phys_base      = OMAP1510_MCBSP3_BASE,
 127                 .dma_rx_sync    = OMAP_DMA_MCBSP3_RX,
 128                 .dma_tx_sync    = OMAP_DMA_MCBSP3_TX,
 129                 .rx_irq         = INT_McBSP3RX,
 130                 .tx_irq         = INT_McBSP3TX,
 131                 .ops            = &omap1_mcbsp_ops,
 132         },
 133 };
 134 #define OMAP15XX_MCBSP_PDATA_SZ         ARRAY_SIZE(omap15xx_mcbsp_pdata)
 135 #define OMAP15XX_MCBSP_REG_NUM          (OMAP_MCBSP_REG_XCERH / sizeof(u16) + 1)
 136 #else
 137 #define omap15xx_mcbsp_pdata            NULL
 138 #define OMAP15XX_MCBSP_PDATA_SZ         0
 139 #define OMAP15XX_MCBSP_REG_NUM          0
 140 #endif
 141
 142 #ifdef CONFIG_ARCH_OMAP16XX
 143 static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = {
 144         {
 145                 .phys_base      = OMAP1610_MCBSP1_BASE,
 146                 .dma_rx_sync    = OMAP_DMA_MCBSP1_RX,
 147                 .dma_tx_sync    = OMAP_DMA_MCBSP1_TX,
 148                 .rx_irq         = INT_McBSP1RX,
 149                 .tx_irq         = INT_McBSP1TX,
 150                 .ops            = &omap1_mcbsp_ops,
 151         },
 152         {
 153                 .phys_base      = OMAP1610_MCBSP2_BASE,
 154                 .dma_rx_sync    = OMAP_DMA_MCBSP2_RX,
 155                 .dma_tx_sync    = OMAP_DMA_MCBSP2_TX,
 156                 .rx_irq         = INT_1610_McBSP2_RX,
 157                 .tx_irq         = INT_1610_McBSP2_TX,
 158                 .ops            = &omap1_mcbsp_ops,
 159         },
 160         {
 161                 .phys_base      = OMAP1610_MCBSP3_BASE,
 162                 .dma_rx_sync    = OMAP_DMA_MCBSP3_RX,
 163                 .dma_tx_sync    = OMAP_DMA_MCBSP3_TX,
 164                 .rx_irq         = INT_McBSP3RX,
 165                 .tx_irq         = INT_McBSP3TX,
 166                 .ops            = &omap1_mcbsp_ops,
 167         },
 168 };
 169 #define OMAP16XX_MCBSP_PDATA_SZ         ARRAY_SIZE(omap16xx_mcbsp_pdata)
 170 #define OMAP16XX_MCBSP_REG_NUM          (OMAP_MCBSP_REG_XCERH / sizeof(u16) + 1)
 171 #else
 172 #define omap16xx_mcbsp_pdata            NULL
 173 #define OMAP16XX_MCBSP_PDATA_SZ         0
 174 #define OMAP16XX_MCBSP_REG_NUM          0
 175 #endif
 176
 177 static int __init omap1_mcbsp_init(void)
 178 {
 179         if (!cpu_class_is_omap1())
 180                 return -ENODEV;
 181
 182         if (cpu_is_omap7xx()) {
 183                 omap_mcbsp_count = OMAP7XX_MCBSP_PDATA_SZ;
 184                 omap_mcbsp_cache_size = OMAP7XX_MCBSP_REG_NUM * sizeof(u16);
 185         } else if (cpu_is_omap15xx()) {
 186                 omap_mcbsp_count = OMAP15XX_MCBSP_PDATA_SZ;
 187                 omap_mcbsp_cache_size = OMAP15XX_MCBSP_REG_NUM * sizeof(u16);
 188         } else if (cpu_is_omap16xx()) {
 189                 omap_mcbsp_count = OMAP16XX_MCBSP_PDATA_SZ;
 190                 omap_mcbsp_cache_size = OMAP16XX_MCBSP_REG_NUM * sizeof(u16);
 191         }
 192
 193         mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *),
 194                                                                 GFP_KERNEL);
 195         if (!mcbsp_ptr)
 196                 return -ENOMEM;
 197
 198         if (cpu_is_omap7xx())
 199                 omap_mcbsp_register_board_cfg(omap7xx_mcbsp_pdata,
 200                                                 OMAP7XX_MCBSP_PDATA_SZ);
 201
 202         if (cpu_is_omap15xx())
 203                 omap_mcbsp_register_board_cfg(omap15xx_mcbsp_pdata,
 204                                                 OMAP15XX_MCBSP_PDATA_SZ);
 205
 206         if (cpu_is_omap16xx())
 207                 omap_mcbsp_register_board_cfg(omap16xx_mcbsp_pdata,
 208                                                 OMAP16XX_MCBSP_PDATA_SZ);
 209
 210         return omap_mcbsp_init();
 211 }
 212
 213 arch_initcall(omap1_mcbsp_init);