Merge branch 'depends/rmk/devel-stable' into next/cleanup
[deliverable/linux.git] / arch / arm / mach-omap2 / board-3430sdp.c
1 /*
2 * linux/arch/arm/mach-omap2/board-3430sdp.c
3 *
4 * Copyright (C) 2007 Texas Instruments
5 *
6 * Modified from mach-omap2/board-generic.c
7 *
8 * Initial code: Syed Mohammed Khasim
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/platform_device.h>
18 #include <linux/delay.h>
19 #include <linux/input.h>
20 #include <linux/input/matrix_keypad.h>
21 #include <linux/spi/spi.h>
22 #include <linux/i2c/twl.h>
23 #include <linux/regulator/machine.h>
24 #include <linux/io.h>
25 #include <linux/gpio.h>
26 #include <linux/mmc/host.h>
27
28 #include <mach/hardware.h>
29 #include <asm/mach-types.h>
30 #include <asm/mach/arch.h>
31 #include <asm/mach/map.h>
32
33 #include <plat/mcspi.h>
34 #include <plat/board.h>
35 #include <plat/usb.h>
36 #include <plat/common.h>
37 #include <plat/dma.h>
38 #include <plat/gpmc.h>
39 #include <video/omapdss.h>
40 #include <video/omap-panel-generic-dpi.h>
41
42 #include <plat/gpmc-smc91x.h>
43
44 #include "board-flash.h"
45 #include "mux.h"
46 #include "sdram-qimonda-hyb18m512160af-6.h"
47 #include "hsmmc.h"
48 #include "pm.h"
49 #include "control.h"
50 #include "common-board-devices.h"
51
52 #define CONFIG_DISABLE_HFCLK 1
53
54 #define SDP3430_TS_GPIO_IRQ_SDPV1 3
55 #define SDP3430_TS_GPIO_IRQ_SDPV2 2
56
57 #define ENABLE_VAUX3_DEDICATED 0x03
58 #define ENABLE_VAUX3_DEV_GRP 0x20
59
60 #define TWL4030_MSECURE_GPIO 22
61
62 static uint32_t board_keymap[] = {
63 KEY(0, 0, KEY_LEFT),
64 KEY(0, 1, KEY_RIGHT),
65 KEY(0, 2, KEY_A),
66 KEY(0, 3, KEY_B),
67 KEY(0, 4, KEY_C),
68 KEY(1, 0, KEY_DOWN),
69 KEY(1, 1, KEY_UP),
70 KEY(1, 2, KEY_E),
71 KEY(1, 3, KEY_F),
72 KEY(1, 4, KEY_G),
73 KEY(2, 0, KEY_ENTER),
74 KEY(2, 1, KEY_I),
75 KEY(2, 2, KEY_J),
76 KEY(2, 3, KEY_K),
77 KEY(2, 4, KEY_3),
78 KEY(3, 0, KEY_M),
79 KEY(3, 1, KEY_N),
80 KEY(3, 2, KEY_O),
81 KEY(3, 3, KEY_P),
82 KEY(3, 4, KEY_Q),
83 KEY(4, 0, KEY_R),
84 KEY(4, 1, KEY_4),
85 KEY(4, 2, KEY_T),
86 KEY(4, 3, KEY_U),
87 KEY(4, 4, KEY_D),
88 KEY(5, 0, KEY_V),
89 KEY(5, 1, KEY_W),
90 KEY(5, 2, KEY_L),
91 KEY(5, 3, KEY_S),
92 KEY(5, 4, KEY_H),
93 0
94 };
95
96 static struct matrix_keymap_data board_map_data = {
97 .keymap = board_keymap,
98 .keymap_size = ARRAY_SIZE(board_keymap),
99 };
100
101 static struct twl4030_keypad_data sdp3430_kp_data = {
102 .keymap_data = &board_map_data,
103 .rows = 5,
104 .cols = 6,
105 .rep = 1,
106 };
107
108 #define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8
109 #define SDP3430_LCD_PANEL_ENABLE_GPIO 5
110
111 static struct gpio sdp3430_dss_gpios[] __initdata = {
112 {SDP3430_LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW, "LCD reset" },
113 {SDP3430_LCD_PANEL_BACKLIGHT_GPIO, GPIOF_OUT_INIT_LOW, "LCD Backlight"},
114 };
115
116 static int lcd_enabled;
117 static int dvi_enabled;
118
119 static void __init sdp3430_display_init(void)
120 {
121 int r;
122
123 r = gpio_request_array(sdp3430_dss_gpios,
124 ARRAY_SIZE(sdp3430_dss_gpios));
125 if (r)
126 printk(KERN_ERR "failed to get LCD control GPIOs\n");
127
128 }
129
130 static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
131 {
132 if (dvi_enabled) {
133 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
134 return -EINVAL;
135 }
136
137 gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 1);
138 gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 1);
139
140 lcd_enabled = 1;
141
142 return 0;
143 }
144
145 static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
146 {
147 lcd_enabled = 0;
148
149 gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 0);
150 gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 0);
151 }
152
153 static int sdp3430_panel_enable_dvi(struct omap_dss_device *dssdev)
154 {
155 if (lcd_enabled) {
156 printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
157 return -EINVAL;
158 }
159
160 dvi_enabled = 1;
161
162 return 0;
163 }
164
165 static void sdp3430_panel_disable_dvi(struct omap_dss_device *dssdev)
166 {
167 dvi_enabled = 0;
168 }
169
170 static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
171 {
172 return 0;
173 }
174
175 static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
176 {
177 }
178
179
180 static struct omap_dss_device sdp3430_lcd_device = {
181 .name = "lcd",
182 .driver_name = "sharp_ls_panel",
183 .type = OMAP_DISPLAY_TYPE_DPI,
184 .phy.dpi.data_lines = 16,
185 .platform_enable = sdp3430_panel_enable_lcd,
186 .platform_disable = sdp3430_panel_disable_lcd,
187 };
188
189 static struct panel_generic_dpi_data dvi_panel = {
190 .name = "generic",
191 .platform_enable = sdp3430_panel_enable_dvi,
192 .platform_disable = sdp3430_panel_disable_dvi,
193 };
194
195 static struct omap_dss_device sdp3430_dvi_device = {
196 .name = "dvi",
197 .type = OMAP_DISPLAY_TYPE_DPI,
198 .driver_name = "generic_dpi_panel",
199 .data = &dvi_panel,
200 .phy.dpi.data_lines = 24,
201 };
202
203 static struct omap_dss_device sdp3430_tv_device = {
204 .name = "tv",
205 .driver_name = "venc",
206 .type = OMAP_DISPLAY_TYPE_VENC,
207 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
208 .platform_enable = sdp3430_panel_enable_tv,
209 .platform_disable = sdp3430_panel_disable_tv,
210 };
211
212
213 static struct omap_dss_device *sdp3430_dss_devices[] = {
214 &sdp3430_lcd_device,
215 &sdp3430_dvi_device,
216 &sdp3430_tv_device,
217 };
218
219 static struct omap_dss_board_info sdp3430_dss_data = {
220 .num_devices = ARRAY_SIZE(sdp3430_dss_devices),
221 .devices = sdp3430_dss_devices,
222 .default_device = &sdp3430_lcd_device,
223 };
224
225 static struct omap_board_config_kernel sdp3430_config[] __initdata = {
226 };
227
228 static struct omap2_hsmmc_info mmc[] = {
229 {
230 .mmc = 1,
231 /* 8 bits (default) requires S6.3 == ON,
232 * so the SIM card isn't used; else 4 bits.
233 */
234 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
235 .gpio_wp = 4,
236 },
237 {
238 .mmc = 2,
239 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
240 .gpio_wp = 7,
241 },
242 {} /* Terminator */
243 };
244
245 static int sdp3430_twl_gpio_setup(struct device *dev,
246 unsigned gpio, unsigned ngpio)
247 {
248 /* gpio + 0 is "mmc0_cd" (input/IRQ),
249 * gpio + 1 is "mmc1_cd" (input/IRQ)
250 */
251 mmc[0].gpio_cd = gpio + 0;
252 mmc[1].gpio_cd = gpio + 1;
253 omap2_hsmmc_init(mmc);
254
255 /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
256 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl");
257
258 /* gpio + 15 is "sub_lcd_nRST" (output) */
259 gpio_request_one(gpio + 15, GPIOF_OUT_INIT_LOW, "sub_lcd_nRST");
260
261 return 0;
262 }
263
264 static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
265 .gpio_base = OMAP_MAX_GPIO_LINES,
266 .irq_base = TWL4030_GPIO_IRQ_BASE,
267 .irq_end = TWL4030_GPIO_IRQ_END,
268 .pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13)
269 | BIT(16) | BIT(17),
270 .setup = sdp3430_twl_gpio_setup,
271 };
272
273 /* regulator consumer mappings */
274
275 /* ads7846 on SPI */
276 static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
277 REGULATOR_SUPPLY("vcc", "spi1.0"),
278 };
279
280 static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
281 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
282 };
283
284 static struct regulator_consumer_supply sdp3430_vsim_supplies[] = {
285 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
286 };
287
288 static struct regulator_consumer_supply sdp3430_vmmc2_supplies[] = {
289 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
290 };
291
292 /*
293 * Apply all the fixed voltages since most versions of U-Boot
294 * don't bother with that initialization.
295 */
296
297 /* VAUX1 for mainboard (irda and sub-lcd) */
298 static struct regulator_init_data sdp3430_vaux1 = {
299 .constraints = {
300 .min_uV = 2800000,
301 .max_uV = 2800000,
302 .apply_uV = true,
303 .valid_modes_mask = REGULATOR_MODE_NORMAL
304 | REGULATOR_MODE_STANDBY,
305 .valid_ops_mask = REGULATOR_CHANGE_MODE
306 | REGULATOR_CHANGE_STATUS,
307 },
308 };
309
310 /* VAUX2 for camera module */
311 static struct regulator_init_data sdp3430_vaux2 = {
312 .constraints = {
313 .min_uV = 2800000,
314 .max_uV = 2800000,
315 .apply_uV = true,
316 .valid_modes_mask = REGULATOR_MODE_NORMAL
317 | REGULATOR_MODE_STANDBY,
318 .valid_ops_mask = REGULATOR_CHANGE_MODE
319 | REGULATOR_CHANGE_STATUS,
320 },
321 };
322
323 /* VAUX3 for LCD board */
324 static struct regulator_init_data sdp3430_vaux3 = {
325 .constraints = {
326 .min_uV = 2800000,
327 .max_uV = 2800000,
328 .apply_uV = true,
329 .valid_modes_mask = REGULATOR_MODE_NORMAL
330 | REGULATOR_MODE_STANDBY,
331 .valid_ops_mask = REGULATOR_CHANGE_MODE
332 | REGULATOR_CHANGE_STATUS,
333 },
334 .num_consumer_supplies = ARRAY_SIZE(sdp3430_vaux3_supplies),
335 .consumer_supplies = sdp3430_vaux3_supplies,
336 };
337
338 /* VAUX4 for OMAP VDD_CSI2 (camera) */
339 static struct regulator_init_data sdp3430_vaux4 = {
340 .constraints = {
341 .min_uV = 1800000,
342 .max_uV = 1800000,
343 .apply_uV = true,
344 .valid_modes_mask = REGULATOR_MODE_NORMAL
345 | REGULATOR_MODE_STANDBY,
346 .valid_ops_mask = REGULATOR_CHANGE_MODE
347 | REGULATOR_CHANGE_STATUS,
348 },
349 };
350
351 /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
352 static struct regulator_init_data sdp3430_vmmc1 = {
353 .constraints = {
354 .min_uV = 1850000,
355 .max_uV = 3150000,
356 .valid_modes_mask = REGULATOR_MODE_NORMAL
357 | REGULATOR_MODE_STANDBY,
358 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
359 | REGULATOR_CHANGE_MODE
360 | REGULATOR_CHANGE_STATUS,
361 },
362 .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc1_supplies),
363 .consumer_supplies = sdp3430_vmmc1_supplies,
364 };
365
366 /* VMMC2 for MMC2 card */
367 static struct regulator_init_data sdp3430_vmmc2 = {
368 .constraints = {
369 .min_uV = 1850000,
370 .max_uV = 1850000,
371 .apply_uV = true,
372 .valid_modes_mask = REGULATOR_MODE_NORMAL
373 | REGULATOR_MODE_STANDBY,
374 .valid_ops_mask = REGULATOR_CHANGE_MODE
375 | REGULATOR_CHANGE_STATUS,
376 },
377 .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc2_supplies),
378 .consumer_supplies = sdp3430_vmmc2_supplies,
379 };
380
381 /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
382 static struct regulator_init_data sdp3430_vsim = {
383 .constraints = {
384 .min_uV = 1800000,
385 .max_uV = 3000000,
386 .valid_modes_mask = REGULATOR_MODE_NORMAL
387 | REGULATOR_MODE_STANDBY,
388 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
389 | REGULATOR_CHANGE_MODE
390 | REGULATOR_CHANGE_STATUS,
391 },
392 .num_consumer_supplies = ARRAY_SIZE(sdp3430_vsim_supplies),
393 .consumer_supplies = sdp3430_vsim_supplies,
394 };
395
396 static struct twl4030_platform_data sdp3430_twldata = {
397 /* platform_data for children goes here */
398 .gpio = &sdp3430_gpio_data,
399 .keypad = &sdp3430_kp_data,
400
401 .vaux1 = &sdp3430_vaux1,
402 .vaux2 = &sdp3430_vaux2,
403 .vaux3 = &sdp3430_vaux3,
404 .vaux4 = &sdp3430_vaux4,
405 .vmmc1 = &sdp3430_vmmc1,
406 .vmmc2 = &sdp3430_vmmc2,
407 .vsim = &sdp3430_vsim,
408 };
409
410 static int __init omap3430_i2c_init(void)
411 {
412 /* i2c1 for PMIC only */
413 omap3_pmic_get_config(&sdp3430_twldata,
414 TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
415 TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO,
416 TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
417 sdp3430_twldata.vdac->constraints.apply_uV = true;
418 sdp3430_twldata.vpll2->constraints.apply_uV = true;
419 sdp3430_twldata.vpll2->constraints.name = "VDVI";
420
421 omap3_pmic_init("twl4030", &sdp3430_twldata);
422
423 /* i2c2 on camera connector (for sensor control) and optional isp1301 */
424 omap_register_i2c_bus(2, 400, NULL, 0);
425 /* i2c3 on display connector (for DVI, tfp410) */
426 omap_register_i2c_bus(3, 400, NULL, 0);
427 return 0;
428 }
429
430 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
431
432 static struct omap_smc91x_platform_data board_smc91x_data = {
433 .cs = 3,
434 .flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
435 IORESOURCE_IRQ_LOWLEVEL,
436 };
437
438 static void __init board_smc91x_init(void)
439 {
440 if (omap_rev() > OMAP3430_REV_ES1_0)
441 board_smc91x_data.gpio_irq = 6;
442 else
443 board_smc91x_data.gpio_irq = 29;
444
445 gpmc_smc91x_init(&board_smc91x_data);
446 }
447
448 #else
449
450 static inline void board_smc91x_init(void)
451 {
452 }
453
454 #endif
455
456 static void enable_board_wakeup_source(void)
457 {
458 /* T2 interrupt line (keypad) */
459 omap_mux_init_signal("sys_nirq",
460 OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
461 }
462
463 static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
464
465 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
466 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
467 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
468
469 .phy_reset = true,
470 .reset_gpio_port[0] = 57,
471 .reset_gpio_port[1] = 61,
472 .reset_gpio_port[2] = -EINVAL
473 };
474
475 #ifdef CONFIG_OMAP_MUX
476 static struct omap_board_mux board_mux[] __initdata = {
477 { .reg_offset = OMAP_MUX_TERMINATOR },
478 };
479
480 static struct omap_device_pad serial1_pads[] __initdata = {
481 /*
482 * Note that off output enable is an active low
483 * signal. So setting this means pin is a
484 * input enabled in off mode
485 */
486 OMAP_MUX_STATIC("uart1_cts.uart1_cts",
487 OMAP_PIN_INPUT |
488 OMAP_PIN_OFF_INPUT_PULLDOWN |
489 OMAP_OFFOUT_EN |
490 OMAP_MUX_MODE0),
491 OMAP_MUX_STATIC("uart1_rts.uart1_rts",
492 OMAP_PIN_OUTPUT |
493 OMAP_OFF_EN |
494 OMAP_MUX_MODE0),
495 OMAP_MUX_STATIC("uart1_rx.uart1_rx",
496 OMAP_PIN_INPUT |
497 OMAP_PIN_OFF_INPUT_PULLDOWN |
498 OMAP_OFFOUT_EN |
499 OMAP_MUX_MODE0),
500 OMAP_MUX_STATIC("uart1_tx.uart1_tx",
501 OMAP_PIN_OUTPUT |
502 OMAP_OFF_EN |
503 OMAP_MUX_MODE0),
504 };
505
506 static struct omap_device_pad serial2_pads[] __initdata = {
507 OMAP_MUX_STATIC("uart2_cts.uart2_cts",
508 OMAP_PIN_INPUT_PULLUP |
509 OMAP_PIN_OFF_INPUT_PULLDOWN |
510 OMAP_OFFOUT_EN |
511 OMAP_MUX_MODE0),
512 OMAP_MUX_STATIC("uart2_rts.uart2_rts",
513 OMAP_PIN_OUTPUT |
514 OMAP_OFF_EN |
515 OMAP_MUX_MODE0),
516 OMAP_MUX_STATIC("uart2_rx.uart2_rx",
517 OMAP_PIN_INPUT |
518 OMAP_PIN_OFF_INPUT_PULLDOWN |
519 OMAP_OFFOUT_EN |
520 OMAP_MUX_MODE0),
521 OMAP_MUX_STATIC("uart2_tx.uart2_tx",
522 OMAP_PIN_OUTPUT |
523 OMAP_OFF_EN |
524 OMAP_MUX_MODE0),
525 };
526
527 static struct omap_device_pad serial3_pads[] __initdata = {
528 OMAP_MUX_STATIC("uart3_cts_rctx.uart3_cts_rctx",
529 OMAP_PIN_INPUT_PULLDOWN |
530 OMAP_PIN_OFF_INPUT_PULLDOWN |
531 OMAP_OFFOUT_EN |
532 OMAP_MUX_MODE0),
533 OMAP_MUX_STATIC("uart3_rts_sd.uart3_rts_sd",
534 OMAP_PIN_OUTPUT |
535 OMAP_OFF_EN |
536 OMAP_MUX_MODE0),
537 OMAP_MUX_STATIC("uart3_rx_irrx.uart3_rx_irrx",
538 OMAP_PIN_INPUT |
539 OMAP_PIN_OFF_INPUT_PULLDOWN |
540 OMAP_OFFOUT_EN |
541 OMAP_MUX_MODE0),
542 OMAP_MUX_STATIC("uart3_tx_irtx.uart3_tx_irtx",
543 OMAP_PIN_OUTPUT |
544 OMAP_OFF_EN |
545 OMAP_MUX_MODE0),
546 };
547
548 static struct omap_board_data serial1_data __initdata = {
549 .id = 0,
550 .pads = serial1_pads,
551 .pads_cnt = ARRAY_SIZE(serial1_pads),
552 };
553
554 static struct omap_board_data serial2_data __initdata = {
555 .id = 1,
556 .pads = serial2_pads,
557 .pads_cnt = ARRAY_SIZE(serial2_pads),
558 };
559
560 static struct omap_board_data serial3_data __initdata = {
561 .id = 2,
562 .pads = serial3_pads,
563 .pads_cnt = ARRAY_SIZE(serial3_pads),
564 };
565
566 static inline void board_serial_init(void)
567 {
568 omap_serial_init_port(&serial1_data);
569 omap_serial_init_port(&serial2_data);
570 omap_serial_init_port(&serial3_data);
571 }
572 #else
573 #define board_mux NULL
574
575 static inline void board_serial_init(void)
576 {
577 omap_serial_init();
578 }
579 #endif
580
581 /*
582 * SDP3430 V2 Board CS organization
583 * Different from SDP3430 V1. Now 4 switches used to specify CS
584 *
585 * See also the Switch S8 settings in the comments.
586 */
587 static char chip_sel_3430[][GPMC_CS_NUM] = {
588 {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
589 {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
590 {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
591 };
592
593 static struct mtd_partition sdp_nor_partitions[] = {
594 /* bootloader (U-Boot, etc) in first sector */
595 {
596 .name = "Bootloader-NOR",
597 .offset = 0,
598 .size = SZ_256K,
599 .mask_flags = MTD_WRITEABLE, /* force read-only */
600 },
601 /* bootloader params in the next sector */
602 {
603 .name = "Params-NOR",
604 .offset = MTDPART_OFS_APPEND,
605 .size = SZ_256K,
606 .mask_flags = 0,
607 },
608 /* kernel */
609 {
610 .name = "Kernel-NOR",
611 .offset = MTDPART_OFS_APPEND,
612 .size = SZ_2M,
613 .mask_flags = 0
614 },
615 /* file system */
616 {
617 .name = "Filesystem-NOR",
618 .offset = MTDPART_OFS_APPEND,
619 .size = MTDPART_SIZ_FULL,
620 .mask_flags = 0
621 }
622 };
623
624 static struct mtd_partition sdp_onenand_partitions[] = {
625 {
626 .name = "X-Loader-OneNAND",
627 .offset = 0,
628 .size = 4 * (64 * 2048),
629 .mask_flags = MTD_WRITEABLE /* force read-only */
630 },
631 {
632 .name = "U-Boot-OneNAND",
633 .offset = MTDPART_OFS_APPEND,
634 .size = 2 * (64 * 2048),
635 .mask_flags = MTD_WRITEABLE /* force read-only */
636 },
637 {
638 .name = "U-Boot Environment-OneNAND",
639 .offset = MTDPART_OFS_APPEND,
640 .size = 1 * (64 * 2048),
641 },
642 {
643 .name = "Kernel-OneNAND",
644 .offset = MTDPART_OFS_APPEND,
645 .size = 16 * (64 * 2048),
646 },
647 {
648 .name = "File System-OneNAND",
649 .offset = MTDPART_OFS_APPEND,
650 .size = MTDPART_SIZ_FULL,
651 },
652 };
653
654 static struct mtd_partition sdp_nand_partitions[] = {
655 /* All the partition sizes are listed in terms of NAND block size */
656 {
657 .name = "X-Loader-NAND",
658 .offset = 0,
659 .size = 4 * (64 * 2048),
660 .mask_flags = MTD_WRITEABLE, /* force read-only */
661 },
662 {
663 .name = "U-Boot-NAND",
664 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
665 .size = 10 * (64 * 2048),
666 .mask_flags = MTD_WRITEABLE, /* force read-only */
667 },
668 {
669 .name = "Boot Env-NAND",
670
671 .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
672 .size = 6 * (64 * 2048),
673 },
674 {
675 .name = "Kernel-NAND",
676 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
677 .size = 40 * (64 * 2048),
678 },
679 {
680 .name = "File System - NAND",
681 .size = MTDPART_SIZ_FULL,
682 .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
683 },
684 };
685
686 static struct flash_partitions sdp_flash_partitions[] = {
687 {
688 .parts = sdp_nor_partitions,
689 .nr_parts = ARRAY_SIZE(sdp_nor_partitions),
690 },
691 {
692 .parts = sdp_onenand_partitions,
693 .nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
694 },
695 {
696 .parts = sdp_nand_partitions,
697 .nr_parts = ARRAY_SIZE(sdp_nand_partitions),
698 },
699 };
700
701 static void __init omap_3430sdp_init(void)
702 {
703 int gpio_pendown;
704
705 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
706 omap_board_config = sdp3430_config;
707 omap_board_config_size = ARRAY_SIZE(sdp3430_config);
708 omap3430_i2c_init();
709 omap_display_init(&sdp3430_dss_data);
710 if (omap_rev() > OMAP3430_REV_ES1_0)
711 gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV2;
712 else
713 gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1;
714 omap_ads7846_init(1, gpio_pendown, 310, NULL);
715 board_serial_init();
716 omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL);
717 usb_musb_init(NULL);
718 board_smc91x_init();
719 board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
720 sdp3430_display_init();
721 enable_board_wakeup_source();
722 usbhs_init(&usbhs_bdata);
723 }
724
725 MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
726 /* Maintainer: Syed Khasim - Texas Instruments Inc */
727 .atag_offset = 0x100,
728 .reserve = omap_reserve,
729 .map_io = omap3_map_io,
730 .init_early = omap3430_init_early,
731 .init_irq = omap3_init_irq,
732 .init_machine = omap_3430sdp_init,
733 .timer = &omap3_timer,
734 MACHINE_END
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