Merge branch 'for-rmk/perf' into for-rmk/virt/kvm/core
[deliverable/linux.git] / arch / arm / mach-omap2 / board-3430sdp.c
1 /*
2 * linux/arch/arm/mach-omap2/board-3430sdp.c
3 *
4 * Copyright (C) 2007 Texas Instruments
5 *
6 * Modified from mach-omap2/board-generic.c
7 *
8 * Initial code: Syed Mohammed Khasim
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/platform_device.h>
18 #include <linux/delay.h>
19 #include <linux/input.h>
20 #include <linux/input/matrix_keypad.h>
21 #include <linux/spi/spi.h>
22 #include <linux/i2c/twl.h>
23 #include <linux/regulator/machine.h>
24 #include <linux/io.h>
25 #include <linux/gpio.h>
26 #include <linux/mmc/host.h>
27 #include <linux/platform_data/spi-omap2-mcspi.h>
28
29 #include <asm/mach-types.h>
30 #include <asm/mach/arch.h>
31 #include <asm/mach/map.h>
32
33 #include "common.h"
34 #include <linux/omap-dma.h>
35 #include <video/omapdss.h>
36 #include <video/omap-panel-tfp410.h>
37
38 #include "gpmc.h"
39 #include "gpmc-smc91x.h"
40
41 #include "soc.h"
42 #include "board-flash.h"
43 #include "mux.h"
44 #include "sdram-qimonda-hyb18m512160af-6.h"
45 #include "hsmmc.h"
46 #include "pm.h"
47 #include "control.h"
48 #include "common-board-devices.h"
49
50 #define CONFIG_DISABLE_HFCLK 1
51
52 #define SDP3430_TS_GPIO_IRQ_SDPV1 3
53 #define SDP3430_TS_GPIO_IRQ_SDPV2 2
54
55 #define ENABLE_VAUX3_DEDICATED 0x03
56 #define ENABLE_VAUX3_DEV_GRP 0x20
57
58 #define TWL4030_MSECURE_GPIO 22
59
60 static uint32_t board_keymap[] = {
61 KEY(0, 0, KEY_LEFT),
62 KEY(0, 1, KEY_RIGHT),
63 KEY(0, 2, KEY_A),
64 KEY(0, 3, KEY_B),
65 KEY(0, 4, KEY_C),
66 KEY(1, 0, KEY_DOWN),
67 KEY(1, 1, KEY_UP),
68 KEY(1, 2, KEY_E),
69 KEY(1, 3, KEY_F),
70 KEY(1, 4, KEY_G),
71 KEY(2, 0, KEY_ENTER),
72 KEY(2, 1, KEY_I),
73 KEY(2, 2, KEY_J),
74 KEY(2, 3, KEY_K),
75 KEY(2, 4, KEY_3),
76 KEY(3, 0, KEY_M),
77 KEY(3, 1, KEY_N),
78 KEY(3, 2, KEY_O),
79 KEY(3, 3, KEY_P),
80 KEY(3, 4, KEY_Q),
81 KEY(4, 0, KEY_R),
82 KEY(4, 1, KEY_4),
83 KEY(4, 2, KEY_T),
84 KEY(4, 3, KEY_U),
85 KEY(4, 4, KEY_D),
86 KEY(5, 0, KEY_V),
87 KEY(5, 1, KEY_W),
88 KEY(5, 2, KEY_L),
89 KEY(5, 3, KEY_S),
90 KEY(5, 4, KEY_H),
91 0
92 };
93
94 static struct matrix_keymap_data board_map_data = {
95 .keymap = board_keymap,
96 .keymap_size = ARRAY_SIZE(board_keymap),
97 };
98
99 static struct twl4030_keypad_data sdp3430_kp_data = {
100 .keymap_data = &board_map_data,
101 .rows = 5,
102 .cols = 6,
103 .rep = 1,
104 };
105
106 #define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8
107 #define SDP3430_LCD_PANEL_ENABLE_GPIO 5
108
109 static struct gpio sdp3430_dss_gpios[] __initdata = {
110 {SDP3430_LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW, "LCD reset" },
111 {SDP3430_LCD_PANEL_BACKLIGHT_GPIO, GPIOF_OUT_INIT_LOW, "LCD Backlight"},
112 };
113
114 static void __init sdp3430_display_init(void)
115 {
116 int r;
117
118 r = gpio_request_array(sdp3430_dss_gpios,
119 ARRAY_SIZE(sdp3430_dss_gpios));
120 if (r)
121 printk(KERN_ERR "failed to get LCD control GPIOs\n");
122
123 }
124
125 static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
126 {
127 gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 1);
128 gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 1);
129
130 return 0;
131 }
132
133 static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
134 {
135 gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 0);
136 gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 0);
137 }
138
139 static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
140 {
141 return 0;
142 }
143
144 static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
145 {
146 }
147
148
149 static struct omap_dss_device sdp3430_lcd_device = {
150 .name = "lcd",
151 .driver_name = "sharp_ls_panel",
152 .type = OMAP_DISPLAY_TYPE_DPI,
153 .phy.dpi.data_lines = 16,
154 .platform_enable = sdp3430_panel_enable_lcd,
155 .platform_disable = sdp3430_panel_disable_lcd,
156 };
157
158 static struct tfp410_platform_data dvi_panel = {
159 .power_down_gpio = -1,
160 .i2c_bus_num = -1,
161 };
162
163 static struct omap_dss_device sdp3430_dvi_device = {
164 .name = "dvi",
165 .type = OMAP_DISPLAY_TYPE_DPI,
166 .driver_name = "tfp410",
167 .data = &dvi_panel,
168 .phy.dpi.data_lines = 24,
169 };
170
171 static struct omap_dss_device sdp3430_tv_device = {
172 .name = "tv",
173 .driver_name = "venc",
174 .type = OMAP_DISPLAY_TYPE_VENC,
175 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
176 .platform_enable = sdp3430_panel_enable_tv,
177 .platform_disable = sdp3430_panel_disable_tv,
178 };
179
180
181 static struct omap_dss_device *sdp3430_dss_devices[] = {
182 &sdp3430_lcd_device,
183 &sdp3430_dvi_device,
184 &sdp3430_tv_device,
185 };
186
187 static struct omap_dss_board_info sdp3430_dss_data = {
188 .num_devices = ARRAY_SIZE(sdp3430_dss_devices),
189 .devices = sdp3430_dss_devices,
190 .default_device = &sdp3430_lcd_device,
191 };
192
193 static struct omap2_hsmmc_info mmc[] = {
194 {
195 .mmc = 1,
196 /* 8 bits (default) requires S6.3 == ON,
197 * so the SIM card isn't used; else 4 bits.
198 */
199 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
200 .gpio_wp = 4,
201 .deferred = true,
202 },
203 {
204 .mmc = 2,
205 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
206 .gpio_wp = 7,
207 .deferred = true,
208 },
209 {} /* Terminator */
210 };
211
212 static int sdp3430_twl_gpio_setup(struct device *dev,
213 unsigned gpio, unsigned ngpio)
214 {
215 /* gpio + 0 is "mmc0_cd" (input/IRQ),
216 * gpio + 1 is "mmc1_cd" (input/IRQ)
217 */
218 mmc[0].gpio_cd = gpio + 0;
219 mmc[1].gpio_cd = gpio + 1;
220 omap_hsmmc_late_init(mmc);
221
222 /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
223 gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl");
224
225 /* gpio + 15 is "sub_lcd_nRST" (output) */
226 gpio_request_one(gpio + 15, GPIOF_OUT_INIT_LOW, "sub_lcd_nRST");
227
228 return 0;
229 }
230
231 static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
232 .pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13)
233 | BIT(16) | BIT(17),
234 .setup = sdp3430_twl_gpio_setup,
235 };
236
237 /* regulator consumer mappings */
238
239 /* ads7846 on SPI */
240 static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
241 REGULATOR_SUPPLY("vcc", "spi1.0"),
242 };
243
244 static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
245 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
246 };
247
248 static struct regulator_consumer_supply sdp3430_vsim_supplies[] = {
249 REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
250 };
251
252 static struct regulator_consumer_supply sdp3430_vmmc2_supplies[] = {
253 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
254 };
255
256 /*
257 * Apply all the fixed voltages since most versions of U-Boot
258 * don't bother with that initialization.
259 */
260
261 /* VAUX1 for mainboard (irda and sub-lcd) */
262 static struct regulator_init_data sdp3430_vaux1 = {
263 .constraints = {
264 .min_uV = 2800000,
265 .max_uV = 2800000,
266 .apply_uV = true,
267 .valid_modes_mask = REGULATOR_MODE_NORMAL
268 | REGULATOR_MODE_STANDBY,
269 .valid_ops_mask = REGULATOR_CHANGE_MODE
270 | REGULATOR_CHANGE_STATUS,
271 },
272 };
273
274 /* VAUX2 for camera module */
275 static struct regulator_init_data sdp3430_vaux2 = {
276 .constraints = {
277 .min_uV = 2800000,
278 .max_uV = 2800000,
279 .apply_uV = true,
280 .valid_modes_mask = REGULATOR_MODE_NORMAL
281 | REGULATOR_MODE_STANDBY,
282 .valid_ops_mask = REGULATOR_CHANGE_MODE
283 | REGULATOR_CHANGE_STATUS,
284 },
285 };
286
287 /* VAUX3 for LCD board */
288 static struct regulator_init_data sdp3430_vaux3 = {
289 .constraints = {
290 .min_uV = 2800000,
291 .max_uV = 2800000,
292 .apply_uV = true,
293 .valid_modes_mask = REGULATOR_MODE_NORMAL
294 | REGULATOR_MODE_STANDBY,
295 .valid_ops_mask = REGULATOR_CHANGE_MODE
296 | REGULATOR_CHANGE_STATUS,
297 },
298 .num_consumer_supplies = ARRAY_SIZE(sdp3430_vaux3_supplies),
299 .consumer_supplies = sdp3430_vaux3_supplies,
300 };
301
302 /* VAUX4 for OMAP VDD_CSI2 (camera) */
303 static struct regulator_init_data sdp3430_vaux4 = {
304 .constraints = {
305 .min_uV = 1800000,
306 .max_uV = 1800000,
307 .apply_uV = true,
308 .valid_modes_mask = REGULATOR_MODE_NORMAL
309 | REGULATOR_MODE_STANDBY,
310 .valid_ops_mask = REGULATOR_CHANGE_MODE
311 | REGULATOR_CHANGE_STATUS,
312 },
313 };
314
315 /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
316 static struct regulator_init_data sdp3430_vmmc1 = {
317 .constraints = {
318 .min_uV = 1850000,
319 .max_uV = 3150000,
320 .valid_modes_mask = REGULATOR_MODE_NORMAL
321 | REGULATOR_MODE_STANDBY,
322 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
323 | REGULATOR_CHANGE_MODE
324 | REGULATOR_CHANGE_STATUS,
325 },
326 .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc1_supplies),
327 .consumer_supplies = sdp3430_vmmc1_supplies,
328 };
329
330 /* VMMC2 for MMC2 card */
331 static struct regulator_init_data sdp3430_vmmc2 = {
332 .constraints = {
333 .min_uV = 1850000,
334 .max_uV = 1850000,
335 .apply_uV = true,
336 .valid_modes_mask = REGULATOR_MODE_NORMAL
337 | REGULATOR_MODE_STANDBY,
338 .valid_ops_mask = REGULATOR_CHANGE_MODE
339 | REGULATOR_CHANGE_STATUS,
340 },
341 .num_consumer_supplies = ARRAY_SIZE(sdp3430_vmmc2_supplies),
342 .consumer_supplies = sdp3430_vmmc2_supplies,
343 };
344
345 /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
346 static struct regulator_init_data sdp3430_vsim = {
347 .constraints = {
348 .min_uV = 1800000,
349 .max_uV = 3000000,
350 .valid_modes_mask = REGULATOR_MODE_NORMAL
351 | REGULATOR_MODE_STANDBY,
352 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
353 | REGULATOR_CHANGE_MODE
354 | REGULATOR_CHANGE_STATUS,
355 },
356 .num_consumer_supplies = ARRAY_SIZE(sdp3430_vsim_supplies),
357 .consumer_supplies = sdp3430_vsim_supplies,
358 };
359
360 static struct twl4030_platform_data sdp3430_twldata = {
361 /* platform_data for children goes here */
362 .gpio = &sdp3430_gpio_data,
363 .keypad = &sdp3430_kp_data,
364
365 .vaux1 = &sdp3430_vaux1,
366 .vaux2 = &sdp3430_vaux2,
367 .vaux3 = &sdp3430_vaux3,
368 .vaux4 = &sdp3430_vaux4,
369 .vmmc1 = &sdp3430_vmmc1,
370 .vmmc2 = &sdp3430_vmmc2,
371 .vsim = &sdp3430_vsim,
372 };
373
374 static int __init omap3430_i2c_init(void)
375 {
376 /* i2c1 for PMIC only */
377 omap3_pmic_get_config(&sdp3430_twldata,
378 TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
379 TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO,
380 TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
381 sdp3430_twldata.vdac->constraints.apply_uV = true;
382 sdp3430_twldata.vpll2->constraints.apply_uV = true;
383 sdp3430_twldata.vpll2->constraints.name = "VDVI";
384
385 omap3_pmic_init("twl4030", &sdp3430_twldata);
386
387 /* i2c2 on camera connector (for sensor control) and optional isp1301 */
388 omap_register_i2c_bus(2, 400, NULL, 0);
389 /* i2c3 on display connector (for DVI, tfp410) */
390 omap_register_i2c_bus(3, 400, NULL, 0);
391 return 0;
392 }
393
394 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
395
396 static struct omap_smc91x_platform_data board_smc91x_data = {
397 .cs = 3,
398 .flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
399 IORESOURCE_IRQ_LOWLEVEL,
400 };
401
402 static void __init board_smc91x_init(void)
403 {
404 if (omap_rev() > OMAP3430_REV_ES1_0)
405 board_smc91x_data.gpio_irq = 6;
406 else
407 board_smc91x_data.gpio_irq = 29;
408
409 gpmc_smc91x_init(&board_smc91x_data);
410 }
411
412 #else
413
414 static inline void board_smc91x_init(void)
415 {
416 }
417
418 #endif
419
420 static void enable_board_wakeup_source(void)
421 {
422 /* T2 interrupt line (keypad) */
423 omap_mux_init_signal("sys_nirq",
424 OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
425 }
426
427 static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
428
429 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
430 .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
431 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
432
433 .phy_reset = true,
434 .reset_gpio_port[0] = 57,
435 .reset_gpio_port[1] = 61,
436 .reset_gpio_port[2] = -EINVAL
437 };
438
439 #ifdef CONFIG_OMAP_MUX
440 static struct omap_board_mux board_mux[] __initdata = {
441 { .reg_offset = OMAP_MUX_TERMINATOR },
442 };
443 #else
444 #define board_mux NULL
445 #endif
446
447 /*
448 * SDP3430 V2 Board CS organization
449 * Different from SDP3430 V1. Now 4 switches used to specify CS
450 *
451 * See also the Switch S8 settings in the comments.
452 */
453 static char chip_sel_3430[][GPMC_CS_NUM] = {
454 {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
455 {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
456 {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
457 };
458
459 static struct mtd_partition sdp_nor_partitions[] = {
460 /* bootloader (U-Boot, etc) in first sector */
461 {
462 .name = "Bootloader-NOR",
463 .offset = 0,
464 .size = SZ_256K,
465 .mask_flags = MTD_WRITEABLE, /* force read-only */
466 },
467 /* bootloader params in the next sector */
468 {
469 .name = "Params-NOR",
470 .offset = MTDPART_OFS_APPEND,
471 .size = SZ_256K,
472 .mask_flags = 0,
473 },
474 /* kernel */
475 {
476 .name = "Kernel-NOR",
477 .offset = MTDPART_OFS_APPEND,
478 .size = SZ_2M,
479 .mask_flags = 0
480 },
481 /* file system */
482 {
483 .name = "Filesystem-NOR",
484 .offset = MTDPART_OFS_APPEND,
485 .size = MTDPART_SIZ_FULL,
486 .mask_flags = 0
487 }
488 };
489
490 static struct mtd_partition sdp_onenand_partitions[] = {
491 {
492 .name = "X-Loader-OneNAND",
493 .offset = 0,
494 .size = 4 * (64 * 2048),
495 .mask_flags = MTD_WRITEABLE /* force read-only */
496 },
497 {
498 .name = "U-Boot-OneNAND",
499 .offset = MTDPART_OFS_APPEND,
500 .size = 2 * (64 * 2048),
501 .mask_flags = MTD_WRITEABLE /* force read-only */
502 },
503 {
504 .name = "U-Boot Environment-OneNAND",
505 .offset = MTDPART_OFS_APPEND,
506 .size = 1 * (64 * 2048),
507 },
508 {
509 .name = "Kernel-OneNAND",
510 .offset = MTDPART_OFS_APPEND,
511 .size = 16 * (64 * 2048),
512 },
513 {
514 .name = "File System-OneNAND",
515 .offset = MTDPART_OFS_APPEND,
516 .size = MTDPART_SIZ_FULL,
517 },
518 };
519
520 static struct mtd_partition sdp_nand_partitions[] = {
521 /* All the partition sizes are listed in terms of NAND block size */
522 {
523 .name = "X-Loader-NAND",
524 .offset = 0,
525 .size = 4 * (64 * 2048),
526 .mask_flags = MTD_WRITEABLE, /* force read-only */
527 },
528 {
529 .name = "U-Boot-NAND",
530 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
531 .size = 10 * (64 * 2048),
532 .mask_flags = MTD_WRITEABLE, /* force read-only */
533 },
534 {
535 .name = "Boot Env-NAND",
536
537 .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
538 .size = 6 * (64 * 2048),
539 },
540 {
541 .name = "Kernel-NAND",
542 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
543 .size = 40 * (64 * 2048),
544 },
545 {
546 .name = "File System - NAND",
547 .size = MTDPART_SIZ_FULL,
548 .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
549 },
550 };
551
552 static struct flash_partitions sdp_flash_partitions[] = {
553 {
554 .parts = sdp_nor_partitions,
555 .nr_parts = ARRAY_SIZE(sdp_nor_partitions),
556 },
557 {
558 .parts = sdp_onenand_partitions,
559 .nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
560 },
561 {
562 .parts = sdp_nand_partitions,
563 .nr_parts = ARRAY_SIZE(sdp_nand_partitions),
564 },
565 };
566
567 static void __init omap_3430sdp_init(void)
568 {
569 int gpio_pendown;
570
571 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
572 omap_hsmmc_init(mmc);
573 omap3430_i2c_init();
574 omap_display_init(&sdp3430_dss_data);
575 if (omap_rev() > OMAP3430_REV_ES1_0)
576 gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV2;
577 else
578 gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1;
579 omap_ads7846_init(1, gpio_pendown, 310, NULL);
580 omap_serial_init();
581 omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL);
582 usb_musb_init(NULL);
583 board_smc91x_init();
584 board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
585 sdp3430_display_init();
586 enable_board_wakeup_source();
587 usbhs_init(&usbhs_bdata);
588 }
589
590 MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
591 /* Maintainer: Syed Khasim - Texas Instruments Inc */
592 .atag_offset = 0x100,
593 .reserve = omap_reserve,
594 .map_io = omap3_map_io,
595 .init_early = omap3430_init_early,
596 .init_irq = omap3_init_irq,
597 .handle_irq = omap3_intc_handle_irq,
598 .init_machine = omap_3430sdp_init,
599 .init_late = omap3430_init_late,
600 .timer = &omap3_timer,
601 .restart = omap3xxx_restart,
602 MACHINE_END
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