ARM: OMAP: Convert to use ->reserve method to reserve boot time memory
[deliverable/linux.git] / arch / arm / mach-omap2 / board-3430sdp.c
1 /*
2 * linux/arch/arm/mach-omap2/board-3430sdp.c
3 *
4 * Copyright (C) 2007 Texas Instruments
5 *
6 * Modified from mach-omap2/board-generic.c
7 *
8 * Initial code: Syed Mohammed Khasim
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/platform_device.h>
18 #include <linux/delay.h>
19 #include <linux/input.h>
20 #include <linux/input/matrix_keypad.h>
21 #include <linux/spi/spi.h>
22 #include <linux/spi/ads7846.h>
23 #include <linux/i2c/twl.h>
24 #include <linux/regulator/machine.h>
25 #include <linux/io.h>
26 #include <linux/gpio.h>
27
28 #include <mach/hardware.h>
29 #include <asm/mach-types.h>
30 #include <asm/mach/arch.h>
31 #include <asm/mach/map.h>
32
33 #include <plat/mcspi.h>
34 #include <plat/board.h>
35 #include <plat/usb.h>
36 #include <plat/common.h>
37 #include <plat/dma.h>
38 #include <plat/gpmc.h>
39 #include <plat/display.h>
40
41 #include <plat/control.h>
42 #include <plat/gpmc-smc91x.h>
43
44 #include <mach/board-sdp.h>
45
46 #include "mux.h"
47 #include "sdram-qimonda-hyb18m512160af-6.h"
48 #include "hsmmc.h"
49 #include "pm.h"
50
51 #define CONFIG_DISABLE_HFCLK 1
52
53 #define SDP3430_TS_GPIO_IRQ_SDPV1 3
54 #define SDP3430_TS_GPIO_IRQ_SDPV2 2
55
56 #define ENABLE_VAUX3_DEDICATED 0x03
57 #define ENABLE_VAUX3_DEV_GRP 0x20
58
59 #define TWL4030_MSECURE_GPIO 22
60
61 /* FIXME: These values need to be updated based on more profiling on 3430sdp*/
62 static struct cpuidle_params omap3_cpuidle_params_table[] = {
63 /* C1 */
64 {1, 2, 2, 5},
65 /* C2 */
66 {1, 10, 10, 30},
67 /* C3 */
68 {1, 50, 50, 300},
69 /* C4 */
70 {1, 1500, 1800, 4000},
71 /* C5 */
72 {1, 2500, 7500, 12000},
73 /* C6 */
74 {1, 3000, 8500, 15000},
75 /* C7 */
76 {1, 10000, 30000, 300000},
77 };
78
79 static int board_keymap[] = {
80 KEY(0, 0, KEY_LEFT),
81 KEY(0, 1, KEY_RIGHT),
82 KEY(0, 2, KEY_A),
83 KEY(0, 3, KEY_B),
84 KEY(0, 4, KEY_C),
85 KEY(1, 0, KEY_DOWN),
86 KEY(1, 1, KEY_UP),
87 KEY(1, 2, KEY_E),
88 KEY(1, 3, KEY_F),
89 KEY(1, 4, KEY_G),
90 KEY(2, 0, KEY_ENTER),
91 KEY(2, 1, KEY_I),
92 KEY(2, 2, KEY_J),
93 KEY(2, 3, KEY_K),
94 KEY(2, 4, KEY_3),
95 KEY(3, 0, KEY_M),
96 KEY(3, 1, KEY_N),
97 KEY(3, 2, KEY_O),
98 KEY(3, 3, KEY_P),
99 KEY(3, 4, KEY_Q),
100 KEY(4, 0, KEY_R),
101 KEY(4, 1, KEY_4),
102 KEY(4, 2, KEY_T),
103 KEY(4, 3, KEY_U),
104 KEY(4, 4, KEY_D),
105 KEY(5, 0, KEY_V),
106 KEY(5, 1, KEY_W),
107 KEY(5, 2, KEY_L),
108 KEY(5, 3, KEY_S),
109 KEY(5, 4, KEY_H),
110 0
111 };
112
113 static struct matrix_keymap_data board_map_data = {
114 .keymap = board_keymap,
115 .keymap_size = ARRAY_SIZE(board_keymap),
116 };
117
118 static struct twl4030_keypad_data sdp3430_kp_data = {
119 .keymap_data = &board_map_data,
120 .rows = 5,
121 .cols = 6,
122 .rep = 1,
123 };
124
125 static int ts_gpio; /* Needed for ads7846_get_pendown_state */
126
127 /**
128 * @brief ads7846_dev_init : Requests & sets GPIO line for pen-irq
129 *
130 * @return - void. If request gpio fails then Flag KERN_ERR.
131 */
132 static void ads7846_dev_init(void)
133 {
134 if (gpio_request(ts_gpio, "ADS7846 pendown") < 0) {
135 printk(KERN_ERR "can't get ads746 pen down GPIO\n");
136 return;
137 }
138
139 gpio_direction_input(ts_gpio);
140 gpio_set_debounce(ts_gpio, 310);
141 }
142
143 static int ads7846_get_pendown_state(void)
144 {
145 return !gpio_get_value(ts_gpio);
146 }
147
148 static struct ads7846_platform_data tsc2046_config __initdata = {
149 .get_pendown_state = ads7846_get_pendown_state,
150 .keep_vref_on = 1,
151 .wakeup = true,
152 };
153
154
155 static struct omap2_mcspi_device_config tsc2046_mcspi_config = {
156 .turbo_mode = 0,
157 .single_channel = 1, /* 0: slave, 1: master */
158 };
159
160 static struct spi_board_info sdp3430_spi_board_info[] __initdata = {
161 [0] = {
162 /*
163 * TSC2046 operates at a max freqency of 2MHz, so
164 * operate slightly below at 1.5MHz
165 */
166 .modalias = "ads7846",
167 .bus_num = 1,
168 .chip_select = 0,
169 .max_speed_hz = 1500000,
170 .controller_data = &tsc2046_mcspi_config,
171 .irq = 0,
172 .platform_data = &tsc2046_config,
173 },
174 };
175
176
177 #define SDP3430_LCD_PANEL_BACKLIGHT_GPIO 8
178 #define SDP3430_LCD_PANEL_ENABLE_GPIO 5
179
180 static unsigned backlight_gpio;
181 static unsigned enable_gpio;
182 static int lcd_enabled;
183 static int dvi_enabled;
184
185 static void __init sdp3430_display_init(void)
186 {
187 int r;
188
189 enable_gpio = SDP3430_LCD_PANEL_ENABLE_GPIO;
190 backlight_gpio = SDP3430_LCD_PANEL_BACKLIGHT_GPIO;
191
192 r = gpio_request(enable_gpio, "LCD reset");
193 if (r) {
194 printk(KERN_ERR "failed to get LCD reset GPIO\n");
195 goto err0;
196 }
197
198 r = gpio_request(backlight_gpio, "LCD Backlight");
199 if (r) {
200 printk(KERN_ERR "failed to get LCD backlight GPIO\n");
201 goto err1;
202 }
203
204 gpio_direction_output(enable_gpio, 0);
205 gpio_direction_output(backlight_gpio, 0);
206
207 return;
208 err1:
209 gpio_free(enable_gpio);
210 err0:
211 return;
212 }
213
214 static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
215 {
216 if (dvi_enabled) {
217 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
218 return -EINVAL;
219 }
220
221 gpio_direction_output(enable_gpio, 1);
222 gpio_direction_output(backlight_gpio, 1);
223
224 lcd_enabled = 1;
225
226 return 0;
227 }
228
229 static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
230 {
231 lcd_enabled = 0;
232
233 gpio_direction_output(enable_gpio, 0);
234 gpio_direction_output(backlight_gpio, 0);
235 }
236
237 static int sdp3430_panel_enable_dvi(struct omap_dss_device *dssdev)
238 {
239 if (lcd_enabled) {
240 printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
241 return -EINVAL;
242 }
243
244 dvi_enabled = 1;
245
246 return 0;
247 }
248
249 static void sdp3430_panel_disable_dvi(struct omap_dss_device *dssdev)
250 {
251 dvi_enabled = 0;
252 }
253
254 static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
255 {
256 return 0;
257 }
258
259 static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
260 {
261 }
262
263
264 static struct omap_dss_device sdp3430_lcd_device = {
265 .name = "lcd",
266 .driver_name = "sharp_ls_panel",
267 .type = OMAP_DISPLAY_TYPE_DPI,
268 .phy.dpi.data_lines = 16,
269 .platform_enable = sdp3430_panel_enable_lcd,
270 .platform_disable = sdp3430_panel_disable_lcd,
271 };
272
273 static struct omap_dss_device sdp3430_dvi_device = {
274 .name = "dvi",
275 .driver_name = "generic_panel",
276 .type = OMAP_DISPLAY_TYPE_DPI,
277 .phy.dpi.data_lines = 24,
278 .platform_enable = sdp3430_panel_enable_dvi,
279 .platform_disable = sdp3430_panel_disable_dvi,
280 };
281
282 static struct omap_dss_device sdp3430_tv_device = {
283 .name = "tv",
284 .driver_name = "venc",
285 .type = OMAP_DISPLAY_TYPE_VENC,
286 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
287 .platform_enable = sdp3430_panel_enable_tv,
288 .platform_disable = sdp3430_panel_disable_tv,
289 };
290
291
292 static struct omap_dss_device *sdp3430_dss_devices[] = {
293 &sdp3430_lcd_device,
294 &sdp3430_dvi_device,
295 &sdp3430_tv_device,
296 };
297
298 static struct omap_dss_board_info sdp3430_dss_data = {
299 .num_devices = ARRAY_SIZE(sdp3430_dss_devices),
300 .devices = sdp3430_dss_devices,
301 .default_device = &sdp3430_lcd_device,
302 };
303
304 static struct platform_device sdp3430_dss_device = {
305 .name = "omapdss",
306 .id = -1,
307 .dev = {
308 .platform_data = &sdp3430_dss_data,
309 },
310 };
311
312 static struct regulator_consumer_supply sdp3430_vdda_dac_supply = {
313 .supply = "vdda_dac",
314 .dev = &sdp3430_dss_device.dev,
315 };
316
317 static struct platform_device *sdp3430_devices[] __initdata = {
318 &sdp3430_dss_device,
319 };
320
321 static struct omap_board_config_kernel sdp3430_config[] __initdata = {
322 };
323
324 static void __init omap_3430sdp_init_irq(void)
325 {
326 omap_board_config = sdp3430_config;
327 omap_board_config_size = ARRAY_SIZE(sdp3430_config);
328 omap3_pm_init_cpuidle(omap3_cpuidle_params_table);
329 omap2_init_common_hw(hyb18m512160af6_sdrc_params, NULL);
330 omap_init_irq();
331 omap_gpio_init();
332 }
333
334 static int sdp3430_batt_table[] = {
335 /* 0 C*/
336 30800, 29500, 28300, 27100,
337 26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
338 17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
339 11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310,
340 8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830,
341 5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170,
342 4040, 3910, 3790, 3670, 3550
343 };
344
345 static struct twl4030_bci_platform_data sdp3430_bci_data = {
346 .battery_tmp_tbl = sdp3430_batt_table,
347 .tblsize = ARRAY_SIZE(sdp3430_batt_table),
348 };
349
350 static struct omap2_hsmmc_info mmc[] = {
351 {
352 .mmc = 1,
353 /* 8 bits (default) requires S6.3 == ON,
354 * so the SIM card isn't used; else 4 bits.
355 */
356 .wires = 8,
357 .gpio_wp = 4,
358 },
359 {
360 .mmc = 2,
361 .wires = 8,
362 .gpio_wp = 7,
363 },
364 {} /* Terminator */
365 };
366
367 static struct regulator_consumer_supply sdp3430_vmmc1_supply = {
368 .supply = "vmmc",
369 };
370
371 static struct regulator_consumer_supply sdp3430_vsim_supply = {
372 .supply = "vmmc_aux",
373 };
374
375 static struct regulator_consumer_supply sdp3430_vmmc2_supply = {
376 .supply = "vmmc",
377 };
378
379 static int sdp3430_twl_gpio_setup(struct device *dev,
380 unsigned gpio, unsigned ngpio)
381 {
382 /* gpio + 0 is "mmc0_cd" (input/IRQ),
383 * gpio + 1 is "mmc1_cd" (input/IRQ)
384 */
385 mmc[0].gpio_cd = gpio + 0;
386 mmc[1].gpio_cd = gpio + 1;
387 omap2_hsmmc_init(mmc);
388
389 /* link regulators to MMC adapters ... we "know" the
390 * regulators will be set up only *after* we return.
391 */
392 sdp3430_vmmc1_supply.dev = mmc[0].dev;
393 sdp3430_vsim_supply.dev = mmc[0].dev;
394 sdp3430_vmmc2_supply.dev = mmc[1].dev;
395
396 /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
397 gpio_request(gpio + 7, "sub_lcd_en_bkl");
398 gpio_direction_output(gpio + 7, 0);
399
400 /* gpio + 15 is "sub_lcd_nRST" (output) */
401 gpio_request(gpio + 15, "sub_lcd_nRST");
402 gpio_direction_output(gpio + 15, 0);
403
404 return 0;
405 }
406
407 static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
408 .gpio_base = OMAP_MAX_GPIO_LINES,
409 .irq_base = TWL4030_GPIO_IRQ_BASE,
410 .irq_end = TWL4030_GPIO_IRQ_END,
411 .pulldowns = BIT(2) | BIT(6) | BIT(8) | BIT(13)
412 | BIT(16) | BIT(17),
413 .setup = sdp3430_twl_gpio_setup,
414 };
415
416 static struct twl4030_usb_data sdp3430_usb_data = {
417 .usb_mode = T2_USB_MODE_ULPI,
418 };
419
420 static struct twl4030_madc_platform_data sdp3430_madc_data = {
421 .irq_line = 1,
422 };
423
424 /*
425 * Apply all the fixed voltages since most versions of U-Boot
426 * don't bother with that initialization.
427 */
428
429 /* VAUX1 for mainboard (irda and sub-lcd) */
430 static struct regulator_init_data sdp3430_vaux1 = {
431 .constraints = {
432 .min_uV = 2800000,
433 .max_uV = 2800000,
434 .apply_uV = true,
435 .valid_modes_mask = REGULATOR_MODE_NORMAL
436 | REGULATOR_MODE_STANDBY,
437 .valid_ops_mask = REGULATOR_CHANGE_MODE
438 | REGULATOR_CHANGE_STATUS,
439 },
440 };
441
442 /* VAUX2 for camera module */
443 static struct regulator_init_data sdp3430_vaux2 = {
444 .constraints = {
445 .min_uV = 2800000,
446 .max_uV = 2800000,
447 .apply_uV = true,
448 .valid_modes_mask = REGULATOR_MODE_NORMAL
449 | REGULATOR_MODE_STANDBY,
450 .valid_ops_mask = REGULATOR_CHANGE_MODE
451 | REGULATOR_CHANGE_STATUS,
452 },
453 };
454
455 /* VAUX3 for LCD board */
456 static struct regulator_init_data sdp3430_vaux3 = {
457 .constraints = {
458 .min_uV = 2800000,
459 .max_uV = 2800000,
460 .apply_uV = true,
461 .valid_modes_mask = REGULATOR_MODE_NORMAL
462 | REGULATOR_MODE_STANDBY,
463 .valid_ops_mask = REGULATOR_CHANGE_MODE
464 | REGULATOR_CHANGE_STATUS,
465 },
466 };
467
468 /* VAUX4 for OMAP VDD_CSI2 (camera) */
469 static struct regulator_init_data sdp3430_vaux4 = {
470 .constraints = {
471 .min_uV = 1800000,
472 .max_uV = 1800000,
473 .apply_uV = true,
474 .valid_modes_mask = REGULATOR_MODE_NORMAL
475 | REGULATOR_MODE_STANDBY,
476 .valid_ops_mask = REGULATOR_CHANGE_MODE
477 | REGULATOR_CHANGE_STATUS,
478 },
479 };
480
481 /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
482 static struct regulator_init_data sdp3430_vmmc1 = {
483 .constraints = {
484 .min_uV = 1850000,
485 .max_uV = 3150000,
486 .valid_modes_mask = REGULATOR_MODE_NORMAL
487 | REGULATOR_MODE_STANDBY,
488 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
489 | REGULATOR_CHANGE_MODE
490 | REGULATOR_CHANGE_STATUS,
491 },
492 .num_consumer_supplies = 1,
493 .consumer_supplies = &sdp3430_vmmc1_supply,
494 };
495
496 /* VMMC2 for MMC2 card */
497 static struct regulator_init_data sdp3430_vmmc2 = {
498 .constraints = {
499 .min_uV = 1850000,
500 .max_uV = 1850000,
501 .apply_uV = true,
502 .valid_modes_mask = REGULATOR_MODE_NORMAL
503 | REGULATOR_MODE_STANDBY,
504 .valid_ops_mask = REGULATOR_CHANGE_MODE
505 | REGULATOR_CHANGE_STATUS,
506 },
507 .num_consumer_supplies = 1,
508 .consumer_supplies = &sdp3430_vmmc2_supply,
509 };
510
511 /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
512 static struct regulator_init_data sdp3430_vsim = {
513 .constraints = {
514 .min_uV = 1800000,
515 .max_uV = 3000000,
516 .valid_modes_mask = REGULATOR_MODE_NORMAL
517 | REGULATOR_MODE_STANDBY,
518 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
519 | REGULATOR_CHANGE_MODE
520 | REGULATOR_CHANGE_STATUS,
521 },
522 .num_consumer_supplies = 1,
523 .consumer_supplies = &sdp3430_vsim_supply,
524 };
525
526 /* VDAC for DSS driving S-Video */
527 static struct regulator_init_data sdp3430_vdac = {
528 .constraints = {
529 .min_uV = 1800000,
530 .max_uV = 1800000,
531 .apply_uV = true,
532 .valid_modes_mask = REGULATOR_MODE_NORMAL
533 | REGULATOR_MODE_STANDBY,
534 .valid_ops_mask = REGULATOR_CHANGE_MODE
535 | REGULATOR_CHANGE_STATUS,
536 },
537 .num_consumer_supplies = 1,
538 .consumer_supplies = &sdp3430_vdda_dac_supply,
539 };
540
541 /* VPLL2 for digital video outputs */
542 static struct regulator_consumer_supply sdp3430_vpll2_supplies[] = {
543 {
544 .supply = "vdds_dsi",
545 .dev = &sdp3430_dss_device.dev,
546 }
547 };
548
549 static struct regulator_init_data sdp3430_vpll2 = {
550 .constraints = {
551 .name = "VDVI",
552 .min_uV = 1800000,
553 .max_uV = 1800000,
554 .apply_uV = true,
555 .valid_modes_mask = REGULATOR_MODE_NORMAL
556 | REGULATOR_MODE_STANDBY,
557 .valid_ops_mask = REGULATOR_CHANGE_MODE
558 | REGULATOR_CHANGE_STATUS,
559 },
560 .num_consumer_supplies = ARRAY_SIZE(sdp3430_vpll2_supplies),
561 .consumer_supplies = sdp3430_vpll2_supplies,
562 };
563
564 static struct twl4030_codec_audio_data sdp3430_audio = {
565 .audio_mclk = 26000000,
566 };
567
568 static struct twl4030_codec_data sdp3430_codec = {
569 .audio_mclk = 26000000,
570 .audio = &sdp3430_audio,
571 };
572
573 static struct twl4030_platform_data sdp3430_twldata = {
574 .irq_base = TWL4030_IRQ_BASE,
575 .irq_end = TWL4030_IRQ_END,
576
577 /* platform_data for children goes here */
578 .bci = &sdp3430_bci_data,
579 .gpio = &sdp3430_gpio_data,
580 .madc = &sdp3430_madc_data,
581 .keypad = &sdp3430_kp_data,
582 .usb = &sdp3430_usb_data,
583 .codec = &sdp3430_codec,
584
585 .vaux1 = &sdp3430_vaux1,
586 .vaux2 = &sdp3430_vaux2,
587 .vaux3 = &sdp3430_vaux3,
588 .vaux4 = &sdp3430_vaux4,
589 .vmmc1 = &sdp3430_vmmc1,
590 .vmmc2 = &sdp3430_vmmc2,
591 .vsim = &sdp3430_vsim,
592 .vdac = &sdp3430_vdac,
593 .vpll2 = &sdp3430_vpll2,
594 };
595
596 static struct i2c_board_info __initdata sdp3430_i2c_boardinfo[] = {
597 {
598 I2C_BOARD_INFO("twl4030", 0x48),
599 .flags = I2C_CLIENT_WAKE,
600 .irq = INT_34XX_SYS_NIRQ,
601 .platform_data = &sdp3430_twldata,
602 },
603 };
604
605 static int __init omap3430_i2c_init(void)
606 {
607 /* i2c1 for PMIC only */
608 omap_register_i2c_bus(1, 2600, sdp3430_i2c_boardinfo,
609 ARRAY_SIZE(sdp3430_i2c_boardinfo));
610 /* i2c2 on camera connector (for sensor control) and optional isp1301 */
611 omap_register_i2c_bus(2, 400, NULL, 0);
612 /* i2c3 on display connector (for DVI, tfp410) */
613 omap_register_i2c_bus(3, 400, NULL, 0);
614 return 0;
615 }
616
617 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
618
619 static struct omap_smc91x_platform_data board_smc91x_data = {
620 .cs = 3,
621 .flags = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
622 IORESOURCE_IRQ_LOWLEVEL,
623 };
624
625 static void __init board_smc91x_init(void)
626 {
627 if (omap_rev() > OMAP3430_REV_ES1_0)
628 board_smc91x_data.gpio_irq = 6;
629 else
630 board_smc91x_data.gpio_irq = 29;
631
632 gpmc_smc91x_init(&board_smc91x_data);
633 }
634
635 #else
636
637 static inline void board_smc91x_init(void)
638 {
639 }
640
641 #endif
642
643 static void enable_board_wakeup_source(void)
644 {
645 /* T2 interrupt line (keypad) */
646 omap_mux_init_signal("sys_nirq",
647 OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
648 }
649
650 static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
651
652 .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
653 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
654 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
655
656 .phy_reset = true,
657 .reset_gpio_port[0] = 57,
658 .reset_gpio_port[1] = 61,
659 .reset_gpio_port[2] = -EINVAL
660 };
661
662 #ifdef CONFIG_OMAP_MUX
663 static struct omap_board_mux board_mux[] __initdata = {
664 { .reg_offset = OMAP_MUX_TERMINATOR },
665 };
666 #else
667 #define board_mux NULL
668 #endif
669
670 static struct mtd_partition sdp_nor_partitions[] = {
671 /* bootloader (U-Boot, etc) in first sector */
672 {
673 .name = "Bootloader-NOR",
674 .offset = 0,
675 .size = SZ_256K,
676 .mask_flags = MTD_WRITEABLE, /* force read-only */
677 },
678 /* bootloader params in the next sector */
679 {
680 .name = "Params-NOR",
681 .offset = MTDPART_OFS_APPEND,
682 .size = SZ_256K,
683 .mask_flags = 0,
684 },
685 /* kernel */
686 {
687 .name = "Kernel-NOR",
688 .offset = MTDPART_OFS_APPEND,
689 .size = SZ_2M,
690 .mask_flags = 0
691 },
692 /* file system */
693 {
694 .name = "Filesystem-NOR",
695 .offset = MTDPART_OFS_APPEND,
696 .size = MTDPART_SIZ_FULL,
697 .mask_flags = 0
698 }
699 };
700
701 static struct mtd_partition sdp_onenand_partitions[] = {
702 {
703 .name = "X-Loader-OneNAND",
704 .offset = 0,
705 .size = 4 * (64 * 2048),
706 .mask_flags = MTD_WRITEABLE /* force read-only */
707 },
708 {
709 .name = "U-Boot-OneNAND",
710 .offset = MTDPART_OFS_APPEND,
711 .size = 2 * (64 * 2048),
712 .mask_flags = MTD_WRITEABLE /* force read-only */
713 },
714 {
715 .name = "U-Boot Environment-OneNAND",
716 .offset = MTDPART_OFS_APPEND,
717 .size = 1 * (64 * 2048),
718 },
719 {
720 .name = "Kernel-OneNAND",
721 .offset = MTDPART_OFS_APPEND,
722 .size = 16 * (64 * 2048),
723 },
724 {
725 .name = "File System-OneNAND",
726 .offset = MTDPART_OFS_APPEND,
727 .size = MTDPART_SIZ_FULL,
728 },
729 };
730
731 static struct mtd_partition sdp_nand_partitions[] = {
732 /* All the partition sizes are listed in terms of NAND block size */
733 {
734 .name = "X-Loader-NAND",
735 .offset = 0,
736 .size = 4 * (64 * 2048),
737 .mask_flags = MTD_WRITEABLE, /* force read-only */
738 },
739 {
740 .name = "U-Boot-NAND",
741 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
742 .size = 10 * (64 * 2048),
743 .mask_flags = MTD_WRITEABLE, /* force read-only */
744 },
745 {
746 .name = "Boot Env-NAND",
747
748 .offset = MTDPART_OFS_APPEND, /* Offset = 0x1c0000 */
749 .size = 6 * (64 * 2048),
750 },
751 {
752 .name = "Kernel-NAND",
753 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
754 .size = 40 * (64 * 2048),
755 },
756 {
757 .name = "File System - NAND",
758 .size = MTDPART_SIZ_FULL,
759 .offset = MTDPART_OFS_APPEND, /* Offset = 0x780000 */
760 },
761 };
762
763 static struct flash_partitions sdp_flash_partitions[] = {
764 {
765 .parts = sdp_nor_partitions,
766 .nr_parts = ARRAY_SIZE(sdp_nor_partitions),
767 },
768 {
769 .parts = sdp_onenand_partitions,
770 .nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
771 },
772 {
773 .parts = sdp_nand_partitions,
774 .nr_parts = ARRAY_SIZE(sdp_nand_partitions),
775 },
776 };
777
778 static struct omap_musb_board_data musb_board_data = {
779 .interface_type = MUSB_INTERFACE_ULPI,
780 .mode = MUSB_OTG,
781 .power = 100,
782 };
783
784 static void __init omap_3430sdp_init(void)
785 {
786 omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
787 omap3430_i2c_init();
788 platform_add_devices(sdp3430_devices, ARRAY_SIZE(sdp3430_devices));
789 if (omap_rev() > OMAP3430_REV_ES1_0)
790 ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV2;
791 else
792 ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV1;
793 sdp3430_spi_board_info[0].irq = gpio_to_irq(ts_gpio);
794 spi_register_board_info(sdp3430_spi_board_info,
795 ARRAY_SIZE(sdp3430_spi_board_info));
796 ads7846_dev_init();
797 omap_serial_init();
798 usb_musb_init(&musb_board_data);
799 board_smc91x_init();
800 sdp_flash_init(sdp_flash_partitions);
801 sdp3430_display_init();
802 enable_board_wakeup_source();
803 usb_ehci_init(&ehci_pdata);
804 }
805
806 static void __init omap_3430sdp_map_io(void)
807 {
808 omap2_set_globals_343x();
809 omap34xx_map_common_io();
810 }
811
812 MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
813 /* Maintainer: Syed Khasim - Texas Instruments Inc */
814 .phys_io = 0x48000000,
815 .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc,
816 .boot_params = 0x80000100,
817 .map_io = omap_3430sdp_map_io,
818 .reserve = omap_reserve,
819 .init_irq = omap_3430sdp_init_irq,
820 .init_machine = omap_3430sdp_init,
821 .timer = &omap_timer,
822 MACHINE_END
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